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Allow adrCCl. [Patch from Phillip BLundel]
Updated ARM tests.
This commit is contained in:
Nick Clifton
parent
76fe6b98e8
commit
1cac90122e
@ -1,3 +1,11 @@
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2001-06-21 Philip Blundell <philb@gnu.org>
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* config/tc-arm.c (cplong_flag): Rename to long_flag. All uses
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updated.
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(insns): Remove entry for adrl. Add long_flag for adr.
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(do_adr): Handle `l' suffix.
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(do_adrl): Delete.
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2001-06-21 Alan Modra <amodra@bigpond.net.au>
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* config/tc-hppa.c (CHECK_FIELD_WHERE): Define.
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@ -414,7 +414,7 @@ static CONST struct asm_flg except_flag[] =
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{NULL, 0}
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};
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static CONST struct asm_flg cplong_flag[] =
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static CONST struct asm_flg long_flag[] =
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{
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{"l", 0x00400000},
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{NULL, 0}
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@ -760,8 +760,7 @@ static CONST struct asm_opcode insns[] =
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#endif
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/* Pseudo ops. */
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{"adr", 0x028f0000, NULL, NULL, ARM_ANY, do_adr},
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{"adrl", 0x028f0000, NULL, NULL, ARM_ANY, do_adrl},
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{"adr", 0x028f0000, NULL, long_flag, ARM_ANY, do_adr},
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{"nop", 0x01a00000, NULL, NULL, ARM_ANY, do_nop},
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/* ARM 2 multiplies. */
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@ -837,8 +836,8 @@ static CONST struct asm_opcode insns[] =
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/* Generic copressor instructions. */
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{"cdp", 0x0e000000, NULL, NULL, ARM_2UP, do_cdp},
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{"ldc", 0x0c100000, NULL, cplong_flag, ARM_2UP, do_lstc},
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{"stc", 0x0c000000, NULL, cplong_flag, ARM_2UP, do_lstc},
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{"ldc", 0x0c100000, NULL, long_flag, ARM_2UP, do_lstc},
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{"stc", 0x0c000000, NULL, long_flag, ARM_2UP, do_lstc},
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{"mcr", 0x0e000010, NULL, NULL, ARM_2UP, do_co_reg},
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{"mrc", 0x0e100010, NULL, NULL, ARM_2UP, do_co_reg},
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@ -848,8 +847,8 @@ static CONST struct asm_opcode insns[] =
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{"blx", 0, NULL, NULL, ARM_EXT_V5, do_blx},
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{"clz", 0x016f0f10, NULL, NULL, ARM_EXT_V5, do_clz},
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{"bkpt", 0xe1200070, "", NULL, ARM_EXT_V5, do_bkpt},
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{"ldc2", 0xfc100000, "", cplong_flag, ARM_EXT_V5, do_lstc2},
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{"stc2", 0xfc000000, "", cplong_flag, ARM_EXT_V5, do_lstc2},
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{"ldc2", 0xfc100000, "", long_flag, ARM_EXT_V5, do_lstc2},
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{"stc2", 0xfc000000, "", long_flag, ARM_EXT_V5, do_lstc2},
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{"cdp2", 0xfe000000, "", NULL, ARM_EXT_V5, do_cdp2},
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{"mcr2", 0xfe000010, "", NULL, ARM_EXT_V5, do_co_reg2},
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{"mrc2", 0xfe100010, "", NULL, ARM_EXT_V5, do_co_reg2},
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@ -4075,8 +4074,6 @@ do_adr (str, flags)
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char * str;
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unsigned long flags;
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{
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/* This is a pseudo-op of the form "adr rd, label" to be converted
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into a relative address of the form "add rd, pc, #label-.-8". */
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skip_whitespace (str);
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if (reg_required_here (&str, 12) == FAIL
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@ -4088,48 +4085,33 @@ do_adr (str, flags)
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return;
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}
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/* Frag hacking will turn this into a sub instruction if the offset turns
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out to be negative. */
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inst.reloc.type = BFD_RELOC_ARM_IMMEDIATE;
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inst.reloc.exp.X_add_number -= 8; /* PC relative adjust. */
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inst.reloc.pc_rel = 1;
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inst.instruction |= flags;
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end_of_line (str);
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}
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static void
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do_adrl (str, flags)
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char * str;
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unsigned long flags;
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{
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/* This is a pseudo-op of the form "adrl rd, label" to be converted
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into a relative address of the form:
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add rd, pc, #low(label-.-8)"
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add rd, rd, #high(label-.-8)" */
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skip_whitespace (str);
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if (reg_required_here (& str, 12) == FAIL
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|| skip_past_comma (& str) == FAIL
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|| my_get_expression (& inst.reloc.exp, & str))
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if (flags & 0x00400000)
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{
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if (!inst.error)
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inst.error = BAD_ARGS;
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return;
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/* This is a pseudo-op of the form "adrl rd, label" to be converted
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into a relative address of the form:
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add rd, pc, #low(label-.-8)"
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add rd, rd, #high(label-.-8)" */
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/* Frag hacking will turn this into a sub instruction if the offset turns
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out to be negative. */
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inst.reloc.type = BFD_RELOC_ARM_ADRL_IMMEDIATE;
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inst.reloc.exp.X_add_number -= 8; /* PC relative adjust */
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inst.reloc.pc_rel = 1;
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inst.instruction |= flags & ~0x00400000;
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inst.size = INSN_SIZE * 2;
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}
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else
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{
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/* This is a pseudo-op of the form "adr rd, label" to be converted
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into a relative address of the form "add rd, pc, #label-.-8". */
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/* Frag hacking will turn this into a sub instruction if the offset turns
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out to be negative. */
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inst.reloc.type = BFD_RELOC_ARM_IMMEDIATE;
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inst.reloc.exp.X_add_number -= 8; /* PC relative adjust. */
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inst.reloc.pc_rel = 1;
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inst.instruction |= flags;
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}
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end_of_line (str);
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/* Frag hacking will turn this into a sub instruction if the offset turns
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out to be negative. */
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inst.reloc.type = BFD_RELOC_ARM_ADRL_IMMEDIATE;
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inst.reloc.exp.X_add_number -= 8; /* PC relative adjust */
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inst.reloc.pc_rel = 1;
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inst.instruction |= flags;
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inst.size = INSN_SIZE * 2;
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return;
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}
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static void
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@ -1,3 +1,14 @@
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2001-06-21 Nick Clifton <nickc@cambridge.redhat.com>
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* gas/arm/arm.exp: Remove msr-bad.s test.
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Select processor type for architecture specific instruction tests.
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* gas/arm/adrl.s: Add adrEQl as a test.
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* gas/arm/adrl.d: Adjusted expected output.
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* gas/arm/arm7dm.s: Add "msr CPSR_x, #0" as a test instruction.
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* gas/arm/msr-bad.s: Delete.
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2001-06-18 Tom Rix <trix@redhat.com>
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* gas/ppc/aix.exp: New file, aix specific tests.
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@ -9,10 +9,12 @@ Disassembly of section .text:
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...
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0+2000 <.*> e24f0008 sub r0, pc, #8 ; 0x8
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0+2004 <.*> e2400c20 sub r0, r0, #8192 ; 0x2000
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0+2008 <.*> e28f0018 add r0, pc, #24 ; 0x18
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0+2008 <.*> e28f0020 add r0, pc, #32 ; 0x20
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0+200c <.*> e2800c20 add r0, r0, #8192 ; 0x2000
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0+2010 <.*> e24f0018 sub r0, pc, #24 ; 0x18
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0+2014 <.*> e1a00000 nop \(mov r0,r0\)
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0+2018 <.*> e28f0000 add r0, pc, #0 ; 0x0
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0+2018 <.*> e28f0008 add r0, pc, #8 ; 0x8
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0+201c <.*> e1a00000 nop \(mov r0,r0\)
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0+2020 <.*> 028f0000 addeq r0, pc, #0 ; 0x0
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0+2024 <.*> e1a00000 nop \(mov r0,r0\)
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...
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@ -9,6 +9,7 @@ foo:
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adrl r0, 1f
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adrl r0, 2b
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adrl r0, 2f
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adrEQl r0, 2f
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2:
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.space 8200
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1:
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@ -4,18 +4,17 @@
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if {[istarget *arm*-*-*] || [istarget "xscale-*-*"]} then {
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run_dump_test "inst"
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gas_test "arm3.s" "" $stdoptlist "Arm 3 instructions"
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gas_test "arm3.s" "-marm3" $stdoptlist "Arm 3 instructions"
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gas_test "arm6.s" "" $stdoptlist "Arm 6 instructions"
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gas_test_error "msr-bad.s" "-marmv3" "immediate value cannot be used to set this field"
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gas_test "arm6.s" "-marm6" $stdoptlist "Arm 6 instructions"
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gas_test "arm7dm.s" "" $stdoptlist "Arm 7DM instructions"
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gas_test "arm7dm.s" "-marm7dm" $stdoptlist "Arm 7DM instructions"
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run_dump_test "arm7t"
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gas_test "thumb.s" "" $stdoptlist "Thumb instructions"
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gas_test "thumb.s" "-marm7t" $stdoptlist "Thumb instructions"
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gas_test "arch4t.s" "" $stdoptlist "Arm architecture 4t instructions"
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gas_test "arch4t.s" "-marmv4t" $stdoptlist "Arm architecture 4t instructions"
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gas_test "copro.s" "" $stdoptlist "Co processor instructions"
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@ -10,3 +10,5 @@
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smulls r1, r0, r9, r11
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umlaleqs r2, r9, r4, r9
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smlalge r14, r10, r8, r14
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msr CPSR_x, #0 @ This used to be illegal, but rev 2 of the ARM ARM allows it.
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@ -1,2 +0,0 @@
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@ illegal set of CPSR from immediate value
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msr cpsr, #0
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