2000-09-14 Kazu Hirata <kazu@hxi.com>

* config/tc-a29k.c: Fix formatting.
	* config/tc-alpha.c: Likewise.
	* config/tc-arc.c: Likewise.
	* config/tc-arc.h: Likewise.
	* config/tc-arm.c: Likewise.
	* config/tc-arm.h: Likewise.
	* config/tc-avr.c: Likewise.
	* config/tc-avr.h: Likewise.
	* config/tc-tic30.c: Likewise.
	* config/tc-tic30.h: Likewise.
	* config/tc-tic54x.c: Likewise.
	* config/tc-tic54x.h: Likewise.
	* config/tc-tic80.c: Likewise.
	* config/tc-tic80.h: Likewise.
This commit is contained in:
Kazu Hirata 2000-09-15 01:06:52 +00:00
parent 7484b8e6d9
commit 1dab94dd91
15 changed files with 174 additions and 176 deletions

View File

@ -1,3 +1,20 @@
2000-09-14 Kazu Hirata <kazu@hxi.com>
* config/tc-a29k.c: Fix formatting.
* config/tc-alpha.c: Likewise.
* config/tc-arc.c: Likewise.
* config/tc-arc.h: Likewise.
* config/tc-arm.c: Likewise.
* config/tc-arm.h: Likewise.
* config/tc-avr.c: Likewise.
* config/tc-avr.h: Likewise.
* config/tc-tic30.c: Likewise.
* config/tc-tic30.h: Likewise.
* config/tc-tic54x.c: Likewise.
* config/tc-tic54x.h: Likewise.
* config/tc-tic80.c: Likewise.
* config/tc-tic80.h: Likewise.
2000-09-14 Timothy Wall <twall@cygnus.com>
* config/tc-ia64.c (specify_resource): For PR%/PR63, note types of

View File

@ -1,5 +1,5 @@
/* tc-a29k.c -- Assemble for the AMD 29000.
Copyright (C) 1989, 90, 91, 92, 93, 94, 95, 1998
Copyright (C) 1989, 90, 91, 92, 93, 94, 95, 98, 2000
Free Software Foundation, Inc.
This file is part of GAS, the GNU Assembler.
@ -98,7 +98,7 @@ const char comment_chars[] = ";";
.line and .file directives will appear in the pre-processed output */
/* Note that input_file.c hand checks for '#' at the beginning of the
first line of the input file. This is because the compiler outputs
#NO_APP at the beginning of its output. */
#NO_APP at the beginning of its output. */
/* Also note that comments like this one will always work */
const char line_comment_chars[] = "#";
@ -148,7 +148,7 @@ s_use (ignore)
return;
}
/* Literals can't go in the text segment because you can't read from
instruction memory on some 29k's. So, into initialized data. */
instruction memory on some 29k's. So, into initialized data. */
if (strncmp (input_line_pointer, ".lit", 4) == 0)
{
input_line_pointer += 4;
@ -283,7 +283,7 @@ md_begin ()
}
/* Hack to avoid multiple opcode entries. We pre-locate all the
variations (b/i field and P/A field) and handle them. */
variations (b/i field and P/A field) and handle them. */
if (!strcmp (name, machine_opcodes[i + 1].name))
{
@ -427,7 +427,7 @@ machine_ip (str)
/* Build the opcode, checking as we go to make sure that the
operands match.
If an operand matches, we modify the_insn or opcode appropriately,
and do a "continue". If an operand fails to match, we "break". */
@ -445,7 +445,7 @@ machine_ip (str)
case '\0': /* end of args */
if (*s == '\0')
{
/* We are truly done. */
/* We are truly done. */
the_insn.opcode = opcode;
return;
}
@ -669,7 +669,6 @@ machine_ip (str)
}
break;
case 'f': /* FS bits of CONVERT */
if (operand->X_op == O_constant &&
operand->X_add_number < 4)
@ -792,7 +791,6 @@ md_apply_fix (fixP, val)
fixP->fx_addnumber = val; /* Remember value for emit_reloc */
know (fixP->fx_size == 4);
know (fixP->fx_r_type < NO_RELOC);
@ -1004,7 +1002,7 @@ print_insn (insn)
On sparc/29k: first 4 bytes are normal unsigned long address, next three
bytes are index, most sig. byte first. Byte 7 is broken up with
bit 7 as external, bits 6 & 5 unused, and the lower
five bits as relocation type. Next 4 bytes are long addend. */
five bits as relocation type. Next 4 bytes are long addend. */
/* Thanx and a tip of the hat to Michael Bloom, mb@ttidca.tti.com */
#ifdef OBJ_AOUT
@ -1121,7 +1119,7 @@ md_undefined_symbol (name)
long maxreg;
/* Parse the number, make sure it has no extra zeroes or
trailing chars. */
trailing chars. */
regnum = atol (&name[2]);
if (name[0] == 's' || name[0] == 'S')
@ -1235,7 +1233,7 @@ md_operand (expressionP)
type = 'x';
fieldlimit = 4;
}
else
else
{
return;
}
@ -1266,7 +1264,7 @@ md_operand (expressionP)
SKIP_WHITESPACE ();
input_line_pointer = s;
expressionP->X_op = O_constant;
expressionP->X_op = O_constant;
expressionP->X_unsigned = 1;
expressionP->X_add_number = ((floatbuf[fieldnum * 2]
<< LITTLENUM_NUMBER_OF_BITS)
@ -1292,5 +1290,3 @@ md_pcrel_from (fixP)
{
return fixP->fx_where + fixP->fx_frag->fr_address;
}
/* end of tc-a29k.c */

View File

@ -1,5 +1,5 @@
/* tc-alpha.c - Processor-specific code for the DEC Alpha AXP CPU.
Copyright (C) 1989, 93-98, 1999 Free Software Foundation, Inc.
Copyright (C) 1989, 93-98, 1999, 2000 Free Software Foundation, Inc.
Contributed by Carnegie Mellon University, 1993.
Written by Alessandro Forin, based on earlier gas-1.38 target CPU files.
Modified by Ken Raeburn for gas-2.x and ECOFF support.
@ -108,7 +108,7 @@ struct alpha_macro
enum alpha_macro_arg argsets[16];
};
/* Extra expression types. */
/* Extra expression types. */
#define O_pregister O_md1 /* O_register, in parentheses */
#define O_cpregister O_md2 /* + a leading comma */
@ -127,7 +127,6 @@ struct alpha_macro
#define USER_RELOC_P(R) ((R) >= O_literal && (R) <= O_gprellow)
#endif
/* Macros for extracting the type and number of encoded register tokens */
#define is_ir_num(x) (((x) & 32) == 0)
@ -376,7 +375,7 @@ static segT alpha_dtors_section;
#endif
static segT alpha_lit8_section;
/* Symbols referring to said sections. */
/* Symbols referring to said sections. */
#ifdef OBJ_ECOFF
static symbolS *alpha_lita_symbol;
static symbolS *alpha_lit4_symbol;
@ -580,7 +579,7 @@ static const struct cpu_type
} cpu_types[] =
{
/* Ad hoc convention: cpu number gets palcode, process code doesn't.
This supports usage under DU 4.0b that does ".arch ev4", and
This supports usage under DU 4.0b that does ".arch ev4", and
usage in MILO that does -m21064. Probably something more
specific like -m21064-pal should be used, but oh well. */
@ -1078,7 +1077,7 @@ md_parse_option (c, arg)
break;
#ifdef OBJ_EVAX
case '+': /* For g++. Hash any name > 63 chars long. */
case '+': /* For g++. Hash any name > 63 chars long. */
alpha_flag_hash_long_names = 1;
break;
@ -2002,7 +2001,7 @@ tokenize_arguments (str, tok, ntok)
{
char *hold = input_line_pointer++;
/* First try for parenthesized register ... */
/* First try for parenthesized register ... */
expression (tok);
if (*input_line_pointer == ')' && tok->X_op == O_register)
{
@ -2489,7 +2488,7 @@ emit_insn (insn)
else switch (fixup->reloc)
{
#ifdef OBJ_ELF
/* These relocation types are only used internally. */
/* These relocation types are only used internally. */
case BFD_RELOC_ALPHA_GPDISP_HI16:
case BFD_RELOC_ALPHA_GPDISP_LO16:
size = 2;
@ -3058,7 +3057,7 @@ load_expression (targreg, exp, pbasereg, poffset, explicit_reloc)
case O_subtract:
/* Assume that this difference expression will be resolved to an
absolute value and that that value will fit in 16 bits. */
absolute value and that that value will fit in 16 bits. */
assert (explicit_reloc == (const expressionS *)0);
set_tok_reg (newtok[0], targreg);
@ -4309,7 +4308,7 @@ s_alpha_comm (ignore)
{
offsetT align;
input_line_pointer++;
input_line_pointer++;
align = get_absolute_expression ();
bfd_set_section_alignment (stdoutput, new_seg, align);
}
@ -4324,7 +4323,7 @@ s_alpha_comm (ignore)
#ifdef OBJ_EVAX
if (bfd_section_size (stdoutput, new_seg) > 0)
{
{
if (bfd_section_size (stdoutput, new_seg) != temp)
as_bad (_("Length of .comm \"%s\" is already %ld. Not changed to %ld."),
S_GET_NAME (symbolP),
@ -4343,7 +4342,7 @@ s_alpha_comm (ignore)
#endif
else
{
#ifdef OBJ_EVAX
#ifdef OBJ_EVAX
subseg_set (new_seg, 0);
p = frag_more (temp);
new_seg->flags |= SEC_IS_COMMON;
@ -4567,7 +4566,7 @@ s_alpha_prologue (ignore)
default:
as_bad (_("Invalid argument %d to .prologue."), arg);
break;
}
}
}
static void
@ -4600,9 +4599,9 @@ s_alpha_coff_wrapper (which)
#endif /* OBJ_ELF */
#ifdef OBJ_EVAX
/* Handle the section specific pseudo-op. */
static void
s_alpha_section (secid)
int secid;
@ -4626,7 +4625,6 @@ s_alpha_section (secid)
alpha_current_align = 0;
}
/* Parse .ent directives. */
static void
@ -4664,7 +4662,6 @@ s_alpha_ent (ignore)
return;
}
/* Parse .frame <framreg>,<framesize>,RA,<rsa_offset> directives. */
static void
@ -4853,7 +4850,6 @@ s_alpha_pdesc (ignore)
return;
}
/* Support for crash debug on vms. */
static void
@ -4894,7 +4890,6 @@ s_alpha_name (ignore)
return;
}
static void
s_alpha_linkage (ignore)
int ignore;
@ -4923,7 +4918,6 @@ s_alpha_linkage (ignore)
return;
}
static void
s_alpha_code_address (ignore)
int ignore;
@ -4952,7 +4946,6 @@ s_alpha_code_address (ignore)
return;
}
static void
s_alpha_fp_save (ignore)
int ignore;
@ -4964,7 +4957,6 @@ s_alpha_fp_save (ignore)
return;
}
static void
s_alpha_mask (ignore)
int ignore;
@ -4986,7 +4978,6 @@ s_alpha_mask (ignore)
return;
}
static void
s_alpha_fmask (ignore)
int ignore;
@ -5022,7 +5013,6 @@ s_alpha_end (ignore)
return;
}
static void
s_alpha_file (ignore)
int ignore;

View File

@ -1,5 +1,6 @@
/* tc-arc.c -- Assembler for the ARC
Copyright (C) 1994, 1995, 1997, 1998, 1999 Free Software Foundation, Inc.
Copyright (C) 1994, 1995, 1997, 1998, 1999, 2000
Free Software Foundation, Inc.
Contributed by Doug Evans (dje@cygnus.com).
This file is part of GAS, the GNU Assembler.
@ -17,7 +18,7 @@
You should have received a copy of the GNU General Public License
along with GAS; see the file COPYING. If not, write to the Free
Software Foundation, 59 Temple Place - Suite 330, Boston, MA
02111-1307, USA. */
02111-1307, USA. */
#include <stdio.h>
#include <ctype.h>
@ -59,9 +60,9 @@ const char comment_chars[] = "#;";
.line and .file directives will appear in the pre-processed output */
/* Note that input_file.c hand checks for '#' at the beginning of the
first line of the input file. This is because the compiler outputs
#NO_APP at the beginning of its output. */
#NO_APP at the beginning of its output. */
/* Also note that comments started like this one will always
work if '/' isn't otherwise defined. */
work if '/' isn't otherwise defined. */
const char line_comment_chars[] = "#";
const char line_separator_chars[] = "";
@ -1038,7 +1039,7 @@ md_number_to_chars (buf, val, n)
number_to_chars_littleendian (buf, val, n);
}
/* Round up a section size to the appropriate boundary. */
/* Round up a section size to the appropriate boundary. */
valueT
md_section_align (segment, size)
@ -1082,7 +1083,7 @@ md_convert_frag (abfd, sec, fragp)
to achieve the same effect. Perhaps put a special cookie in X_add_number
to mark the expression as special. */
void
void
md_operand (expressionP)
expressionS *expressionP;
{
@ -1100,7 +1101,7 @@ md_operand (expressionP)
++input_line_pointer;
if (expressionP->X_op == O_symbol
&& expressionP->X_add_number == 0
/* I think this test is unnecessary but just as a sanity check... */
/* I think this test is unnecessary but just as a sanity check... */
&& expressionP->X_op_symbol == NULL)
{
expressionS two;
@ -1192,7 +1193,7 @@ arc_cons_fix_new (frag, where, nbytes, exp)
/* The location from which a PC relative jump should be calculated,
given a PC relative reloc. */
long
long
md_pcrel_from (fixP)
fixS *fixP;
{

View File

@ -1,5 +1,5 @@
/* tc-arc.h - Macros and type defines for the ARC.
Copyright (C) 1994, 1995, 1997, 1999 Free Software Foundation, Inc.
Copyright (C) 1994, 1995, 1997, 1999, 2000 Free Software Foundation, Inc.
Contributed by Doug Evans (dje@cygnus.com).
This file is part of GAS, the GNU Assembler.
@ -17,7 +17,7 @@
You should have received a copy of the GNU General Public License
along with GAS; see the file COPYING. If not, write to the Free
Software Foundation, 59 Temple Place - Suite 330, Boston, MA
02111-1307, USA. */
02111-1307, USA. */
#define TC_ARC 1

View File

@ -951,7 +951,7 @@ struct thumb_opcode
int size;
/* Which CPU variants this exists for. */
/* Which CPU variants this exists for. */
unsigned long variants;
/* Function to call to parse args. */
@ -1220,7 +1220,7 @@ add_to_lit_pool ()
static void
symbol_locate (symbolP, name, segment, valu, frag)
symbolS * symbolP;
symbolS * symbolP;
CONST char * name; /* It is copied, the caller can modify. */
segT segment; /* Segment identifier (SEG_<something>). */
valueT valu; /* Symbol value. */
@ -1530,7 +1530,7 @@ s_thumb_set (equiv)
{
extern struct list_info_struct * listing_tail;
fragS * dummy_frag = (fragS *) xmalloc (sizeof (fragS));
memset (dummy_frag, 0, sizeof (fragS));
dummy_frag->fr_type = rs_fill;
dummy_frag->line = listing_tail;
@ -2550,7 +2550,7 @@ decode_shift (str, unrestrict)
* p = '\0';
shift = (const struct asm_shift_name *) hash_find (arm_shift_hsh, * str);
* p = c;
if (shift == NULL)
{
inst.error = _("Shift expression expected");
@ -2558,7 +2558,7 @@ decode_shift (str, unrestrict)
}
assert (shift->properties->index == shift_properties[shift->properties->index].index);
if (shift->properties->index == SHIFT_RRX)
{
* str = p;
@ -2582,13 +2582,13 @@ decode_shift (str, unrestrict)
* str = p;
return FAIL;
}
inst.error = NULL;
p ++;
if (my_get_expression (& inst.reloc.exp, & p))
return FAIL;
/* Validate some simple #expressions. */
if (inst.reloc.exp.X_op == O_constant)
{
@ -2623,7 +2623,7 @@ decode_shift (str, unrestrict)
support it. */
if (num == 32)
num = 0;
inst.instruction |= (num << 7) | shift->properties->bit_field;
}
else
@ -2632,7 +2632,7 @@ decode_shift (str, unrestrict)
inst.reloc.pc_rel = 0;
inst.instruction |= shift->properties->bit_field;
}
* str = p;
return SUCCESS;
}

View File

@ -1,5 +1,5 @@
/* This file is tc-arm.h
Copyright (C) 1994, 1995, 1996, 1997, 1998, 1999
Copyright (C) 1994, 1995, 1996, 1997, 1998, 1999, 2000
Free Software Foundation, Inc.
Contributed by Richard Earnshaw (rwe@pegasus.esprit.ec.org)
Modified by David Taylor (dtaylor@armltd.co.uk)
@ -68,12 +68,12 @@
#if defined OBJ_COFF || defined OBJ_ELF
# define ARM_BI_ENDIAN
# define TC_VALIDATE_FIX(fixP, segType, Label) \
if (arm_validate_fix (fixP)) add_symbolP = fixP->fx_addsy
extern boolean arm_validate_fix PARAMS ((struct fix *));
#endif
#ifdef OBJ_COFF
# if defined TE_PE
# define TC_FORCE_RELOCATION(x) ((x)->fx_r_type == BFD_RELOC_RVA)
@ -90,7 +90,7 @@
#ifdef OBJ_ELF
# define TARGET_FORMAT elf32_arm_target_format()
extern const char * elf32_arm_target_format PARAMS ((void));
# define TC_FORCE_RELOCATION(fixp) arm_force_relocation (fixp)
extern int arm_force_relocation PARAMS ((struct fix *));
#endif
@ -147,7 +147,6 @@ boolean arm_fix_adjustable PARAMS ((fixS *));
#define ARM_SET_INTERWORK(s,t) ((t) ? ARM_SET_FLAG (s, ARM_FLAG_INTERWORK) : ARM_RESET_FLAG (s, ARM_FLAG_INTERWORK))
#define THUMB_SET_FUNC(s,t) ((t) ? ARM_SET_FLAG (s, THUMB_FLAG_FUNC) : ARM_RESET_FLAG (s, THUMB_FLAG_FUNC))
#define TC_START_LABEL(C,STR) \
(c == ':' || (c == '/' && arm_data_in_code ()))
int arm_data_in_code PARAMS ((void));
@ -198,18 +197,16 @@ void armelf_frob_symbol PARAMS ((symbolS *, int *));
extern void cons_fix_new_arm PARAMS ((fragS *, int, int, expressionS *));
/* Don't allow symbols to be discarded on GOT related relocs,
nor on globals. */
nor on globals. */
#define tc_fix_adjustable(x) (\
((x)->fx_r_type == BFD_RELOC_ARM_PLT32 \
|| (x)->fx_r_type == BFD_RELOC_ARM_GOT32 \
|| (x)->fx_r_type == BFD_RELOC_ARM_GOTOFF \
|| S_IS_EXTERN ((x)->fx_addsy) \
|| S_IS_WEAK ((x)->fx_addsy)) ? 0 : 1)
#ifdef OBJ_ELF
#define GLOBAL_OFFSET_TABLE_NAME "_GLOBAL_OFFSET_TABLE_"
#else
#define GLOBAL_OFFSET_TABLE_NAME "__GLOBAL_OFFSET_TABLE_"
#endif
/* end of tc-arm.h */

View File

@ -184,13 +184,13 @@ show_mcu_list (stream)
fprintf (stream, _("Known MCU names:"));
x = 1000;
for (i = 0; mcu_types[i].name; i++)
{
int len = strlen (mcu_types[i].name);
x += len + 1;
if (x < 75)
fprintf (stream, " %s", mcu_types[i].name);
else
@ -199,7 +199,7 @@ show_mcu_list (stream)
x = len + 2;
}
}
fprintf (stream, "\n");
}
@ -232,7 +232,7 @@ extract_word (char *from, char *to, int limit)
if (size + 1 >= limit)
break;
}
to[size] = 0;
return op_end;
}
@ -274,7 +274,7 @@ avr_set_arch (dummy)
int dummy ATTRIBUTE_UNUSED;
{
char *str;
str = (char *) alloca (20);
input_line_pointer = extract_word (input_line_pointer, str, 20);
md_parse_option (OPTION_MMCU, str);
@ -332,7 +332,7 @@ md_parse_option (c, arg)
avr_opt.no_wrap = 1;
return 1;
}
return 0;
}
@ -377,14 +377,14 @@ md_atof (type, litP, sizeP)
input_line_pointer = t;
*sizeP = prec * sizeof (LITTLENUM_TYPE);
/* This loop outputs the LITTLENUMs in REVERSE order. */
for (wordP = words + prec - 1; prec--;)
{
md_number_to_chars (litP, (valueT) (*wordP--), sizeof (LITTLENUM_TYPE));
litP += sizeof (LITTLENUM_TYPE);
}
return NULL;
}
@ -436,7 +436,7 @@ avr_get_constant (str, max)
if (ex.X_add_number > max || ex.X_add_number < 0)
as_bad (_("number must be less than %d"), max + 1);
return ex.X_add_number;
}
@ -474,7 +474,7 @@ avr_operands (opcode, line)
{
if (*op == ',')
++op;
if (*op == '=')
{
reg2 = reg1;
@ -493,7 +493,7 @@ avr_operands (opcode, line)
reg2 = avr_operand (opcode, where, op, &str);
}
if (reg1_present && reg2_present)
reg2 = (reg2 & 0xf) | ((reg2 << 5) & 0x200);
else if (reg2_present)
@ -552,7 +552,7 @@ avr_operand (opcode, where, op, line)
if (*str == 'r' || *str == 'R')
{
char r_name[20];
str = extract_word (str, r_name, sizeof (r_name));
op_mask = 0xff;
if (isdigit (r_name[1]))
@ -570,7 +570,7 @@ avr_operand (opcode, where, op, line)
op_mask = avr_get_constant (str, 31);
str = input_line_pointer;
}
if (op_mask <= 31)
{
switch (*op)
@ -580,19 +580,19 @@ avr_operand (opcode, where, op, line)
as_bad (_("register r16-r23 required"));
op_mask -= 16;
break;
case 'd':
if (op_mask < 16)
as_bad (_("register number above 15 required"));
op_mask -= 16;
break;
case 'v':
if (op_mask & 1)
as_bad (_("even register number required"));
op_mask >>= 1;
break;
case 'w':
if ((op_mask & 1) || op_mask < 24)
as_bad (_("register r24, r26, r28 or r30 required"));
@ -607,7 +607,7 @@ avr_operand (opcode, where, op, line)
case 'e':
{
char c;
if (*str == '-')
{
str = skip_space (str + 1);
@ -641,10 +641,10 @@ avr_operand (opcode, where, op, line)
case 'z':
if (*str == '-')
as_bad (_("can't predecrement"));
if (! (*str == 'z' || *str == 'Z'))
as_bad (_("pointer register Z required"));
str = skip_space (str + 1);
if (*str == '+')
@ -657,7 +657,7 @@ avr_operand (opcode, where, op, line)
case 'b':
{
char c = tolower (*str++);
if (c == 'y')
op_mask |= 0x8;
else if (c != 'z')
@ -700,7 +700,7 @@ avr_operand (opcode, where, op, line)
case 'M':
{
bfd_reloc_code_real_type r_type;
input_line_pointer = str;
r_type = avr_ldi_expression (&op_expr);
str = input_line_pointer;
@ -712,7 +712,7 @@ avr_operand (opcode, where, op, line)
case 'n':
{
unsigned int x;
x = ~avr_get_constant (str, 255);
str = input_line_pointer;
op_mask |= (x & 0xf) | ((x << 4) & 0xf00);
@ -722,7 +722,7 @@ avr_operand (opcode, where, op, line)
case 'K':
{
unsigned int x;
x = avr_get_constant (str, 63);
str = input_line_pointer;
op_mask |= (x & 0xf) | ((x & 0x30) << 2);
@ -733,7 +733,7 @@ avr_operand (opcode, where, op, line)
case 's':
{
unsigned int x;
x = avr_get_constant (str, 7);
str = input_line_pointer;
if (*op == 'S')
@ -745,7 +745,7 @@ avr_operand (opcode, where, op, line)
case 'P':
{
unsigned int x;
x = avr_get_constant (str, 63);
str = input_line_pointer;
op_mask |= (x & 0xf) | ((x & 0x30) << 5);
@ -755,20 +755,20 @@ avr_operand (opcode, where, op, line)
case 'p':
{
unsigned int x;
x = avr_get_constant (str, 31);
str = input_line_pointer;
op_mask |= x << 3;
}
break;
case '?':
break;
default:
as_bad (_("unknown constraint `%c'"), *op);
}
*line = str;
return op_mask;
}
@ -800,7 +800,7 @@ md_pcrel_from_section (fixp, sec)
&& (!S_IS_DEFINED (fixp->fx_addsy)
|| (S_GET_SEGMENT (fixp->fx_addsy) != sec)))
return 0;
return fixp->fx_frag->fr_address + fixp->fx_where;
}
@ -825,7 +825,7 @@ md_apply_fix3 (fixp, valuep, seg)
else if (fixp->fx_pcrel)
{
segT s = S_GET_SEGMENT (fixp->fx_addsy);
if (fixp->fx_addsy && (s == seg || s == absolute_section))
{
value = S_GET_VALUE (fixp->fx_addsy) + *valuep;
@ -837,7 +837,7 @@ md_apply_fix3 (fixp, valuep, seg)
else
{
value = fixp->fx_offset;
if (fixp->fx_subsy != (symbolS *) NULL)
{
if (S_GET_SEGMENT (fixp->fx_subsy) == absolute_section)
@ -853,7 +853,7 @@ md_apply_fix3 (fixp, valuep, seg)
}
}
}
switch (fixp->fx_r_type)
{
default:
@ -880,11 +880,11 @@ md_apply_fix3 (fixp, valuep, seg)
if (value & 1)
as_bad_where (fixp->fx_file, fixp->fx_line,
_("odd address operand: %ld"), value);
/* Instruction addresses are always right-shifted by 1. */
value >>= 1;
--value; /* Correct PC. */
if (value < -64 || value > 63)
as_bad_where (fixp->fx_file, fixp->fx_line,
_("operand out of range: %ld"), value);
@ -896,7 +896,7 @@ md_apply_fix3 (fixp, valuep, seg)
if (value & 1)
as_bad_where (fixp->fx_file, fixp->fx_line,
_("odd address operand: %ld"), value);
/* Instruction addresses are always right-shifted by 1. */
value >>= 1;
--value; /* Correct PC. */
@ -992,7 +992,7 @@ md_apply_fix3 (fixp, valuep, seg)
case BFD_RELOC_AVR_CALL:
{
unsigned long x;
x = bfd_getl16 (where);
if (value & 1)
as_bad_where (fixp->fx_file, fixp->fx_line,
@ -1143,24 +1143,24 @@ avr_ldi_expression (exp)
tmp = str;
str = extract_word (str, op, sizeof (op));
if (op[0])
{
mod = (int) hash_find (avr_mod_hash, op);
if (mod)
{
int closes = 0;
mod -= 10;
str = skip_space (str);
if (*str == '(')
{
int neg_p = 0;
++str;
if (strncmp ("pm(", str, 3) == 0
|| strncmp ("-(pm(", str, 5) == 0)
{
@ -1171,7 +1171,7 @@ avr_ldi_expression (exp)
}
else
as_bad (_("illegal expression"));
if (*str == '-')
{
neg_p = 1;
@ -1181,17 +1181,17 @@ avr_ldi_expression (exp)
else
str += 3;
}
if (*str == '-' && *(str + 1) == '(')
{
neg_p ^= 1;
++closes;
str += 2;
}
input_line_pointer = str;
expression (exp);
do
{
if (*input_line_pointer != ')')
@ -1202,12 +1202,12 @@ avr_ldi_expression (exp)
input_line_pointer++;
}
while (closes--);
return neg_p ? EXP_MOD_NEG_RELOC (mod) : EXP_MOD_RELOC (mod);
}
}
}
input_line_pointer = tmp;
expression (exp);
@ -1247,17 +1247,17 @@ avr_parse_cons_expression (exp, nbytes)
{
char *pm_name = "pm";
int len = strlen (pm_name);
if (strncasecmp (input_line_pointer, pm_name, len) == 0)
{
input_line_pointer = skip_space (input_line_pointer + len);
if (*input_line_pointer == '(')
{
input_line_pointer = skip_space (input_line_pointer + 1);
exp_mod_pm = 1;
expression (exp);
if (*input_line_pointer == ')')
++input_line_pointer;
else
@ -1265,14 +1265,14 @@ avr_parse_cons_expression (exp, nbytes)
as_bad (_("`)' required"));
exp_mod_pm = 0;
}
return;
}
input_line_pointer = tmp;
}
}
expression (exp);
}

View File

@ -24,36 +24,35 @@
#error AVR support requires BFD_ASSEMBLER
#endif
#define TC_AVR
/* By convention, you should define this macro in the `.h' file. For
example, `tc-m68k.h' defines `TC_M68K'. You might have to use this
if it is necessary to add CPU specific code to the object format
file. */
file. */
#define TARGET_FORMAT "elf32-avr"
/* This macro is the BFD target name to use when creating the output
file. This will normally depend upon the `OBJ_FMT' macro. */
file. This will normally depend upon the `OBJ_FMT' macro. */
#define TARGET_ARCH bfd_arch_avr
/* This macro is the BFD architecture to pass to `bfd_set_arch_mach'. */
/* This macro is the BFD architecture to pass to `bfd_set_arch_mach'. */
#define TARGET_MACH 0
/* This macro is the BFD machine number to pass to
`bfd_set_arch_mach'. If it is not defined, GAS will use 0. */
`bfd_set_arch_mach'. If it is not defined, GAS will use 0. */
#define TARGET_BYTES_BIG_ENDIAN 0
/* You should define this macro to be non-zero if the target is big
endian, and zero if the target is little endian. */
endian, and zero if the target is little endian. */
#define ONLY_STANDARD_ESCAPES
/* If you define this macro, GAS will warn about the use of
nonstandard escape sequences in a string. */
nonstandard escape sequences in a string. */
#define md_operand(x)
/* GAS will call this function for any expression that can not be
recognized. When the function is called, `input_line_pointer'
will point to the start of the expression. */
will point to the start of the expression. */
void avr_parse_cons_expression (expressionS *exp, int nbytes);
@ -67,14 +66,14 @@ void avr_cons_fix_new(fragS *frag,int where, int nbytes, expressionS *exp);
#define TC_CONS_FIX_NEW(FRAG,WHERE,N,EXP) avr_cons_fix_new(FRAG,WHERE,N,EXP)
/* You may define this macro to generate a fixup for a data
allocation pseudo-op. */
allocation pseudo-op. */
#define md_number_to_chars number_to_chars_littleendian
/* This should just call either `number_to_chars_bigendian' or
`number_to_chars_littleendian', whichever is appropriate. On
targets like the MIPS which support options to change the
endianness, which function to call is a runtime decision. On
other targets, `md_number_to_chars' can be a simple macro. */
other targets, `md_number_to_chars' can be a simple macro. */
#define WORKING_DOT_WORD
/*
@ -89,7 +88,7 @@ void avr_cons_fix_new(fragS *frag,int where, int nbytes, expressionS *exp);
`md_long_jump_size' to the size of a long jump (a jump that can go
anywhere in the function), You should define
`md_create_short_jump' to create a short jump around a long jump,
and define `md_create_long_jump' to create a long jump. */
and define `md_create_long_jump' to create a long jump. */
#define MD_APPLY_FIX3
@ -99,14 +98,14 @@ void avr_cons_fix_new(fragS *frag,int where, int nbytes, expressionS *exp);
/* If you define this macro, it means that `tc_gen_reloc' may return
multiple relocation entries for a single fixup. In this case, the
return value of `tc_gen_reloc' is a pointer to a null terminated
array. */
array. */
#define MD_PCREL_FROM_SECTION(FIXP, SEC) md_pcrel_from_section(FIXP, SEC)
#define MD_PCREL_FROM_SECTION(FIXP, SEC) md_pcrel_from_section(FIXP, SEC)
/* If you define this macro, it should return the offset between the
address of a PC relative fixup and the position from which the PC
relative adjustment should be made. On many processors, the base
of a PC relative instruction is the next instruction, so this
macro would return the length of an instruction. */
macro would return the length of an instruction. */
extern long md_pcrel_from_section PARAMS ((struct fix *, segT));
@ -114,7 +113,7 @@ extern long md_pcrel_from_section PARAMS ((struct fix *, segT));
/* The number of bytes to put into a word in a listing. This affects
the way the bytes are clumped together in the listing. For
example, a value of 2 might print `1234 5678' where a value of 1
would print `12 34 56 78'. The default value is 4. */
would print `12 34 56 78'. The default value is 4. */
#define LEX_DOLLAR 0
/* AVR port uses `$' as a logical line separator */

View File

@ -1,5 +1,5 @@
/* tc-c30.c -- Assembly code for the Texas Instruments TMS320C30
Copyright (C) 1998, 1999 Free Software Foundation.
Copyright (C) 1998, 1999, 2000 Free Software Foundation.
Contributed by Steven Haworth (steve@pm.cse.rmit.edu.au)
This file is part of GAS, the GNU Assembler.
@ -317,7 +317,7 @@ md_assemble (line)
return;
}
/* Check if instruction is a parallel instruction by seeing if the first
character is a q. */
character is a q. */
if (*token_start == 'q')
{
if (tic30_parallel_insn (token_start))
@ -444,7 +444,7 @@ md_assemble (line)
int numops = insn.tm->operands;
/* If operands are not the same, then see if any of the operands are not
required. Then recheck with number of given operands. If they are still not
the same, then give an error, otherwise carry on. */
the same, then give an error, otherwise carry on. */
for (i = 0; i < insn.tm->operands; i++)
if (insn.tm->operand_types[i] & NotReq)
numops--;
@ -465,7 +465,7 @@ md_assemble (line)
if (insn.tm->opcode_modifier == AddressMode)
{
int addr_insn = 0;
/* Store instruction uses the second operand for the address mode. */
/* Store instruction uses the second operand for the address mode. */
if ((insn.tm->operand_types[1] & (Indirect | Direct)) == (Indirect | Direct))
addr_insn = 1;
if (insn.operand_type[addr_insn]->op_type & (AllReg))
@ -484,11 +484,11 @@ md_assemble (line)
return;
}
}
/* Now set the addressing mode for 3 operand instructions. */
/* Now set the addressing mode for 3 operand instructions. */
if ((insn.tm->operand_types[0] & op3T1) && (insn.tm->operand_types[1] & op3T2))
{
/* Set the addressing mode to the values used for 2 operand instructions in the
G addressing field of the opcode. */
G addressing field of the opcode. */
char *p;
switch (insn.operand_type[0]->op_type)
{
@ -522,7 +522,7 @@ md_assemble (line)
}
/* Now make up the opcode for the 3 operand instructions. As in parallel
instructions, there will be no unresolved values, so they can be fully formed
and added to the frag table. */
and added to the frag table. */
insn.opcode = insn.tm->base_opcode;
if (insn.operand_type[0]->op_type & Indirect)
{
@ -549,7 +549,7 @@ md_assemble (line)
char *p;
int am_insn = -1;
insn.opcode = insn.tm->base_opcode;
/* Create frag for instruction - all instructions are 4 bytes long. */
/* Create frag for instruction - all instructions are 4 bytes long. */
p = frag_more (INSN_SIZE);
if ((insn.operands > 0) && (insn.tm->opcode_modifier == AddressMode))
{
@ -746,7 +746,7 @@ md_assemble (line)
md_number_to_chars (p, (valueT) insn.opcode, INSN_SIZE);
fix = fix_new_exp (frag_now, p + 3 - (frag_now->fr_literal), 1, &insn.operand_type[0]->direct.direct_expr, 0, 0);
/* Ensure that the assembler doesn't complain about fitting a 24-bit
address into 8 bits. */
address into 8 bits. */
fix->fx_no_overflow = 1;
}
}
@ -790,12 +790,12 @@ md_assemble (line)
}
else if (insn.tm->operand_types[0] & NotReq)
{
/* Check for NOP instruction without arguments. */
/* Check for NOP instruction without arguments. */
md_number_to_chars (p, (valueT) insn.opcode, INSN_SIZE);
}
else if (insn.tm->operands == 0)
{
/* Check for instructions without operands. */
/* Check for instructions without operands. */
md_number_to_chars (p, (valueT) insn.opcode, INSN_SIZE);
}
}
@ -819,7 +819,7 @@ struct tic30_par_insn
int operands[2]; /* Number of given operands for each insn */
/* Type of operand given in instruction */
operand *operand_type[2][MAX_OPERANDS];
int swap_operands; /* Whether to swap operands around. */
int swap_operands; /* Whether to swap operands around. */
unsigned p_field; /* Value of p field in multiply add/sub instructions */
unsigned opcode; /* Final opcode */
};
@ -1039,7 +1039,7 @@ tic30_parallel_insn (char *token)
/* Get number of R register and indirect reference contained within the first
two operands of each instruction. This is required for the multiply
parallel instructions which require two R registers and two indirect
references, but not in any particular place. */
references, but not in any particular place. */
if ((p_insn.operand_type[count][i]->op_type & Rn) && i < 2)
num_rn++;
else if ((p_insn.operand_type[count][i]->op_type & Indirect) && i < 2)
@ -1109,7 +1109,7 @@ tic30_parallel_insn (char *token)
debug ("P field: %08X\n", p_insn.p_field);
/* Finalise opcode. This is easier for parallel instructions as they have to be
fully resolved, there are no memory addresses allowed, except through indirect
addressing, so there are no labels to resolve. */
addressing, so there are no labels to resolve. */
{
p_insn.opcode = p_insn.tm->base_opcode;
switch (p_insn.tm->oporder)
@ -1201,7 +1201,7 @@ tic30_parallel_insn (char *token)
}
break;
}
} /* Opcode is finalised at this point for all parallel instructions. */
} /* Opcode is finalised at this point for all parallel instructions. */
{ /* Output opcode */
char *p;
p = frag_more (INSN_SIZE);
@ -1303,7 +1303,7 @@ tic30_operand (token)
if (*(token + count) == '(')
{
/* Parenthesis found, so check if a displacement value is inside. If so, get
the value and remove it from the buffer. */
the value and remove it from the buffer. */
if (is_digit_char (*(token + count + 1)))
{
char disp[10];
@ -1543,7 +1543,7 @@ tic30_find_parallel_insn (current_line, next_line)
#undef END_OPERANDS
/* In order to get gas to ignore any | chars at the start of a line,
this function returns true if a | is found in a line. */
this function returns true if a | is found in a line. */
int
tic30_unrecognized_line (c)
@ -1588,7 +1588,7 @@ md_apply_fix (fixP, valP)
char *buf = fixP->fx_frag->fr_literal + fixP->fx_where;
value /= INSN_SIZE;
if (fixP->fx_size == 1)
{ /* Special fix for LDP instruction. */
{ /* Special fix for LDP instruction. */
value = (value & 0x00FF0000) >> 16;
}
debug ("new value = %ld\n", (long) value);
@ -1650,7 +1650,7 @@ md_pcrel_from (fixP)
debug ("fx_size = %d\n", fixP->fx_size);
/* Find the opcode that represents the current instruction in the fr_literal
storage area, and check bit 21. Bit 21 contains whether the current instruction
is a delayed one or not, and then set the offset value appropriately. */
is a delayed one or not, and then set the offset value appropriately. */
if (fixP->fx_frag->fr_literal[fixP->fx_where - fixP->fx_size + 1] & 0x20)
offset = 3;
else

View File

@ -1,5 +1,5 @@
/* tc-tic30.h -- Header file for tc-tic30.c
Copyright (C) 1998 Free Software Foundation.
Copyright (C) 1998, 2000 Free Software Foundation.
Contributed by Steven Haworth (steve@pm.cse.rmit.edu.au)
This file is part of GAS, the GNU Assembler.
@ -45,7 +45,7 @@ char *output_invalid PARAMS ((int c));
/* Define this to 1 if you want the debug output to be on stdout,
otherwise stderr will be used. If stderr is used, there will be a
better synchronisation with the as_bad outputs, but you can't
capture the output. */
capture the output. */
#define USE_STDOUT 0
#define tc_unrecognized_line tic30_unrecognized_line

View File

@ -149,7 +149,7 @@ static symbolS *last_label_seen = NULL;
/* This ensures that all new labels are unique. */
static int local_label_id;
static struct hash_control *subsym_recurse_hash; /* Prevent infinite recurse. */
static struct hash_control *subsym_recurse_hash; /* Prevent infinite recurse. */
static struct hash_control *math_hash; /* Built-in math functions. */
/* Allow maximum levels of macro nesting; level 0 is the main substitution
symbol table. The other assembler only does 32 levels, so there! */
@ -1595,7 +1595,7 @@ tic54x_stringer (type)
md_flush_pending_output ();
#endif
c = ','; /* Do loop. */
c = ','; /* Do loop. */
while (c == ',')
{
SKIP_WHITESPACE ();

View File

@ -23,7 +23,7 @@
#define _TC_TIC54X_H_
/* select the proper coff format (see obj-coff.h) */
#define TC_TIC54X
#define TC_TIC54X
#define TARGET_BYTES_BIG_ENDIAN 0
#define OCTETS_PER_BYTE_POWER 1
@ -36,19 +36,19 @@
#define MAX_OPERANDS 4
#define PARALLEL_SEPARATOR '|'
#define LABELS_WITHOUT_COLONS 1
/* accept 0FFFFh, 1010b, etc. */
/* accept 0FFFFh, 1010b, etc. */
#define NUMBERS_WITH_SUFFIX 1
/* $ is section program counter */
#define DOLLAR_DOT 1
/* accept parallel lines like
add #1,a || ld #1, b
add #1,a || ld #1, b
(may also be split across lines)
*/
#define DOUBLEBAR_PARALLEL 1
/* affects preprocessor */
#define KEEP_WHITE_AROUND_COLON 1
/* We need the extra field in the fixup struct to put the relocation in. */
/* We need the extra field in the fixup struct to put the relocation in. */
#define NEED_FX_R_TYPE
@ -101,7 +101,7 @@ extern void tic54x_macro_info PARAMS((void *macro));
#define tc_frob_label(sym) tic54x_define_label (sym)
extern void tic54x_define_label PARAMS((symbolS *));
#define md_start_line_hook() tic54x_start_line_hook()
#define md_start_line_hook() tic54x_start_line_hook()
extern void tic54x_start_line_hook ();
#define md_estimate_size_before_relax(f,s) \
@ -114,11 +114,11 @@ extern int tic54x_relax_frag(fragS *, long);
#define md_convert_frag(b,s,f) tic54x_convert_frag(b,s,f)
extern void tic54x_convert_frag(bfd *, segT, fragS *);
/* Other things we don't support... */
/* Other things we don't support... */
/* Define away the call to md_operand in the expression parsing code.
This is called whenever the expression parser can't parse the input
and gives the assembler backend a chance to deal with it instead. */
and gives the assembler backend a chance to deal with it instead. */
#define md_operand(X)

View File

@ -1,5 +1,5 @@
/* tc-tic80.c -- Assemble for the TI TMS320C80 (MV)
Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc.
Copyright (C) 1996, 1997, 1998, 1999, 2000 Free Software Foundation, Inc.
This file is part of GAS, the GNU Assembler.
@ -789,7 +789,7 @@ md_assemble (str)
str++;
/* Isolate the mnemonic from the rest of the string by finding the first
whitespace character and zapping it to a null byte. */
whitespace character and zapping it to a null byte. */
for (scan = str; *scan != '\000' && !isspace (*scan); scan++)
;

View File

@ -1,5 +1,5 @@
/* This file is tc-tic80.h
Copyright (C) 1996, 1997, 1999 Free Software Foundation, Inc.
Copyright (C) 1996, 1997, 1999, 2000 Free Software Foundation, Inc.
This file is part of GAS, the GNU Assembler.
@ -26,19 +26,19 @@
#define TARGET_FORMAT "coff-tic80"
#define BFD_ARCH TARGET_ARCH
/* We need the extra field in the fixup struct to put the relocation in. */
/* We need the extra field in the fixup struct to put the relocation in. */
#define NEED_FX_R_TYPE
/* Define md_number_to_chars as the appropriate standard big endian or
little endian function. Should we someday support endianness as a
runtime decision, this will need to change. */
runtime decision, this will need to change. */
#define md_number_to_chars number_to_chars_littleendian
/* Define away the call to md_operand in the expression parsing code.
This is called whenever the expression parser can't parse the input
and gives the assembler backend a chance to deal with it instead. */
and gives the assembler backend a chance to deal with it instead. */
#define md_operand(x)
@ -59,5 +59,3 @@
extern short tc_coff_fix2rtype ();
#endif /* OBJ_COFF */
/* end of tc-tic80.h */