* ChangeLog, Makefile.in, configure, configure.in, v850_sim.h,

gencode.c, interp.c, simops.c: Created.
So we've got something to hack on.
This commit is contained in:
Jeff Law 1996-08-29 01:06:42 +00:00
parent 085114ca36
commit 22c1c7ddea
8 changed files with 1274 additions and 0 deletions

39
sim/v850/.Sanitize Normal file
View File

@ -0,0 +1,39 @@
# .Sanitize for devo/sim/v850.
# Each directory to survive its way into a release will need a file
# like this one called "./.Sanitize". All keyword lines must exist,
# and must exist in the order specified by this file. Each directory
# in the tree will be processed, top down, in the following order.
# Hash started lines like this one are comments and will be deleted
# before anything else is done. Blank lines will also be squashed
# out.
# The lines between the "Do-first:" line and the "Things-to-keep:"
# line are executed as a /bin/sh shell script before anything else is
# done in this directory.
Do-first:
# All files listed between the "Things-to-keep:" line and the
# "Files-to-sed:" line will be kept. All other files will be removed.
# Directories listed in this section will have their own Sanitize
# called. Directories not listed will be removed in their entirety
# with rm -rf.
Things-to-keep:
ChangeLog
Makefile.in
configure
configure.in
v850_sim.h
gencode.c
interp.c
simops.c
Things-to-lose:
Do-last:
# End of file.

5
sim/v850/ChangeLog Normal file
View File

@ -0,0 +1,5 @@
Wed Aug 28 13:53:22 1996 Jeffrey A Law (law@cygnus.com)
* ChangeLog, Makefile.in, configure, configure.in, v850_sim.h,
gencode.c, interp.c, simops.c: Created.

149
sim/v850/Makefile.in Normal file
View File

@ -0,0 +1,149 @@
# Makefile template for Configure for the V850 sim library.
# Copyright (C) 1990, 1991, 1992, 1995 Free Software Foundation, Inc.
# Written by Cygnus Support.
#
# This program is free software; you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
# the Free Software Foundation; either version 2 of the License, or
# (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
VPATH = @srcdir@:@srcdir@/../common:@srcdir@/../../gdb/
srcdir = @srcdir@
srcroot = $(srcdir)/../..
prefix = @prefix@
exec_prefix = @exec_prefix@
host_alias = @host_alias@
target_alias = @target_alias@
program_transform_name = @program_transform_name@
bindir = @bindir@
libdir = @libdir@
tooldir = $(libdir)/$(target_alias)
datadir = @datadir@
mandir = @mandir@
man1dir = $(mandir)/man1
man2dir = $(mandir)/man2
man3dir = $(mandir)/man3
man4dir = $(mandir)/man4
man5dir = $(mandir)/man5
man6dir = $(mandir)/man6
man7dir = $(mandir)/man7
man8dir = $(mandir)/man8
man9dir = $(mandir)/man9
infodir = @infodir@
includedir = @includedir@
SHELL = /bin/sh
INSTALL = $(srcroot)/install.sh -c
INSTALL_PROGRAM = @INSTALL_PROGRAM@
INSTALL_DATA = @INSTALL_DATA@
INSTALL_XFORM = $(INSTALL) -t='$(program_transform_name)'
INSTALL_XFORM1= $(INSTALL_XFORM) -b=.1
AR = @AR@
AR_FLAGS = rc
CC = @CC@
CFLAGS = @CFLAGS@
MAKEINFO = makeinfo
RANLIB = @RANLIB@
CC_FOR_BUILD = @CC_FOR_BUILD@
HDEFINES = @HDEFINES@
TDEFINES =
.NOEXPORT:
MAKEOVERRIDES=
X=xstuff.o
XL=-lX11
X=
XL=
INCDIR = $(srcdir)/../../include
CSEARCH = -I. -I$(srcdir) -I../../include \
-I../../bfd -I$(INCDIR) -I$(srcdir)/../../bfd -I$(srcdir)/../../gdb -I$(srcdir)/../../newlib/libc/sys/sh
DEP = mkdep
all: run libsim.a
run: interp.o $(X) run.o table.o callback.o simops.o
$(CC) $(CFLAGS) -o run $(X) interp.o table.o callback.o simops.o run.o ../../bfd/libbfd.a ../../libiberty/libiberty.a $(XL) -lm
interp.o:interp.c table.c
run.o:run.c
libsim.a:interp.o table.o simops.o
$(AR) $(ARFLAGS) libsim.a interp.o table.o simops.o
$(RANLIB) libsim.a
simops.h: gencode
./gencode -h >$@
table.c: gencode simops.h
./gencode >$@
gencode: gencode.c ../../opcodes/libopcodes.a
$(CC) $(CFLAGS) $(HDEFINES) $(TDEFINES) $(CSEARCH) $(CSWITCHE) -o gencode $(srcdir)/gencode.c ../../opcodes/libopcodes.a -lc
.c.o:
$(CC) -c -DINSIDE_SIMULATOR $(CFLAGS) $(HDEFINES) $(TDEFINES) $(CSEARCH) $(CSWITCHES) $<
check:
info:
clean-info:
install-info:
tags etags: TAGS
TAGS: force
etags $(INCDIR)/*.h $(srcdir)/*.h $(srcdir)/*.c
clean:
rm -f *.[oa] *~ core *.E *.p *.ip aout-params.h gen-aout
rm -f run table.c simops.h gencode libsim.a
distclean mostlyclean maintainer-clean realclean: clean
rm -f TAGS
rm -f Makefile config.cache config.log config.status
# Dummy target to force execution of dependent targets.
#
force:
# Copy the files into directories where they will be run.
install:
$(INSTALL_XFORM) run $(bindir)/run
install-man: run.1
$(INSTALL_XFORM1) $(srcdir)/run.1 $(man1dir)/run.1
Makefile: Makefile.in config.status
$(SHELL) ./config.status
config.status: configure
$(SHELL) ./config.status --recheck
dep: $(CFILES)
mkdep $(CFLAGS) $?
# What appears below is generated by a hacked mkdep using gcc -MM.
# DO NOT DELETE THIS LINE -- mkdep uses it.
# DO NOT PUT ANYTHING AFTER THIS LINE, IT WILL GO AWAY.
# IF YOU PUT ANYTHING HERE IT WILL GO AWAY

29
sim/v850/configure.in Normal file
View File

@ -0,0 +1,29 @@
dnl Process this file with autoconf to produce a configure script.
AC_PREREQ(2.5)dnl
AC_INIT(Makefile.in)
AC_CONFIG_AUX_DIR(`cd $srcdir;pwd`/../..)
AC_CANONICAL_SYSTEM
AC_ARG_PROGRAM
AC_PROG_CC
AC_PROG_INSTALL
AC_C_BIGENDIAN
. ${srcdir}/../../bfd/configure.host
AC_SUBST(CFLAGS)
AC_SUBST(HDEFINES)
AR=${AR-ar}
AC_SUBST(AR)
AC_PROG_RANLIB
# Put a plausible default for CC_FOR_BUILD in Makefile.
AC_C_CROSS
if test "x$cross_compiling" = "xno"; then
CC_FOR_BUILD='$(CC)'
else
CC_FOR_BUILD=gcc
fi
AC_SUBST(CC_FOR_BUILD)
AC_OUTPUT(Makefile)

144
sim/v850/gencode.c Normal file
View File

@ -0,0 +1,144 @@
#include "v850_sim.h"
static void write_header PARAMS ((void));
static void write_opcodes PARAMS ((void));
static void write_template PARAMS ((void));
int
main (argc, argv)
int argc;
char *argv[];
{
if ((argc > 1) && (strcmp (argv[1],"-h") == 0))
write_header();
else if ((argc > 1) && (strcmp (argv[1],"-t") == 0))
write_template ();
else
write_opcodes();
return 0;
}
static void
write_header ()
{
struct v850_opcode *opcode;
for (opcode = (struct v850_opcode *)v850_opcodes; opcode->name; opcode++)
printf("void OP_%X PARAMS ((void));\t\t/* %s */\n",opcode->opcode, opcode->name);
}
/* write_template creates a file all required functions, ready */
/* to be filled out */
static void
write_template ()
{
struct v850_opcode *opcode;
int i,j;
printf ("#include \"v850_sim.h\"\n");
printf ("#include \"simops.h\"\n");
for (opcode = (struct v850_opcode *)v850_opcodes; opcode->name; opcode++)
{
printf("/* %s */\nvoid\nOP_%X ()\n{\n",opcode->name,opcode->opcode);
/* count operands */
j = 0;
for (i = 0; i < 6; i++)
{
int flags = v850_operands[opcode->operands[i]].flags;
if (flags & (V850_OPERAND_REG | V850_OPERAND_SRG | V850_OPERAND_CC))
j++;
}
switch (j)
{
case 0:
printf ("printf(\" %s\\n\");\n",opcode->name);
break;
case 1:
printf ("printf(\" %s\\t%%x\\n\",OP[0]);\n",opcode->name);
break;
case 2:
printf ("printf(\" %s\\t%%x,%%x\\n\",OP[0],OP[1]);\n",opcode->name);
break;
case 3:
printf ("printf(\" %s\\t%%x,%%x,%%x\\n\",OP[0],OP[1],OP[2]);\n",opcode->name);
break;
default:
fprintf (stderr,"Too many operands: %d\n",j);
}
printf ("}\n\n");
}
}
long Opcodes[512];
static int curop=0;
check_opcodes( long op)
{
int i;
for (i=0;i<curop;i++)
if (Opcodes[i] == op)
fprintf(stderr,"DUPLICATE OPCODES: %x\n",op);
}
static void
write_opcodes ()
{
struct v850_opcode *opcode;
int i, j;
/* write out opcode table */
printf ("#include \"v850_sim.h\"\n");
printf ("#include \"simops.h\"\n\n");
printf ("struct simops Simops[] = {\n");
for (opcode = (struct v850_opcode *)v850_opcodes; opcode->name; opcode++)
{
printf (" { %ld,%ld,OP_%X,",
opcode->opcode, opcode->mask, opcode->opcode);
/* REMOVE ME */
check_opcodes (opcode->opcode);
Opcodes[curop++] = opcode->opcode;
/* count operands */
j = 0;
for (i = 0; i < 6; i++)
{
int flags = v850_operands[opcode->operands[i]].flags;
if (flags & (V850_OPERAND_REG | V850_OPERAND_SRG | V850_OPERAND_CC))
j++;
}
printf ("%d,{",j);
j = 0;
for (i = 0; i < 6; i++)
{
int flags = v850_operands[opcode->operands[i]].flags;
int shift = v850_operands[opcode->operands[i]].shift;
if (flags & (V850_OPERAND_REG | V850_OPERAND_SRG | V850_OPERAND_CC))
{
if (j)
printf (", ");
#if 0
if ((flags & OPERAND_REG) && (opcode->format == LONG_L))
shift += 15;
#endif
printf ("%d,%d,%d",shift,v850_operands[opcode->operands[i]].bits,flags);
j = 1;
}
}
printf ("}},\n");
}
printf ("{ 0,0,NULL,0,{ }},\n};\n");
}

423
sim/v850/interp.c Normal file
View File

@ -0,0 +1,423 @@
#include <signal.h>
#include "sysdep.h"
#include "bfd.h"
#include "remote-sim.h"
#include "callback.h"
#include "v850_sim.h"
#define IMEM_SIZE 18 /* V850 instruction memory size is 18 bits */
#define DMEM_SIZE 16 /* Data memory */
uint16 OP[4];
static struct hash_entry *lookup_hash PARAMS ((uint32 ins));
#define MAX_HASH 63
struct hash_entry
{
struct hash_entry *next;
long opcode;
long mask;
struct simops *ops;
};
struct hash_entry hash_table[MAX_HASH+1];
static long
hash(insn)
long insn;
{
/* XXX This isn't right for 32bit opcodes, hell it isn't even
right for 16bit opcodes! */
if (insn & 0x0600)
return ((insn & 0x3F000000) >> 24);
else
return((insn & 0x07E0) >> 5);
}
static struct hash_entry *
lookup_hash (ins)
uint32 ins;
{
struct hash_entry *h;
if (ins & 0x0f00)
h = &hash_table[(ins & 0x3F000000) >> 24];
else
h = &hash_table[(ins & 0x07E0) >> 5];
while ( (ins & h->mask) != h->opcode)
{
if (h->next == NULL)
{
printf ("ERROR looking up hash for %x\n",ins);
exit(1);
}
h = h->next;
}
return (h);
}
uint32
get_longword_swap (x)
uint16 x;
{
uint8 *a = (uint8 *)(x + State.imem);
return (a[0]<<24) + (a[1]<<16) + (a[2]<<8) + (a[3]);
}
uint16
get_word_swap (x)
uint16 x;
{
uint8 *a = (uint8 *)(x + State.imem);
return (a[0]<<8) + a[1];
}
void
write_word_swap (addr, data)
uint16 addr, data;
{
uint8 *a = (uint8 *)(addr + State.imem);
a[0] = data >> 8;
a[1] = data & 0xff;
}
static void
do_format_1 (insn)
uint32 insn;
{
printf("format 1 0x%x\n", insn >> 16);
}
static void
do_format_2 (insn)
uint32 insn;
{
printf("format 2 0x%x\n", insn >> 16);
}
static void
do_format_3 (insn)
uint32 insn;
{
printf("format 3 0x%x\n", insn >> 16);
}
static void
do_format_4 (insn)
uint32 insn;
{
printf("format 4 0x%x\n", insn >> 16);
}
static void
do_format_5 (insn)
uint32 insn;
{
printf("format 5 0x%x\n", insn);
}
static void
do_format_6 (insn)
uint32 insn;
{
printf("format 6 0x%x\n", insn);
}
static void
do_format_7 (insn)
uint32 insn;
{
printf("format 7 0x%x\n", insn);
}
static void
do_format_8 (insn)
uint32 insn;
{
printf("format 8 0x%x\n", insn);
}
static void
do_formats_9_10 (insn)
uint32 insn;
{
printf("formats 9 and 10 0x%x\n", insn);
}
void
sim_size (power)
int power;
{
if (State.imem)
{
free (State.imem);
free (State.dmem);
}
State.imem = (uint8 *)calloc(1,1<<IMEM_SIZE);
State.dmem = (uint8 *)calloc(1,1<<DMEM_SIZE);
if (!State.imem || !State.dmem )
{
fprintf (stderr,"Memory allocation failed.\n");
exit(1);
}
printf ("Allocated %d bytes instruction memory and\n",1<<IMEM_SIZE);
printf (" %d bytes data memory.\n",1<<DMEM_SIZE);
}
static void
init_system ()
{
if (!State.imem)
sim_size(1);
}
int
sim_write (addr, buffer, size)
SIM_ADDR addr;
unsigned char *buffer;
int size;
{
int i;
init_system ();
/* printf ("sim_write %d bytes to 0x%x\n",size,addr); */
for (i = 0; i < size; i++)
{
State.imem[i+addr] = buffer[i];
}
return size;
}
void
sim_open (args)
char *args;
{
struct simops *s;
struct hash_entry *h, *prev;
if (args != NULL)
printf ("sim_open %s\n",args);
/* put all the opcodes in the hash table */
for (s = Simops; s->func; s++)
{
h = &hash_table[hash(s->opcode)];
/* go to the last entry in the chain */
while (h->next)
h = h->next;
if (h->ops)
{
h->next = calloc(1,sizeof(struct hash_entry));
h = h->next;
}
h->ops = s;
h->mask = s->mask;
h->opcode = s->opcode;
}
}
void
sim_close (quitting)
int quitting;
{
/* nothing to do */
}
void
sim_set_profile (n)
int n;
{
printf ("sim_set_profile %d\n",n);
}
void
sim_set_profile_size (n)
int n;
{
printf ("sim_set_profile_size %d\n",n);
}
void
sim_resume (step, siggnal)
int step, siggnal;
{
uint32 inst, opcode;
int i;
reg_t oldpc;
/* printf ("sim_resume (%d,%d) PC=0x%x\n",step,siggnal,PC); */
if (step)
State.exception = SIGTRAP;
else
State.exception = 0;
do
{
inst = RLW (PC);
oldpc = PC;
opcode = (inst & 0x07e00000) >> 21;
if ((opcode & 0x30) == 0)
{
do_format_1 (inst >> 16);
PC += 2;
}
else if ((opcode & 0x38) == 0x10)
{
do_format_2 (inst >> 16);
PC += 2;
}
else if ((opcode & 0x3C) == 0x18
|| (opcode & 0x3C) == 0x1C
|| (opcode & 0x3C) == 0x20
|| (opcode & 0x3C) == 0x24
|| (opcode & 0x3C) == 0x28)
{
do_format_4 (inst >> 16);
PC += 2;
}
else if ((opcode& 0x3C) == 0x23)
{
do_format_3 (inst >> 16);
PC += 2;
}
else if ((opcode & 0x38) == 0x30)
{
do_format_6 (inst);
PC += 4;
}
else if ((opcode & 0x3C) == 0x38)
{
do_format_7 (inst);
PC += 4;
}
else if ((opcode & 0x3E) == 0x3C)
{
do_format_5 (inst);
PC += 4;
}
else if ((opcode & 0x3E) == 0x3C)
{
do_format_8 (inst);
PC += 4;
}
else
{
do_formats_9_10 (inst);
PC += 4;
}
}
while (!State.exception);
}
int
sim_trace ()
{
printf ("sim_trace\n");
return 0;
}
void
sim_info (verbose)
int verbose;
{
printf ("sim_info\n");
}
void
sim_create_inferior (start_address, argv, env)
SIM_ADDR start_address;
char **argv;
char **env;
{
printf ("sim_create_inferior: PC=0x%x\n",start_address);
PC = start_address;
}
void
sim_kill ()
{
/* nothing to do */
}
void
sim_set_callbacks(p)
host_callback *p;
{
printf ("sim_set_callbacks\n");
/* callback = p; */
}
void
sim_stop_reason (reason, sigrc)
enum sim_stop *reason;
int *sigrc;
{
/* printf ("sim_stop_reason: PC=0x%x\n",PC); */
if (State.exception == SIGQUIT)
{
*reason = sim_exited;
*sigrc = State.exception;
}
else
{
*reason = sim_stopped;
*sigrc = State.exception;
}
}
void
sim_fetch_register (rn, memory)
int rn;
unsigned char *memory;
{
*(uint32 *)memory = State.regs[rn];
/* printf ("sim_fetch_register %d 0x%x\n",rn,State.regs[rn]); */
}
void
sim_store_register (rn, memory)
int rn;
unsigned char *memory;
{
State.regs[rn]= *(uint32 *)memory;
/* printf ("store: r%d=0x%x\n",rn,State.regs[rn]); */
}
sim_read (addr, buffer, size)
SIM_ADDR addr;
unsigned char *buffer;
int size;
{
int i;
for (i = 0; i < size; i++)
{
buffer[i] = State.imem[addr + i];
}
return size;
}
void
sim_do_command (cmd)
char *cmd;
{
printf("sim_do_command: %s\n",cmd);
}
int
sim_load (prog, from_tty)
char *prog;
int from_tty;
{
/* Return nonzero so GDB will handle it. */
return 1;
}

374
sim/v850/simops.c Normal file
View File

@ -0,0 +1,374 @@
#include <signal.h>
#include "v850_sim.h"
#include "simops.h"
void
OP_1A0 ()
{
}
void
OP_280 ()
{
}
void
OP_220 ()
{
}
void
OP_10760 ()
{
}
void
OP_C7C0 ()
{
}
void
OP_760 ()
{
}
void
OP_6A0 ()
{
}
void
OP_580 ()
{
}
void
OP_700 ()
{
}
void
OP_581 ()
{
}
void
OP_40 ()
{
}
void
OP_582 ()
{
}
void
OP_583 ()
{
}
void
OP_584 ()
{
}
void
OP_585 ()
{
}
void
OP_586 ()
{
}
void
OP_587 ()
{
}
void
OP_588 ()
{
}
void
OP_589 ()
{
}
void
OP_58A ()
{
}
void
OP_58B ()
{
}
void
OP_58C ()
{
}
void
OP_400 ()
{
}
void
OP_2E0 ()
{
}
void
OP_160 ()
{
}
void
OP_58D ()
{
}
void
OP_58E ()
{
}
void
OP_58F ()
{
}
void
OP_660 ()
{
}
void
OP_100 ()
{
}
void
OP_E0 ()
{
}
void
OP_16087E0 ()
{
}
void
OP_16007E0 ()
{
}
void
OP_600 ()
{
}
void
OP_1C0 ()
{
}
void
OP_8007E0 ()
{
}
void
OP_C007E0 ()
{
}
void
OP_12007E0 ()
{
}
void
OP_240 ()
{
}
void
OP_4007E0 ()
{
}
void
OP_10720 ()
{
}
void
OP_780 ()
{
}
void
OP_6C0 ()
{
}
void
OP_720 ()
{
}
void
OP_60 ()
{
}
void
OP_2A0 ()
{
}
void
OP_87C0 ()
{
}
void
OP_180 ()
{
}
void
OP_300 ()
{
}
void
OP_0 ()
{
}
void
OP_680 ()
{
}
void
OP_7C0 ()
{
}
void
OP_120 ()
{
}
void
OP_1687E0 ()
{
}
void
OP_620 ()
{
}
void
OP_1E0 ()
{
}
void
OP_A0 ()
{
}
void
OP_260 ()
{
}
void
OP_200 ()
{
}
void
OP_6E0 ()
{
}
void
OP_740 ()
{
}
void
OP_80 ()
{
}
void
OP_14007E0 ()
{
}
void
OP_20 ()
{
}
void
OP_A007E0 ()
{
}
void
OP_500 ()
{
}
void
OP_2C0 ()
{
}
void
OP_10007E0 ()
{
}
void
OP_47C0 ()
{
}
void
OP_2007E0 ()
{
}
void
OP_7E0 ()
{
}
void
OP_140 ()
{
}
void
OP_640 ()
{
}
void
OP_C0 ()
{
}

111
sim/v850/v850_sim.h Normal file
View File

@ -0,0 +1,111 @@
#include <stdio.h>
#include <ctype.h>
#include "ansidecl.h"
#include "opcode/v850.h"
/* FIXME: host defines */
typedef unsigned char uint8;
typedef unsigned short uint16;
typedef unsigned int uint32;
typedef signed char int8;
typedef signed short int16;
typedef signed int int32;
typedef signed long long int64;
/* FIXME: V850 defines */
typedef uint16 reg_t;
struct simops
{
long opcode;
long mask;
void (*func)();
int numops;
int operands[9];
};
struct _state
{
reg_t regs[16]; /* general-purpose registers */
reg_t cregs[16]; /* control registers */
int64 a[2]; /* accumulators */
uint8 SM;
uint8 EA;
uint8 DB;
uint8 IE;
uint8 RP;
uint8 MD;
uint8 FX;
uint8 ST;
uint8 F0;
uint8 F1;
uint8 C;
uint8 exe;
uint8 *imem;
uint8 *dmem;
int exception;
} State;
extern uint16 OP[4];
extern struct simops Simops[];
#define PC (State.cregs[2])
#define PSW (State.cregs[0])
#define BPSW (State.cregs[1])
#define BPC (State.cregs[3])
#define RPT_C (State.cregs[7])
#define RPT_S (State.cregs[8])
#define RPT_E (State.cregs[9])
#define MOD_S (State.cregs[10])
#define MOD_E (State.cregs[11])
#define IBA (State.cregs[14])
#define SEXT3(x) ((((x)&0x7)^(~3))+4)
/* sign-extend a 4-bit number */
#define SEXT4(x) ((((x)&0xf)^(~7))+8)
/* sign-extend an 8-bit number */
#define SEXT8(x) ((((x)&0xff)^(~0x7f))+0x80)
/* sign-extend a 16-bit number */
#define SEXT16(x) ((((x)&0xffff)^(~0x7fff))+0x8000)
/* sign-extend a 32-bit number */
#define SEXT32(x) ((((x)&0xffffffffLL)^(~0x7fffffffLL))+0x80000000LL)
/* sign extend a 40 bit number */
#define SEXT40(x) ((((x)&0xffffffffffLL)^(~0x7fffffffffLL))+0x8000000000LL)
/* sign extend a 44 bit number */
#define SEXT44(x) ((((x)&0xfffffffffffLL)^(~0x7ffffffffffLL))+0x80000000000LL)
/* sign extend a 60 bit number */
#define SEXT60(x) ((((x)&0xfffffffffffffffLL)^(~0x7ffffffffffffffLL))+0x800000000000000LL)
#define MAX32 0x7fffffffLL
#define MIN32 0xff80000000LL
#define MASK32 0xffffffffLL
#define MASK40 0xffffffffffLL
#define INC_ADDR(x,i) x = ((State.MD && x == MOD_E) ? MOD_S : (x)+(i))
#define RB(x) (*((uint8 *)((x)+State.imem)))
#define SB(addr,data) ( RB(addr) = (data & 0xff))
#ifdef WORDS_BIGENDIAN
#define RW(x) (*((uint16 *)((x)+State.imem)))
#define RLW(x) (*((uint32 *)((x)+State.imem)))
#define SW(addr,data) RW(addr)=data
#else
uint32 get_longword_swap PARAMS ((uint16 x));
uint16 get_word_swap PARAMS ((uint16 x));
void write_word_swap PARAMS ((uint16 addr, uint16 data));
#define SW(addr,data) write_word_swap(addr,data)
#define RW(x) get_word_swap(x)
#define RLW(x) get_longword_swap(x)
#endif /* not WORDS_BIGENDIAN */