diff --git a/binutils/ChangeLog b/binutils/ChangeLog index 50425c7534..7ba4560634 100644 --- a/binutils/ChangeLog +++ b/binutils/ChangeLog @@ -1,3 +1,8 @@ +2016-03-21 Andrew Burgess + + * testsuite/binutils-all/objdump.exp (cpus_expected): Add ARC700 + to the architecture list. + 2016-03-21 Nick Clifton * dlltool.c: Replace use of alloca with call to xmalloc. diff --git a/binutils/testsuite/binutils-all/objdump.exp b/binutils/testsuite/binutils-all/objdump.exp index 22c4686159..3573037b27 100644 --- a/binutils/testsuite/binutils-all/objdump.exp +++ b/binutils/testsuite/binutils-all/objdump.exp @@ -34,7 +34,7 @@ send_user "Version [binutil_version $OBJDUMP]" set got [binutils_run $OBJDUMP "$OBJDUMPFLAGS -i"] set cpus_expected [list] -lappend cpus_expected aarch64 alpha arc ARCv2 arm cris +lappend cpus_expected aarch64 alpha arc ARC700 ARCv2 arm cris lappend cpus_expected d10v d30v fr30 fr500 fr550 h8 hppa i386 i860 i960 iamcu ip2022 lappend cpus_expected m16c m32c m32r m68hc11 m68hc12 m68k m88k MCore mep c5 h1 MicroBlaze lappend cpus_expected mips mn10200 mn10300 ms1 msp MSP430 nds32 n1h_v3 ns32k diff --git a/gas/ChangeLog b/gas/ChangeLog index 55e2995853..a4d9b6740e 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,15 @@ +2016-03-21 Andrew Burgess + + * config/tc-arc.c (arc_target): Delay initialisation until + arc_select_cpu. + (arc_target_name): Likewise. + (arc_features): Likewise. + (arc_mach_type): Likewise. + (cpu_types): Remove "all" entry. + (arc_select_cpu): New function, most of the content is from... + (md_parse_option): ... here. Call new arc_select_cpu. + (md_begin): Call arc_select_cpu if needed, default is now arc700. + 2016-03-21 Andrew Burgess * testsuite/gas/arc/inline-data-1.d: Add target restriction. diff --git a/gas/config/tc-arc.c b/gas/config/tc-arc.c index 1431e6d56f..5633905425 100644 --- a/gas/config/tc-arc.c +++ b/gas/config/tc-arc.c @@ -311,12 +311,12 @@ static void assemble_insn const struct arc_flags *, int, struct arc_insn *); /* The cpu for which we are generating code. */ -static unsigned arc_target = ARC_OPCODE_BASE; -static const char *arc_target_name = ""; -static unsigned arc_features = 0x00; +static unsigned arc_target; +static const char *arc_target_name; +static unsigned arc_features; /* The default architecture. */ -static int arc_mach_type = bfd_mach_arc_arcv2; +static int arc_mach_type; /* Non-zero if the cpu type has been explicitly specified. */ static int mach_type_specified_p = 0; @@ -346,8 +346,6 @@ static const struct cpu_type EF_ARC_CPU_ARCV2EM, ARC_CD}, { "archs", ARC_OPCODE_ARCv2HS, bfd_mach_arc_arcv2, EF_ARC_CPU_ARCV2HS, ARC_CD}, - { "all", ARC_OPCODE_BASE, bfd_mach_arc_arcv2, - 0x00, 0x00 }, { 0, 0, 0, 0, 0 } }; @@ -569,6 +567,35 @@ md_number_to_chars_midend (char *buf, valueT val, int n) } } +/* Select an appropriate entry from CPU_TYPES based on ARG and initialise + the relevant static global variables. */ + +static void +arc_select_cpu (const char *arg) +{ + int cpu_flags = EF_ARC_CPU_GENERIC; + int i; + + for (i = 0; cpu_types[i].name; ++i) + { + if (!strcasecmp (cpu_types[i].name, arg)) + { + arc_target = cpu_types[i].flags; + arc_target_name = cpu_types[i].name; + arc_features = cpu_types[i].features; + arc_mach_type = cpu_types[i].mach; + cpu_flags = cpu_types[i].eflags; + break; + } + } + + if (!cpu_types[i].name) + as_fatal (_("unknown architecture: %s\n"), arg); + + if (cpu_flags != EF_ARC_CPU_GENERIC) + arc_eflag = (arc_eflag & ~EF_ARC_MACH_MSK) | cpu_flags; +} + /* Here ends all the ARCompact extension instruction assembling stuff. */ @@ -2088,6 +2115,9 @@ md_begin (void) { unsigned int i; + if (!mach_type_specified_p) + arc_select_cpu ("arc700"); + /* The endianness can be chosen "at the factory". */ target_big_endian = byte_order == BIG_ENDIAN; @@ -2874,8 +2904,6 @@ arc_parse_name (const char *name, int md_parse_option (int c, char *arg ATTRIBUTE_UNUSED) { - int cpu_flags = EF_ARC_CPU_GENERIC; - switch (c) { case OPTION_ARC600: @@ -2893,36 +2921,8 @@ md_parse_option (int c, char *arg ATTRIBUTE_UNUSED) case OPTION_MCPU: { - int i; - char *s = xmalloc (strlen (arg) + 1); - - { - char *t = s; - char *arg1 = arg; - - do - *t = TOLOWER (*arg1++); - while (*t++); - } - - for (i = 0; cpu_types[i].name; ++i) - { - if (strcmp (cpu_types[i].name, s) == 0) - { - arc_target = cpu_types[i].flags; - arc_target_name = cpu_types[i].name; - arc_features = cpu_types[i].features; - arc_mach_type = cpu_types[i].mach; - cpu_flags = cpu_types[i].eflags; - - mach_type_specified_p = 1; - break; - } - } - - if (!cpu_types[i].name) - as_fatal (_("unknown architecture: %s\n"), arg); - free (s); + arc_select_cpu (arg); + mach_type_specified_p = 1; break; } @@ -2976,9 +2976,6 @@ md_parse_option (int c, char *arg ATTRIBUTE_UNUSED) return 0; } - if (cpu_flags != EF_ARC_CPU_GENERIC) - arc_eflag = (arc_eflag & ~EF_ARC_MACH_MSK) | cpu_flags; - return 1; } diff --git a/include/ChangeLog b/include/ChangeLog index 3523a27ede..8b488240f0 100644 --- a/include/ChangeLog +++ b/include/ChangeLog @@ -1,3 +1,7 @@ +2016-03-21 Andrew Burgess + + * opcode/arc.h (ARC_OPCODE_BASE): Delete. + 2016-03-15 H.J. Lu PR ld/19807 diff --git a/include/opcode/arc.h b/include/opcode/arc.h index 6f5bc98f6a..d33b878c50 100644 --- a/include/opcode/arc.h +++ b/include/opcode/arc.h @@ -171,11 +171,6 @@ extern const unsigned arc_num_opcodes; #define ARC_XMAC 0x1000 #define ARC_CRC 0x1000 -/* Base architecture -- all cpus. */ -#define ARC_OPCODE_BASE \ - (ARC_OPCODE_ARC600 | ARC_OPCODE_ARC700 \ - | ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS) - /* A macro to check for short instructions. */ #define ARC_SHORT(mask) \ (((mask) & 0xFFFF0000) ? 0 : 1) diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 7a673e3412..d7180b3cfa 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,7 @@ +2016-03-21 Andrew Burgess + + * arc-opc.c (BASE): Delete. + 2016-03-18 Nick Clifton PR target/19721 diff --git a/opcodes/arc-opc.c b/opcodes/arc-opc.c index 9a674d5e9e..a4fdaffb45 100644 --- a/opcodes/arc-opc.c +++ b/opcodes/arc-opc.c @@ -642,9 +642,6 @@ extract_g_s (unsigned insn ATTRIBUTE_UNUSED, defines. */ #include "arc-fxi.h" -/* Abbreviations for instruction subsets. */ -#define BASE ARC_OPCODE_BASE - /* The flag operands table. The format of the table is