From 2f2e6c5d5bf76a01caa0d2da27ac21e45ee2276e Mon Sep 17 00:00:00 2001 From: Andrew Cagney Date: Tue, 27 May 1997 06:48:20 +0000 Subject: [PATCH] Extend xor-endian and per-cpu support in core module. Allow negated test when watching value within core. --- sim/common/ChangeLog | 46 +++++++++++++ sim/common/sim-events.c | 18 +++-- sim/common/sim-n-core.h | 14 ++-- sim/common/sim-options.c | 49 +++++++------ sim/common/sim-watch.h | 1 + sim/igen/ChangeLog | 4 ++ sim/igen/igen.h | 144 +++++++++++++++++++++++++++++++++++++++ sim/mips/ChangeLog | 10 +++ sim/mips/interp.c | 62 +++++++++-------- sim/tic80/ChangeLog | 5 ++ sim/tic80/sim-calls.c | 4 +- 11 files changed, 294 insertions(+), 63 deletions(-) create mode 100644 sim/igen/igen.h diff --git a/sim/common/ChangeLog b/sim/common/ChangeLog index 6421e70847..5c57fef680 100644 --- a/sim/common/ChangeLog +++ b/sim/common/ChangeLog @@ -1,3 +1,49 @@ +Tue May 27 14:32:00 1997 Andrew Cagney + + * sim-watch.c (schedule_watchpoint): Add is_within option so that + inequality test is possible. + (handle_watchpoint): Re-pass is_within arg. + (watch_option_handler): When `!' prefix to pc-watchpoint arg pass + 0 to schedule_watchpoint's is_within arg. + (sim_watchpoint_init): Re-pass is_within arg. + + * sim-options.c (sim_print_help): Add is_command argument. Don't + include -- prefix when called from the command line interpreter. + + * sim-watch.c (schedule_watchpoint): Pass true is_within argument. + + * sim-events.c (sim_events_watch_sim): Add is_within argument, + zero indicates that the test should be reversed. + (sim_events_watch_core): Ditto. + (WATCH_CORE): Compare range against is_within. + (WATCH_SIM): Ditto. + +Tue May 27 12:48:03 1997 Andrew Cagney + + * sim-events.c (WATCH_CORE): Pass NULL cpu argument to + sim_core_read_buffer. Check nr-bytes transfered. + + * sim-core.h (sim_core_common): Define a new struct that contains + the common data. to sd and cpu structures. + * sim-core.c (sim_core_attach): Update. + (sim_core_init): Update. Remember to copy initialized data to each + cpu. + (sim_core_find_mapping): Ditto. + + * sim-core.c (sim_core_read_buffer): Add cpu argument. + (sim_core_write_buffer): Ditto. + + * sim-n-core.h (sim_core_read_unaligned_N): When mis-aligned + transfer use xor version of read buffer. + (sim_core_write_unaligned_N): Ditto for write. + + * sim-core.c (sim_core_xor_read_buffer): New function implement + xor-endian data read breaking transfer up into xor-endian sized + blocks. + (sim_core_xor_write_buffer): Ditto for write. + (reverse_n): Reverse order of arbitrary number of bytes in buffer + - needed for xor-endian transfers. + Fri May 23 14:24:31 1997 Andrew Cagney * sim-inline.h: Review description. diff --git a/sim/common/sim-events.c b/sim/common/sim-events.c index 0053fbb890..3d2d005266 100644 --- a/sim/common/sim-events.c +++ b/sim/common/sim-events.c @@ -93,6 +93,7 @@ struct _sim_event { /* watch sim addr */ void *host_addr; /* watch core/sim range */ + int is_within; /* 0/1 */ unsigned ub; unsigned lb; unsigned64 ub64; @@ -474,6 +475,7 @@ sim_events_watch_sim (SIM_DESC sd, void *host_addr, int nr_bytes, int byte_order, + int is_within, unsigned64 lb, unsigned64 ub, sim_event_handler *handler, @@ -526,6 +528,7 @@ sim_events_watch_sim (SIM_DESC sd, new_event->lb64 = lb; new_event->ub = ub; new_event->ub64 = ub; + new_event->is_within = (is_within != 0); /* insert */ new_event->next = events->watchpoints; events->watchpoints = new_event; @@ -550,6 +553,7 @@ sim_events_watch_core (SIM_DESC sd, sim_core_maps core_map, int nr_bytes, int byte_order, + int is_within, unsigned64 lb, unsigned64 ub, sim_event_handler *handler, @@ -603,6 +607,7 @@ sim_events_watch_core (SIM_DESC sd, new_event->lb64 = lb; new_event->ub = ub; new_event->ub64 = ub; + new_event->is_within = (is_within != 0); /* insert */ new_event->next = events->watchpoints; events->watchpoints = new_event; @@ -672,10 +677,13 @@ sim_watch_valid (SIM_DESC sd, #define WATCH_CORE(N,OP,EXT) \ { \ - unsigned_##N word; \ - sim_core_read_buffer (sd, to_do->core_map, &word, to_do->core_addr, sizeof (word)); \ + unsigned_##N word = 0; \ + int nr_read = sim_core_read_buffer (sd, NULL, to_do->core_map, &word, to_do->core_addr, sizeof (word)); \ OP (word); \ - return (word >= to_do->lb##EXT && word <= to_do->ub##EXT); \ + return (nr_read == sizeof (unsigned_##N) \ + && (to_do->is_within \ + == (word >= to_do->lb##EXT \ + && word <= to_do->ub##EXT))); \ } case watch_core_targ_1: WATCH_CORE (1, T2H,); case watch_core_targ_2: WATCH_CORE (2, T2H,); @@ -697,7 +705,9 @@ sim_watch_valid (SIM_DESC sd, { \ unsigned_##N word = *(unsigned_##N*)to_do->host_addr; \ OP (word); \ - return (word >= to_do->lb##EXT && word <= to_do->ub##EXT); \ + return (to_do->is_within \ + == (word >= to_do->lb##EXT \ + && word <= to_do->ub##EXT)); \ } case watch_sim_host_1: WATCH_SIM (1, word = ,); diff --git a/sim/common/sim-n-core.h b/sim/common/sim-n-core.h index a0570e1f7c..614a32f5a8 100644 --- a/sim/common/sim-n-core.h +++ b/sim/common/sim-n-core.h @@ -43,7 +43,7 @@ sim_core_read_aligned_N(sim_cpu *cpu, unsigned_word xaddr) { sim_cpu_core *cpu_core = CPU_CORE (cpu); - sim_core *core = &cpu_core->common; + sim_core_common *core = &cpu_core->common; unsigned_N val; sim_core_mapping *mapping; address_word addr; @@ -106,8 +106,8 @@ sim_core_read_unaligned_N(sim_cpu *cpu, case NONSTRICT_ALIGNMENT: { unsigned_N val; - if (sim_core_read_buffer (CPU_STATE (cpu), map, &val, addr, - sizeof(unsigned_N)) + if (sim_core_xor_read_buffer (CPU_STATE (cpu), cpu, map, &val, addr, + sizeof(unsigned_N)) != sizeof(unsigned_N)) SIM_CORE_SIGNAL (CPU_STATE (cpu), cpu, cia, map, sizeof (unsigned_N), addr, @@ -139,7 +139,7 @@ sim_core_write_aligned_N(sim_cpu *cpu, unsigned_N val) { sim_cpu_core *cpu_core = CPU_CORE (cpu); - sim_core *core = &cpu_core->common; + sim_core_common *core = &cpu_core->common; sim_core_mapping *mapping; address_word addr; if (WITH_XOR_ENDIAN) @@ -201,9 +201,9 @@ sim_core_write_unaligned_N(sim_cpu *cpu, break; case NONSTRICT_ALIGNMENT: { - val = T2H_N(val); - if (sim_core_write_buffer (CPU_STATE (cpu), map, &val, addr, - sizeof(unsigned_N)) + unsigned_N val = H2T_N (val); + if (sim_core_xor_write_buffer (CPU_STATE (cpu), cpu, map, &val, addr, + sizeof(unsigned_N)) != sizeof(unsigned_N)) SIM_CORE_SIGNAL (CPU_STATE (cpu), cpu, cia, map, sizeof (unsigned_N), addr, diff --git a/sim/common/sim-options.c b/sim/common/sim-options.c index 4f8890b929..7a8dbe737d 100644 --- a/sim/common/sim-options.c +++ b/sim/common/sim-options.c @@ -239,7 +239,7 @@ standard_option_handler (sd, opt, arg, is_command) break; case 'H': - sim_print_help (sd); + sim_print_help (sd, is_command); if (STATE_OPEN_KIND (sd) == SIM_OPEN_STANDALONE) exit (0); /* FIXME: 'twould be nice to do something similar if gdb. */ @@ -391,8 +391,9 @@ sim_parse_args (sd, argv) /* Print help messages for the options. */ void -sim_print_help (sd) +sim_print_help (sd, is_command) SIM_DESC sd; + int is_command; { const struct option_list *ol; const OPTION *opt; @@ -425,32 +426,35 @@ sim_print_help (sd) comma = 0; len = 2; - o = opt; - do + if (!is_command) { - if (o->shortopt != '\0') + o = opt; + do { - sim_io_printf (sd, "%s-%c", comma ? ", " : "", o->shortopt); - len += (comma ? 2 : 0) + 2; - if (o->arg != NULL) + if (o->shortopt != '\0') { - if (o->opt.has_arg == optional_argument) + sim_io_printf (sd, "%s-%c", comma ? ", " : "", o->shortopt); + len += (comma ? 2 : 0) + 2; + if (o->arg != NULL) { - sim_io_printf (sd, "[%s]", o->arg); - len += 1 + strlen (o->arg) + 1; - } - else - { - sim_io_printf (sd, " %s", o->arg); - len += 1 + strlen (o->arg); + if (o->opt.has_arg == optional_argument) + { + sim_io_printf (sd, "[%s]", o->arg); + len += 1 + strlen (o->arg) + 1; + } + else + { + sim_io_printf (sd, " %s", o->arg); + len += 1 + strlen (o->arg); + } } + comma = 1; } - comma = 1; + ++o; } - ++o; + while (o->opt.name != NULL && o->doc == NULL); } - while (o->opt.name != NULL && o->doc == NULL); - + o = opt; do { @@ -461,11 +465,12 @@ sim_print_help (sd) name = o->opt.name; if (name != NULL) { - sim_io_printf (sd, "%s--%s", + sim_io_printf (sd, "%s%s%s", comma ? ", " : "", + is_command ? "" : "--", name); len += ((comma ? 2 : 0) - + 2 + + (is_command ? 0 : 2) + strlen (name)); if (o->arg != NULL) { diff --git a/sim/common/sim-watch.h b/sim/common/sim-watch.h index b101ebbea9..9d4e842134 100644 --- a/sim/common/sim-watch.h +++ b/sim/common/sim-watch.h @@ -38,6 +38,7 @@ typedef enum { typedef struct _sim_watch_point { watchpoint_action action; + int is_within; long arg; sim_event *event; } sim_watch_point; diff --git a/sim/igen/ChangeLog b/sim/igen/ChangeLog index 5ca4d0e2d4..b9835de588 100644 --- a/sim/igen/ChangeLog +++ b/sim/igen/ChangeLog @@ -1,3 +1,7 @@ +Tue May 27 14:12:32 1997 Andrew Cagney + + * igen.h: Stop options and code gen type bit masks overlaping. + Fri May 23 12:01:08 1997 Andrew Cagney * gen-semantics.c (print_semantic_body): Incorrect test for diff --git a/sim/igen/igen.h b/sim/igen/igen.h new file mode 100644 index 0000000000..3d894bfb8c --- /dev/null +++ b/sim/igen/igen.h @@ -0,0 +1,144 @@ +/* This file is part of the program psim. + + Copyright (C) 1994-1997, Andrew Cagney + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + */ + + +/* What does the instruction look like - bit ordering, size, widths or offesets */ +extern int hi_bit_nr; +extern int insn_bit_size; +extern int insn_specifying_widths; + + +/* what should global names be prefixed with? */ +extern const char *global_name_prefix; +extern const char *global_uname_prefix; + + +/* generation options: */ + + +enum { + generate_with_direct_access = 0x1, + generate_with_icache = 0x2, + generate_with_semantic_icache = 0x4, + generate_with_insn_in_icache = 0x8, + + generate_with_semantic_returning_modified_nia_only = 0x010, + generate_with_semantic_conditional_issue = 0x020, + generate_with_idecode_slot_verification = 0x040, + generate_with_semantic_delayed_branch = 0x080, + generate_with_semantic_zero_r0 = 0x100 +}; + + +typedef enum { + + /* Transfer control to an instructions semantic code using the the + standard call/return mechanism */ + + generate_calls = 0x1000, + + + /* Transfer control to an instructions semantic code using + (computed) goto's instead of the more conventional call/return + mechanism */ + + generate_jumps = 0x2000, + + +} igen_code; + +extern int code; + + + + +extern int icache_size; + + +/* Instruction expansion? + + Should the semantic code for each instruction, when the oportunity + arrises, be expanded according to the variable opcode files that + the instruction decode process renders constant */ + +extern int generate_expanded_instructions; + + +/* SMP? + + Should the generated code include SMP support (>0) and if so, for + how many processors? */ + +extern int generate_smp; + + + + +/* Misc junk */ + + + +/* Function header definitions */ + + +/* Cache functions: */ + +extern int print_icache_function_formal +(lf *file); + +extern int print_icache_function_actual +(lf *file); + +extern int print_icache_function_type +(lf *file); + +extern int print_semantic_function_formal +(lf *file); + +extern int print_semantic_function_actual +(lf *file); + +extern int print_semantic_function_type +(lf *file); + +extern void print_my_defines +(lf *file, + insn_bits *expanded_bits, + table_entry *file_entry); + +extern void print_itrace +(lf *file, + table_entry *file_entry, + int idecode); + + +typedef enum { + function_name_prefix_semantics, + function_name_prefix_idecode, + function_name_prefix_itable, + function_name_prefix_icache, + function_name_prefix_none +} lf_function_name_prefixes; + +extern int print_function_name +(lf *file, + const char *basename, + insn_bits *expanded_bits, + lf_function_name_prefixes prefix); diff --git a/sim/mips/ChangeLog b/sim/mips/ChangeLog index 498e32fd54..f74c006c14 100644 --- a/sim/mips/ChangeLog +++ b/sim/mips/ChangeLog @@ -1,3 +1,13 @@ +Tue May 27 14:22:23 1997 Andrew Cagney + + * interp.c (CoProcPresent): Add UNUSED attribute - not used by all + mips architectures. + +Tue May 27 14:22:23 1997 Andrew Cagney + + * interp.c (sim_do_command): Check for common commands if a + simulator specific command fails. + Thu May 22 09:32:03 1997 Gavin Koch * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP diff --git a/sim/mips/interp.c b/sim/mips/interp.c index e3ea52934c..b047acaef6 100644 --- a/sim/mips/interp.c +++ b/sim/mips/interp.c @@ -1475,40 +1475,46 @@ sim_do_command (sd,cmd) /* NOTE: Accessed from the GDB "sim" commmand: */ for (cptr = sim_commands; cptr && cptr->name; cptr++) - if (strncmp(cmd,cptr->name,strlen(cptr->name)) == 0) { - cmd += strlen(cptr->name); - switch (cptr->id) { - case e_help: /* no arguments */ - { /* no arguments */ - struct t_sim_command *lptr; - callback->printf_filtered(callback,"List of MIPS simulator commands:\n"); - for (lptr = sim_commands; lptr->name; lptr++) - callback->printf_filtered(callback,"%s %s\n",lptr->name,lptr->help); - } + if (strncmp (cmd, cptr->name, strlen(cptr->name)) == 0) + { + cmd += strlen(cptr->name); + switch (cptr->id) { + case e_help: /* no arguments */ + { /* no arguments */ + struct t_sim_command *lptr; + callback->printf_filtered(callback,"List of MIPS simulator commands:\n"); + for (lptr = sim_commands; lptr->name; lptr++) + callback->printf_filtered(callback,"%s %s\n",lptr->name,lptr->help); + sim_args_command (sd, "help"); + } break; - case e_setmemsize: /* memory size argument */ - { - unsigned int newsize = (unsigned int)getnum(cmd); - sim_size(newsize); - } + case e_setmemsize: /* memory size argument */ + { + unsigned int newsize = (unsigned int)getnum(cmd); + sim_size(newsize); + } break; - case e_reset: /* no arguments */ - ColdReset(); - /* NOTE: See the comments in sim_open() relating to device - initialisation. */ - break; + case e_reset: /* no arguments */ + ColdReset(); + /* NOTE: See the comments in sim_open() relating to device + initialisation. */ + break; - default: - callback->printf_filtered(callback,"FATAL: Matched \"%s\", but failed to match command id %d.\n",cmd,cptr->id); - break; - } - break; - } + default: + callback->printf_filtered(callback,"FATAL: Matched \"%s\", but failed to match command id %d.\n",cmd,cptr->id); + break; + } + break; + } if (!(cptr->name)) - callback->printf_filtered(callback,"Error: \"%s\" is not a valid MIPS simulator command.\n",cmd); + { + /* try for a common command when the sim specific lookup fails */ + if (sim_args_command (sd, cmd) != SIM_RC_OK) + callback->printf_filtered(callback,"Error: \"%s\" is not a valid MIPS simulator command.\n",cmd); + } return; } @@ -3887,7 +3893,7 @@ Convert(rm,op,from,to) /*-- co-processor support routines ------------------------------------------*/ -static int +static int UNUSED CoProcPresent(coproc_number) unsigned int coproc_number; { diff --git a/sim/tic80/ChangeLog b/sim/tic80/ChangeLog index b6fdd6f91f..d0c56c0615 100644 --- a/sim/tic80/ChangeLog +++ b/sim/tic80/ChangeLog @@ -1,3 +1,8 @@ +Tue May 27 13:22:13 1997 Andrew Cagney + + * sim-calls.c (sim_read): Pass NULL cpu to sim_core_read_buffer. + (sim_write): Ditto for write. + Tue May 20 09:33:31 1997 Andrew Cagney * sim-calls.c (sim_load): Set STATE_LOADED_P. diff --git a/sim/tic80/sim-calls.c b/sim/tic80/sim-calls.c index ffa610e239..db1558e86c 100644 --- a/sim/tic80/sim-calls.c +++ b/sim/tic80/sim-calls.c @@ -148,7 +148,7 @@ sim_kill (SIM_DESC sd) int sim_read (SIM_DESC sd, SIM_ADDR mem, unsigned char *buf, int length) { - return sim_core_read_buffer (sd, sim_core_write_map, + return sim_core_read_buffer (sd, NULL, sim_core_write_map, buf, mem, length); } @@ -156,7 +156,7 @@ sim_read (SIM_DESC sd, SIM_ADDR mem, unsigned char *buf, int length) int sim_write (SIM_DESC sd, SIM_ADDR mem, unsigned char *buf, int length) { - return sim_core_write_buffer (sd, sim_core_write_map, + return sim_core_write_buffer (sd, NULL, sim_core_write_map, buf, mem, length); }