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Support i387 AVX.
2010-04-07 H.J. Lu <hongjiu.lu@intel.com> * i387-tdep.c: Include "i386-xstate.h". (XSAVE_XSTATE_BV_ADDR): New. (xsave_avxh_offset): Likewise. (XSAVE_AVXH_ADDR): Likewise. (i387_supply_xsave): Likewise. (i387_collect_xsave): Likewise. * i387-tdep.h (I387_NUM_YMM_REGS): New. (I387_YMM0H_REGNUM): Likewise. (I387_YMMENDH_REGNUM): Likewise. (i387_supply_xsave): Likewise. (i387_collect_xsave): Likewise.
This commit is contained in:
H.J. Lu
parent
c131fcee79
commit
31aeac7844
@ -1,3 +1,18 @@
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2010-04-07 H.J. Lu <hongjiu.lu@intel.com>
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* i387-tdep.c: Include "i386-xstate.h".
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(XSAVE_XSTATE_BV_ADDR): New.
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(xsave_avxh_offset): Likewise.
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(XSAVE_AVXH_ADDR): Likewise.
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(i387_supply_xsave): Likewise.
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(i387_collect_xsave): Likewise.
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* i387-tdep.h (I387_NUM_YMM_REGS): New.
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(I387_YMM0H_REGNUM): Likewise.
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(I387_YMMENDH_REGNUM): Likewise.
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(i387_supply_xsave): Likewise.
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(i387_collect_xsave): Likewise.
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2010-04-07 H.J. Lu <hongjiu.lu@intel.com>
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* i386-linux-nat.c: Include "regset.h", "elf/common.h",
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470
gdb/i387-tdep.c
470
gdb/i387-tdep.c
@ -34,6 +34,7 @@
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#include "i386-tdep.h"
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#include "i387-tdep.h"
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#include "i386-xstate.h"
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/* Print the floating point number specified by RAW. */
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@ -677,6 +678,475 @@ i387_collect_fxsave (const struct regcache *regcache, int regnum, void *fxsave)
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FXSAVE_MXCSR_ADDR (regs));
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}
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/* `xstate_bv' is at byte offset 512. */
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#define XSAVE_XSTATE_BV_ADDR(xsave) (xsave + 512)
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/* At xsave_avxh_offset[REGNUM] you'll find the offset to the location in
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the upper 128bit of AVX register data structure used by the "xsave"
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instruction where GDB register REGNUM is stored. */
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static int xsave_avxh_offset[] =
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{
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576 + 0 * 16, /* Upper 128bit of %ymm0 through ... */
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576 + 1 * 16,
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576 + 2 * 16,
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576 + 3 * 16,
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576 + 4 * 16,
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576 + 5 * 16,
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576 + 6 * 16,
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576 + 7 * 16,
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576 + 8 * 16,
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576 + 9 * 16,
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576 + 10 * 16,
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576 + 11 * 16,
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576 + 12 * 16,
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576 + 13 * 16,
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576 + 14 * 16,
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576 + 15 * 16 /* Upper 128bit of ... %ymm15 (128 bits each). */
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};
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#define XSAVE_AVXH_ADDR(tdep, xsave, regnum) \
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(xsave + xsave_avxh_offset[regnum - I387_YMM0H_REGNUM (tdep)])
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/* Similar to i387_supply_fxsave, but use XSAVE extended state. */
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void
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i387_supply_xsave (struct regcache *regcache, int regnum,
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const void *xsave)
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{
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struct gdbarch_tdep *tdep = gdbarch_tdep (get_regcache_arch (regcache));
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const gdb_byte *regs = xsave;
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int i;
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unsigned int clear_bv;
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const gdb_byte *p;
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enum
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{
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none = 0x0,
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x87 = 0x1,
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sse = 0x2,
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avxh = 0x4,
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all = x87 | sse | avxh
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} regclass;
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gdb_assert (tdep->st0_regnum >= I386_ST0_REGNUM);
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gdb_assert (tdep->num_xmm_regs > 0);
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if (regnum == -1)
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regclass = all;
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else if (regnum >= I387_YMM0H_REGNUM (tdep)
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&& regnum < I387_YMMENDH_REGNUM (tdep))
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regclass = avxh;
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else if (regnum >= I387_XMM0_REGNUM(tdep)
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&& regnum < I387_MXCSR_REGNUM (tdep))
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regclass = sse;
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else if (regnum >= I387_ST0_REGNUM (tdep)
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&& regnum < I387_FCTRL_REGNUM (tdep))
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regclass = x87;
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else
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regclass = none;
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if (regs != NULL && regclass != none)
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{
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/* Get `xstat_bv'. */
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const gdb_byte *xstate_bv_p = XSAVE_XSTATE_BV_ADDR (regs);
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/* The supported bits in `xstat_bv' are 1 byte. Clear part in
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vector registers if its bit in xstat_bv is zero. */
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clear_bv = (~(*xstate_bv_p)) & tdep->xcr0;
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}
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else
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clear_bv = I386_XSTATE_AVX_MASK;
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switch (regclass)
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{
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case none:
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break;
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case avxh:
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if ((clear_bv & I386_XSTATE_AVX))
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p = NULL;
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else
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p = XSAVE_AVXH_ADDR (tdep, regs, regnum);
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regcache_raw_supply (regcache, regnum, p);
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return;
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case sse:
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if ((clear_bv & I386_XSTATE_SSE))
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p = NULL;
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else
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p = FXSAVE_ADDR (tdep, regs, regnum);
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regcache_raw_supply (regcache, regnum, p);
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return;
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case x87:
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if ((clear_bv & I386_XSTATE_X87))
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p = NULL;
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else
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p = FXSAVE_ADDR (tdep, regs, regnum);
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regcache_raw_supply (regcache, regnum, p);
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return;
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case all:
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/* Hanle the upper YMM registers. */
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if ((tdep->xcr0 & I386_XSTATE_AVX))
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{
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if ((clear_bv & I386_XSTATE_AVX))
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p = NULL;
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else
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p = regs;
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for (i = I387_YMM0H_REGNUM (tdep);
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i < I387_YMMENDH_REGNUM (tdep); i++)
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{
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if (p != NULL)
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p = XSAVE_AVXH_ADDR (tdep, regs, i);
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regcache_raw_supply (regcache, i, p);
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}
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}
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/* Handle the XMM registers. */
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if ((tdep->xcr0 & I386_XSTATE_SSE))
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{
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if ((clear_bv & I386_XSTATE_SSE))
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p = NULL;
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else
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p = regs;
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for (i = I387_XMM0_REGNUM (tdep);
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i < I387_MXCSR_REGNUM (tdep); i++)
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{
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if (p != NULL)
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p = FXSAVE_ADDR (tdep, regs, i);
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regcache_raw_supply (regcache, i, p);
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}
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}
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/* Handle the x87 registers. */
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if ((tdep->xcr0 & I386_XSTATE_X87))
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{
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if ((clear_bv & I386_XSTATE_X87))
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p = NULL;
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else
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p = regs;
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for (i = I387_ST0_REGNUM (tdep);
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i < I387_FCTRL_REGNUM (tdep); i++)
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{
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if (p != NULL)
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p = FXSAVE_ADDR (tdep, regs, i);
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regcache_raw_supply (regcache, i, p);
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}
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}
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break;
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}
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/* Only handle x87 control registers. */
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for (i = I387_FCTRL_REGNUM (tdep); i < I387_XMM0_REGNUM (tdep); i++)
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if (regnum == -1 || regnum == i)
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{
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if (regs == NULL)
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{
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regcache_raw_supply (regcache, i, NULL);
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continue;
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}
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/* Most of the FPU control registers occupy only 16 bits in
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the xsave extended state. Give those a special treatment. */
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if (i != I387_FIOFF_REGNUM (tdep)
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&& i != I387_FOOFF_REGNUM (tdep))
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{
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gdb_byte val[4];
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memcpy (val, FXSAVE_ADDR (tdep, regs, i), 2);
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val[2] = val[3] = 0;
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if (i == I387_FOP_REGNUM (tdep))
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val[1] &= ((1 << 3) - 1);
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else if (i== I387_FTAG_REGNUM (tdep))
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{
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/* The fxsave area contains a simplified version of
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the tag word. We have to look at the actual 80-bit
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FP data to recreate the traditional i387 tag word. */
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unsigned long ftag = 0;
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int fpreg;
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int top;
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top = ((FXSAVE_ADDR (tdep, regs,
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I387_FSTAT_REGNUM (tdep)))[1] >> 3);
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top &= 0x7;
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for (fpreg = 7; fpreg >= 0; fpreg--)
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{
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int tag;
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if (val[0] & (1 << fpreg))
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{
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int regnum = (fpreg + 8 - top) % 8
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+ I387_ST0_REGNUM (tdep);
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tag = i387_tag (FXSAVE_ADDR (tdep, regs, regnum));
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}
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else
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tag = 3; /* Empty */
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ftag |= tag << (2 * fpreg);
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}
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val[0] = ftag & 0xff;
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val[1] = (ftag >> 8) & 0xff;
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}
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regcache_raw_supply (regcache, i, val);
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}
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else
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regcache_raw_supply (regcache, i, FXSAVE_ADDR (tdep, regs, i));
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}
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if (regnum == I387_MXCSR_REGNUM (tdep) || regnum == -1)
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{
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p = regs == NULL ? NULL : FXSAVE_MXCSR_ADDR (regs);
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regcache_raw_supply (regcache, I387_MXCSR_REGNUM (tdep), p);
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}
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}
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/* Similar to i387_collect_fxsave, but use XSAVE extended state. */
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void
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i387_collect_xsave (const struct regcache *regcache, int regnum,
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void *xsave, int gcore)
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{
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struct gdbarch_tdep *tdep = gdbarch_tdep (get_regcache_arch (regcache));
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gdb_byte *regs = xsave;
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int i;
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enum
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{
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none = 0x0,
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check = 0x1,
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x87 = 0x2 | check,
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sse = 0x4 | check,
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avxh = 0x8 | check,
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all = x87 | sse | avxh
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} regclass;
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gdb_assert (tdep->st0_regnum >= I386_ST0_REGNUM);
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gdb_assert (tdep->num_xmm_regs > 0);
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if (regnum == -1)
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regclass = all;
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else if (regnum >= I387_YMM0H_REGNUM (tdep)
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&& regnum < I387_YMMENDH_REGNUM (tdep))
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regclass = avxh;
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else if (regnum >= I387_XMM0_REGNUM(tdep)
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&& regnum < I387_MXCSR_REGNUM (tdep))
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regclass = sse;
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else if (regnum >= I387_ST0_REGNUM (tdep)
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&& regnum < I387_FCTRL_REGNUM (tdep))
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regclass = x87;
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else
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regclass = none;
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if (gcore)
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{
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/* Clear XSAVE extended state. */
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memset (regs, 0, I386_XSTATE_SIZE (tdep->xcr0));
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/* Update XCR0 and `xstate_bv' with XCR0 for gcore. */
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if (tdep->xsave_xcr0_offset != -1)
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memcpy (regs + tdep->xsave_xcr0_offset, &tdep->xcr0, 8);
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memcpy (XSAVE_XSTATE_BV_ADDR (regs), &tdep->xcr0, 8);
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}
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if ((regclass & check))
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{
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gdb_byte raw[I386_MAX_REGISTER_SIZE];
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gdb_byte *xstate_bv_p = XSAVE_XSTATE_BV_ADDR (regs);
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unsigned int xstate_bv = 0;
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/* The supported bits in `xstat_bv' are 1 byte. */
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unsigned int clear_bv = (~(*xstate_bv_p)) & tdep->xcr0;
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gdb_byte *p;
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/* Clear register set if its bit in xstat_bv is zero. */
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if (clear_bv)
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{
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if ((clear_bv & I386_XSTATE_AVX))
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for (i = I387_YMM0H_REGNUM (tdep);
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i < I387_YMMENDH_REGNUM (tdep); i++)
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memset (XSAVE_AVXH_ADDR (tdep, regs, i), 0, 16);
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if ((clear_bv & I386_XSTATE_SSE))
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for (i = I387_XMM0_REGNUM (tdep);
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i < I387_MXCSR_REGNUM (tdep); i++)
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memset (FXSAVE_ADDR (tdep, regs, i), 0, 16);
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if ((clear_bv & I386_XSTATE_X87))
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for (i = I387_ST0_REGNUM (tdep);
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i < I387_FCTRL_REGNUM (tdep); i++)
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memset (FXSAVE_ADDR (tdep, regs, i), 0, 10);
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}
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if (regclass == all)
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{
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/* Check if any upper YMM registers are changed. */
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if ((tdep->xcr0 & I386_XSTATE_AVX))
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for (i = I387_YMM0H_REGNUM (tdep);
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i < I387_YMMENDH_REGNUM (tdep); i++)
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{
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regcache_raw_collect (regcache, i, raw);
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p = XSAVE_AVXH_ADDR (tdep, regs, i);
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if (memcmp (raw, p, 16))
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{
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xstate_bv |= I386_XSTATE_AVX;
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memcpy (p, raw, 16);
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}
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}
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/* Check if any SSE registers are changed. */
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if ((tdep->xcr0 & I386_XSTATE_SSE))
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for (i = I387_XMM0_REGNUM (tdep);
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i < I387_MXCSR_REGNUM (tdep); i++)
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{
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regcache_raw_collect (regcache, i, raw);
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p = FXSAVE_ADDR (tdep, regs, i);
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if (memcmp (raw, p, 16))
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{
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xstate_bv |= I386_XSTATE_SSE;
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memcpy (p, raw, 16);
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}
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}
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/* Check if any X87 registers are changed. */
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if ((tdep->xcr0 & I386_XSTATE_X87))
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for (i = I387_ST0_REGNUM (tdep);
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i < I387_FCTRL_REGNUM (tdep); i++)
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{
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regcache_raw_collect (regcache, i, raw);
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p = FXSAVE_ADDR (tdep, regs, i);
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if (memcmp (raw, p, 10))
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{
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xstate_bv |= I386_XSTATE_X87;
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memcpy (p, raw, 10);
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}
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}
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}
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else
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{
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/* Check if REGNUM is changed. */
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regcache_raw_collect (regcache, regnum, raw);
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switch (regclass)
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{
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default:
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abort ();
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case avxh:
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/* This is an upper YMM register. */
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p = XSAVE_AVXH_ADDR (tdep, regs, regnum);
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if (memcmp (raw, p, 16))
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{
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xstate_bv |= I386_XSTATE_AVX;
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memcpy (p, raw, 16);
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}
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break;
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case sse:
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/* This is an SSE register. */
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p = FXSAVE_ADDR (tdep, regs, regnum);
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if (memcmp (raw, p, 16))
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{
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xstate_bv |= I386_XSTATE_SSE;
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memcpy (p, raw, 16);
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}
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break;
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case x87:
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/* This is an x87 register. */
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p = FXSAVE_ADDR (tdep, regs, regnum);
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if (memcmp (raw, p, 10))
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{
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xstate_bv |= I386_XSTATE_X87;
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memcpy (p, raw, 10);
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}
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break;
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}
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}
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/* Update the corresponding bits in `xstate_bv' if any SSE/AVX
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registers are changed. */
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if (xstate_bv)
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{
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/* The supported bits in `xstat_bv' are 1 byte. */
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*xstate_bv_p |= (gdb_byte) xstate_bv;
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switch (regclass)
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{
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default:
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abort ();
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case all:
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break;
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case x87:
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case sse:
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case avxh:
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/* Register REGNUM has been updated. Return. */
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return;
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}
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}
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else
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{
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/* Return if REGNUM isn't changed. */
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if (regclass != all)
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return;
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}
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}
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/* Only handle x87 control registers. */
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for (i = I387_FCTRL_REGNUM (tdep); i < I387_XMM0_REGNUM (tdep); i++)
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if (regnum == -1 || regnum == i)
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{
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/* Most of the FPU control registers occupy only 16 bits in
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the xsave extended state. Give those a special treatment. */
|
||||
if (i != I387_FIOFF_REGNUM (tdep)
|
||||
&& i != I387_FOOFF_REGNUM (tdep))
|
||||
{
|
||||
gdb_byte buf[4];
|
||||
|
||||
regcache_raw_collect (regcache, i, buf);
|
||||
|
||||
if (i == I387_FOP_REGNUM (tdep))
|
||||
{
|
||||
/* The opcode occupies only 11 bits. Make sure we
|
||||
don't touch the other bits. */
|
||||
buf[1] &= ((1 << 3) - 1);
|
||||
buf[1] |= ((FXSAVE_ADDR (tdep, regs, i))[1] & ~((1 << 3) - 1));
|
||||
}
|
||||
else if (i == I387_FTAG_REGNUM (tdep))
|
||||
{
|
||||
/* Converting back is much easier. */
|
||||
|
||||
unsigned short ftag;
|
||||
int fpreg;
|
||||
|
||||
ftag = (buf[1] << 8) | buf[0];
|
||||
buf[0] = 0;
|
||||
buf[1] = 0;
|
||||
|
||||
for (fpreg = 7; fpreg >= 0; fpreg--)
|
||||
{
|
||||
int tag = (ftag >> (fpreg * 2)) & 3;
|
||||
|
||||
if (tag != 3)
|
||||
buf[0] |= (1 << fpreg);
|
||||
}
|
||||
}
|
||||
memcpy (FXSAVE_ADDR (tdep, regs, i), buf, 2);
|
||||
}
|
||||
else
|
||||
regcache_raw_collect (regcache, i, FXSAVE_ADDR (tdep, regs, i));
|
||||
}
|
||||
|
||||
if (regnum == I387_MXCSR_REGNUM (tdep) || regnum == -1)
|
||||
regcache_raw_collect (regcache, I387_MXCSR_REGNUM (tdep),
|
||||
FXSAVE_MXCSR_ADDR (regs));
|
||||
}
|
||||
|
||||
/* Recreate the FTW (tag word) valid bits from the 80-bit FP data in
|
||||
*RAW. */
|
||||
|
||||
|
||||
@ -33,6 +33,8 @@ struct ui_file;
|
||||
#define I387_ST0_REGNUM(tdep) ((tdep)->st0_regnum)
|
||||
#define I387_NUM_XMM_REGS(tdep) ((tdep)->num_xmm_regs)
|
||||
#define I387_MM0_REGNUM(tdep) ((tdep)->mm0_regnum)
|
||||
#define I387_NUM_YMM_REGS(tdep) ((tdep)->num_ymm_regs)
|
||||
#define I387_YMM0H_REGNUM(tdep) ((tdep)->ymm0h_regnum)
|
||||
|
||||
#define I387_FCTRL_REGNUM(tdep) (I387_ST0_REGNUM (tdep) + 8)
|
||||
#define I387_FSTAT_REGNUM(tdep) (I387_FCTRL_REGNUM (tdep) + 1)
|
||||
@ -45,6 +47,8 @@ struct ui_file;
|
||||
#define I387_XMM0_REGNUM(tdep) (I387_ST0_REGNUM (tdep) + 16)
|
||||
#define I387_MXCSR_REGNUM(tdep) \
|
||||
(I387_XMM0_REGNUM (tdep) + I387_NUM_XMM_REGS (tdep))
|
||||
#define I387_YMMENDH_REGNUM(tdep) \
|
||||
(I387_YMM0H_REGNUM (tdep) + I387_NUM_YMM_REGS (tdep))
|
||||
|
||||
/* Print out the i387 floating point state. */
|
||||
|
||||
@ -99,6 +103,11 @@ extern void i387_collect_fsave (const struct regcache *regcache, int regnum,
|
||||
extern void i387_supply_fxsave (struct regcache *regcache, int regnum,
|
||||
const void *fxsave);
|
||||
|
||||
/* Similar to i387_supply_fxsave, but use XSAVE extended state. */
|
||||
|
||||
extern void i387_supply_xsave (struct regcache *regcache, int regnum,
|
||||
const void *xsave);
|
||||
|
||||
/* Fill register REGNUM (if it is a floating-point or SSE register) in
|
||||
*FXSAVE with the value from REGCACHE. If REGNUM is -1, do this for
|
||||
all registers. This function doesn't touch any of the reserved
|
||||
@ -107,6 +116,11 @@ extern void i387_supply_fxsave (struct regcache *regcache, int regnum,
|
||||
extern void i387_collect_fxsave (const struct regcache *regcache, int regnum,
|
||||
void *fxsave);
|
||||
|
||||
/* Similar to i387_collect_fxsave, but use XSAVE extended state. */
|
||||
|
||||
extern void i387_collect_xsave (const struct regcache *regcache,
|
||||
int regnum, void *xsave, int gcore);
|
||||
|
||||
/* Prepare the FPU stack in REGCACHE for a function return. */
|
||||
|
||||
extern void i387_return_value (struct gdbarch *gdbarch,
|
||||
|
||||
Loading…
Reference in New Issue
Block a user