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* config/tc-arm.c (FPU_MAVERICK): Define.
(FPU_ARCH_MAVERICK): Define. (arm_float_abi): Define. (mfloat_abi_opt): New variable. (md_begin): Use them. (arm_opts): Add msoft-float and mhard-float. (arm_cpus): Use FPU_ARCH_MAVERICK. (arm_fpus): Add maverick. (arm_float_abis): Add. (arm_parse_float_abi): New function. (arm_long_options): Add mfloat-abi. * doc/as.texinfo: Document -mfloat-abi=. * doc/c-arm.text: Ditto. Menution -fpu=maverick.
This commit is contained in:
Paul Brook
parent
1a9a8ab429
commit
33a392fb88
@ -1,3 +1,19 @@
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2003-12-10 Paul Brook <paul@codesourcery.com>
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* config/tc-arm.c (FPU_MAVERICK): Define.
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(FPU_ARCH_MAVERICK): Define.
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(arm_float_abi): Define.
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(mfloat_abi_opt): New variable.
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(md_begin): Use them.
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(arm_opts): Add msoft-float and mhard-float.
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(arm_cpus): Use FPU_ARCH_MAVERICK.
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(arm_fpus): Add maverick.
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(arm_float_abis): Add.
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(arm_parse_float_abi): New function.
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(arm_long_options): Add mfloat-abi.
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* doc/as.texinfo: Document -mfloat-abi=.
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* doc/c-arm.text: Ditto. Menution -fpu=maverick.
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2003-12-09 Paul Brook <paul@codesourcery.com>
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* config/tc-arm.c (do_umaal): Fix typo.
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@ -102,6 +102,7 @@
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#define FPU_VFP_EXT_V1xD 0x10000000 /* Base VFP instruction set. */
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#define FPU_VFP_EXT_V1 0x08000000 /* Double-precision insns. */
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#define FPU_VFP_EXT_V2 0x04000000 /* ARM10E VFPr1. */
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#define FPU_MAVERICK 0x02000000 /* Cirrus Maverick. */
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#define FPU_NONE 0
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#define FPU_ARCH_FPE FPU_FPA_EXT_V1
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@ -112,6 +113,15 @@
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#define FPU_ARCH_VFP_V1 (FPU_ARCH_VFP_V1xD | FPU_VFP_EXT_V1)
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#define FPU_ARCH_VFP_V2 (FPU_ARCH_VFP_V1 | FPU_VFP_EXT_V2)
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#define FPU_ARCH_MAVERICK FPU_MAVERICK
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enum arm_float_abi
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{
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ARM_FLOAT_ABI_HARD,
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ARM_FLOAT_ABI_SOFTFP,
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ARM_FLOAT_ABI_SOFT
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};
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/* Types of processor to assemble for. */
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#define ARM_1 ARM_ARCH_V1
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#define ARM_2 ARM_ARCH_V2
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@ -178,6 +188,7 @@ static int mcpu_fpu_opt = -1;
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static int march_cpu_opt = -1;
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static int march_fpu_opt = -1;
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static int mfpu_opt = -1;
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static int mfloat_abi_opt = -1;
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/* This array holds the chars that always start a comment. If the
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pre-processor is disabled, these aren't very useful. */
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@ -2536,6 +2547,7 @@ static int arm_parse_extension PARAMS ((char *, int *));
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static int arm_parse_cpu PARAMS ((char *));
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static int arm_parse_arch PARAMS ((char *));
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static int arm_parse_fpu PARAMS ((char *));
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static int arm_parse_float_abi PARAMS ((char *));
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#if 0 /* Suppressed - for now. */
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#if defined OBJ_COFF || defined OBJ_ELF
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static void arm_add_note PARAMS ((const char *, const char *, unsigned int));
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@ -11652,17 +11664,28 @@ md_begin ()
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if (uses_apcs_float) flags |= F_APCS_FLOAT;
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if (pic_code) flags |= F_PIC;
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if ((cpu_variant & FPU_ANY) == FPU_NONE
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|| (cpu_variant & FPU_ANY) == FPU_ARCH_VFP) /* VFP layout only. */
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flags |= F_SOFT_FLOAT;
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|| (cpu_variant & FPU_ANY) == FPU_ARCH_VFP) /* VFP layout only. */
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{
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flags |= F_SOFT_FLOAT;
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}
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switch (mfloat_abi_opt)
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{
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case ARM_FLOAT_ABI_SOFT:
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case ARM_FLOAT_ABI_SOFTFP:
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flags |= F_SOFT_FLOAT;
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break;
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case ARM_FLOAT_ABI_HARD:
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if (flags & F_SOFT_FLOAT)
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as_bad (_("hard-float conflicts with specified fpu"));
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break;
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}
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/* Using VFP conventions (even if soft-float). */
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if (cpu_variant & FPU_VFP_EXT_NONE) flags |= F_VFP_FLOAT;
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#if defined OBJ_ELF
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if (cpu_variant & ARM_CEXT_MAVERICK)
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{
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flags &= ~ F_SOFT_FLOAT;
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if (cpu_variant & FPU_ARCH_MAVERICK)
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flags |= EF_ARM_MAVERICK_FLOAT;
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}
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#endif
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bfd_set_private_flags (stdoutput, flags);
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@ -13281,7 +13304,7 @@ static struct arm_cpu_option_table arm_cpus[] =
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{"iwmmxt", ARM_ARCH_IWMMXT, FPU_ARCH_VFP_V2},
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{"i80200", ARM_ARCH_XSCALE, FPU_ARCH_VFP_V2},
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/* Maverick */
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{"ep9312", ARM_ARCH_V4T | ARM_CEXT_MAVERICK, FPU_NONE},
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{"ep9312", ARM_ARCH_V4T | ARM_CEXT_MAVERICK, FPU_ARCH_MAVERICK},
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{NULL, 0, 0}
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};
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@ -13362,6 +13385,21 @@ static struct arm_fpu_option_table arm_fpus[] =
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{"arm1020t", FPU_ARCH_VFP_V1},
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{"arm1020e", FPU_ARCH_VFP_V2},
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{"arm1136jfs", FPU_ARCH_VFP_V2},
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{"maverick", FPU_ARCH_MAVERICK},
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{NULL, 0}
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};
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struct arm_float_abi_option_table
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{
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char *name;
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int value;
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};
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static struct arm_float_abi_option_table arm_float_abis[] =
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{
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{"hard", ARM_FLOAT_ABI_HARD},
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{"softfp", ARM_FLOAT_ABI_SOFTFP},
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{"soft", ARM_FLOAT_ABI_SOFT},
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{NULL, 0}
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};
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@ -13511,6 +13549,23 @@ arm_parse_fpu (str)
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return 0;
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}
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static int
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arm_parse_float_abi (str)
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char * str;
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{
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struct arm_float_abi_option_table *opt;
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for (opt = arm_float_abis; opt->name != NULL; opt++)
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if (strcmp (opt->name, str) == 0)
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{
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mfloat_abi_opt = opt->value;
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return 1;
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}
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as_bad (_("unknown floating point abi `%s'\n"), str);
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return 0;
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}
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struct arm_long_option_table arm_long_opts[] =
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{
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{"mcpu=", N_("<cpu name>\t assemble for CPU <cpu name>"),
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@ -13519,6 +13574,8 @@ struct arm_long_option_table arm_long_opts[] =
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arm_parse_arch, NULL},
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{"mfpu=", N_("<fpu name>\t assemble for FPU architecture <fpu name>"),
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arm_parse_fpu, NULL},
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{"mfloat-abi=", N_("<abi>\t assemble for floating point ABI <abi>"),
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arm_parse_float_abi, NULL},
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{NULL, NULL, 0, NULL}
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};
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@ -297,7 +297,8 @@ gcc(1), ld(1), and the Info entries for @file{binutils} and @file{ld}.
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@c Don't document the deprecated options
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[@b{-mcpu}=@var{processor}[+@var{extension}@dots{}]]
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[@b{-march}=@var{architecture}[+@var{extension}@dots{}]]
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[@b{-mfpu}=@var{floating-point-fromat}]
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[@b{-mfpu}=@var{floating-point-format}]
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[@b{-mfloat-abi}=@var{abi}]
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[@b{-mthumb}]
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[@b{-EB}|@b{-EL}]
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[@b{-mapcs-32}|@b{-mapcs-26}|@b{-mapcs-float}|
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@ -635,6 +636,8 @@ Specify which ARM processor variant is the target.
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Specify which ARM architecture variant is used by the target.
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@item -mfpu=@var{floating-point-format}
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Select which Floating Point architecture is the target.
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@item -mfloat-abi=@var{abi}
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Select which floating point ABI is in use.
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@item -mthumb
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Enable Thumb only instruction decoding.
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@item -mapcs-32 | -mapcs-26 | -mapcs-float | -mapcs-reentrant | -moabi
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@ -166,8 +166,9 @@ The following format options are recognized:
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@code{vfpxd},
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@code{arm1020t},
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@code{arm1020e},
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@code{arm1136jfs}
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and
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@code{arm1136jfs}.
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@code{maverick}.
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In addition to determining which instructions are assembled, this option
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also affects the way in which the @code{.double} assembler directive behaves
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@ -213,6 +214,16 @@ registers rather than integer registers.
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This indicates that the reentrant variant of the APCS should be used.
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This variant supports position independent code.
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@cindex @code{-mfloat-abi=} command line option, ARM
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@item -mfloat-abi=@var{abi}
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This option specifies that the output generated by the assembler should be
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marked as using specified floating point ABI.
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The following values are recognized:
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@code{soft},
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@code{softfp}
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and
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@code{hard}.
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@cindex @code{-EB} command line option, ARM
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@item -EB
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This option specifies that the output generated by the assembler should
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