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https://github.com/darlinghq/darling-gdb.git
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gas/
2008-02-13 Jan Beulich <jbeulich@novell.com> * config/tc-i386.c (intel_e09): Also special-case 'bound'. gas/testsuite/ 2008-02-13 Jan Beulich <jbeulich@novell.com> * gas/i386/intelbad.s, gas/i386/intelok.s: Add 'bound' tests. * gas/i386/intelbad.l, gas/i386/intelok.l, gas/i386/intelok.e, gas/i386/opcode-intel.d: Adjust. opcodes/ 2008-02-13 Jan Beulich <jbeulich@novell.com> * i386-dis.c (a_mode): New. (cond_jump_mode): Adjust. (Ma): Change to a_mode. (intel_operand_size): Handle a_mode. * i386-opc.tbl: Allow Dword and Qword for bound. * i386-tbl.h: Re-generate.
This commit is contained in:
Jan Beulich
parent
a60de03c61
commit
34b772a651
@ -1,3 +1,7 @@
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2008-02-13 Jan Beulich <jbeulich@novell.com>
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* config/tc-i386.c (intel_e09): Also special-case 'bound'.
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2008-02-13 Jan Beulich <jbeulich@novell.com>
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* config/tc-i386.c (allow_pseudo_reg): New.
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@ -8357,9 +8357,10 @@ intel_e09 (void)
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else if (prev_token.code == T_WORD)
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{
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if (current_templates->start->name[0] == 'l'
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&& current_templates->start->name[2] == 's'
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&& current_templates->start->name[3] == 0)
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if ((current_templates->start->name[0] == 'l'
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&& current_templates->start->name[2] == 's'
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&& current_templates->start->name[3] == 0)
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|| current_templates->start->base_opcode == 0x62 /* bound */)
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suffix = BYTE_MNEM_SUFFIX; /* so it will cause an error */
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else if (intel_parser.got_a_float == 2) /* "fi..." */
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suffix = SHORT_MNEM_SUFFIX;
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@ -8370,9 +8371,10 @@ intel_e09 (void)
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else if (prev_token.code == T_DWORD)
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{
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if (current_templates->start->name[0] == 'l'
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&& current_templates->start->name[2] == 's'
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&& current_templates->start->name[3] == 0)
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if ((current_templates->start->name[0] == 'l'
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&& current_templates->start->name[2] == 's'
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&& current_templates->start->name[3] == 0)
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|| current_templates->start->base_opcode == 0x62 /* bound */)
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suffix = WORD_MNEM_SUFFIX;
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else if (flag_code == CODE_16BIT
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&& (current_templates->start->opcode_modifier.jump
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@ -8404,10 +8406,11 @@ intel_e09 (void)
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else if (prev_token.code == T_QWORD)
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{
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if (intel_parser.got_a_float == 1) /* "f..." */
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if (current_templates->start->base_opcode == 0x62 /* bound */
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|| intel_parser.got_a_float == 1) /* "f..." */
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suffix = LONG_MNEM_SUFFIX;
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else
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suffix = QWORD_MNEM_SUFFIX;
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suffix = QWORD_MNEM_SUFFIX;
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i.types[this_operand].bitfield.qword = 1;
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}
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@ -1,3 +1,9 @@
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2008-02-13 Jan Beulich <jbeulich@novell.com>
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* gas/i386/intelbad.s, gas/i386/intelok.s: Add 'bound' tests.
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* gas/i386/intelbad.l, gas/i386/intelok.l, gas/i386/intelok.e,
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gas/i386/opcode-intel.d: Adjust.
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2008-02-13 Jan Beulich <jbeulich@novell.com>
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* gas/cfi/cfi-i386.s: Add code testing use of all registers.
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@ -15,7 +15,7 @@
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.*:17: Error: .*
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.*:18: Error: .*
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.*:19: Error: .*
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.*:20: Error: .*
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.*:20: (Warning|Error): .*
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.*:21: Error: .*
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.*:22: Error: .*
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.*:23: Error: .*
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@ -51,9 +51,9 @@
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.*:53: Error: .*
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.*:54: Error: .*
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.*:55: Error: .*
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.*:56: (Warning|Error): .*
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.*:56: Error: .*
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.*:57: Error: .*
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.*:58: Error: .*
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.*:58: (Warning|Error): .*
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.*:59: Error: .*
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.*:60: Error: .*
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.*:61: Error: .*
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@ -71,13 +71,13 @@
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.*:73: Error: .*
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.*:74: Error: .*
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.*:75: Error: .*
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.*:76: Error: .*
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.*:77: Error: .*
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.*:78: Error: .*
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.*:89: Error: .*
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.*:90: Error: .*
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.*:79: Error: .*
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.*:80: Error: .*
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.*:91: Error: .*
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.*:94: Error: .*
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.*:95: Error: .*
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.*:92: Error: .*
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.*:93: Error: .*
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.*:96: Error: .*
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.*:97: Error: .*
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.*:98: Error: .*
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@ -98,49 +98,51 @@
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.*:113: Error: .*
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.*:114: Error: .*
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.*:115: Error: .*
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.*:116: Error: .*
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.*:117: Error: .*
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.*:118: Error: .*
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.*:119: Error: .*
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.*:120: Error: .*
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.*:121: Error: .*
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.*:122: Error: .*
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.*:123: Error: .*
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.*:124: Error: .*
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.*:125: Error: .*
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.*:126: Error: .*
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.*:127: Error: .*
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.*:128: Error: .*
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.*:129: Error: .*
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.*:130: Error: .*
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.*:131: Error: .*
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.*:132: Error: .*
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.*:133: Error: .*
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.*:134: Error: .*
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.*:135: Error: .*
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.*:136: Error: .*
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.*:137: Error: .*
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.*:138: Error: .*
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.*:139: Error: .*
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.*:140: Error: .*
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.*:141: Error: .*
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.*:142: Error: .*
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.*:143: Error: .*
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.*:144: Error: .*
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.*:145: Error: .*
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.*:146: Error: .*
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.*:147: Error: .*
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.*:148: Error: .*
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.*:149: Error: .*
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.*:150: Error: .*
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.*:151: Error: .*
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#...
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.*:152: Error: .*
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#...
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.*:153: Error: .*
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#...
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.*:154: Error: .*
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#...
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.*:155: Error: .*
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.*:156: Error: .*
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.*:157: Error: .*
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.*:158: Error: .*
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.*:159: Error: .*
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.*:160: Error: .*
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.*:161: Warning: .*
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.*:162: Warning: .*
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.*:164: Error: .*
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.*:165: Warning: .*
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.*:165: Error: .*
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.*:161: Error: .*
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.*:162: Error: .*
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.*:163: Warning: .*
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.*:164: Warning: .*
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.*:166: Error: .*
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.*:167: Warning: .*
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.*:167: Error: .*
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@ -17,6 +17,8 @@ start:
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addss xmm0, qword ptr [eax]
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addss xmm0, tbyte ptr [eax]
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addss xmm0, xmmword ptr [eax]
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bound eax, dword ptr [ebx]
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bound ax, word ptr [ebx]
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call byte ptr [eax]
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call qword ptr [eax]
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call tbyte ptr [eax]
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@ -25,6 +25,8 @@ Disassembly of section .text:
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[ ]*[0-9a-f]+: f2 0f 58 00[ ]+addsd[ ]+xmm0,QWORD PTR \[eax\]
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[ ]*[0-9a-f]+: f3 0f 58 00[ ]+addss[ ]+xmm0,DWORD PTR \[eax\]
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[ ]*[0-9a-f]+: f3 0f 58 00[ ]+addss[ ]+xmm0,DWORD PTR \[eax\]
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[ ]*[0-9a-f]+: 66 62 01[ ]+bound[ ]+ax,(DWORD PTR )?\[ecx\]
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[ ]*[0-9a-f]+: 62 01[ ]+bound[ ]+eax,(QWORD PTR )?\[ecx\]
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[ ]*[0-9a-f]+: 66 ff 10[ ]+call[ ]+WORD PTR \[eax\]
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[ ]*[0-9a-f]+: ff 10[ ]+call[ ]+DWORD PTR \[eax\]
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[ ]*[0-9a-f]+: ff 18[ ]+call[ ]+FWORD PTR \[eax\]
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@ -1,8 +1,8 @@
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.*: Assembler messages:
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.*:173: Warning: .* taken to mean just .*
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.*:180: Warning: Treating .* as memory reference
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.*:181: Warning: .* taken to mean just .*
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.*:181: Warning: Treating .* as memory reference
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.*:184: Warning: Treating .* as memory reference
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.*:185: Warning: Treating .* as memory reference
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.*:188: Warning: Treating .* as memory reference
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.*:175: Warning: .* taken to mean just .*
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.*:182: Warning: Treating .* as memory reference
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.*:183: Warning: .* taken to mean just .*
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.*:183: Warning: Treating .* as memory reference
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.*:186: Warning: Treating .* as memory reference
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.*:187: Warning: Treating .* as memory reference
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.*:190: Warning: Treating .* as memory reference
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@ -29,6 +29,8 @@ start:
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addsd xmm0, qword ptr [eax]
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addss xmm0, [eax]
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addss xmm0, dword ptr [eax]
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bound ax, dword ptr [ecx]
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bound eax, qword ptr [ecx]
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call word ptr [eax]
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call dword ptr [eax]
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call fword ptr [eax]
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@ -101,7 +101,7 @@ Disassembly of section .text:
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*[0-9a-f]+: 5f[ ]+pop[ ]+edi
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*[0-9a-f]+: 60[ ]+pusha[ ]*
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*[0-9a-f]+: 61[ ]+popa[ ]*
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*[0-9a-f]+: 62 90 90 90 90 90[ ]+bound[ ]+edx,(DWORD PTR )?\[eax-0x6f6f6f70\]
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*[0-9a-f]+: 62 90 90 90 90 90[ ]+bound[ ]+edx,(QWORD PTR )?\[eax-0x6f6f6f70\]
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*[0-9a-f]+: 63 90 90 90 90 90[ ]+arpl[ ]+(WORD PTR )?\[eax-0x6f6f6f70\],dx
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*[0-9a-f]+: 68 90 90 90 90[ ]+push[ ]+0x90909090
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*[0-9a-f]+: 69 90 90 90 90 90 90 90 90 90[ ]+imul[ ]+edx,(DWORD PTR )?\[eax-0x6f6f6f70\],0x90909090
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@ -477,7 +477,7 @@ Disassembly of section .text:
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*[0-9a-f]+: 60[ ]+pusha[ ]*
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*[0-9a-f]+: 66[ ]+data16
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*[0-9a-f]+: 61[ ]+popa[ ]*
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*[0-9a-f]+: 66 62 90 90 90 90 90[ ]+bound[ ]+dx,(WORD PTR )?\[eax-0x6f6f6f70\]
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*[0-9a-f]+: 66 62 90 90 90 90 90[ ]+bound[ ]+dx,(DWORD PTR )?\[eax-0x6f6f6f70\]
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*[0-9a-f]+: 66 68 90 90[ ]+push[ ]+0x9090
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*[0-9a-f]+: 66 69 90 90 90 90 90 90 90[ ]+imul[ ]+dx,(WORD PTR )?\[eax-0x6f6f6f70\],0x9090
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*[0-9a-f]+: 66[ ]+data16
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@ -1,3 +1,12 @@
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2008-02-13 Jan Beulich <jbeulich@novell.com>
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* i386-dis.c (a_mode): New.
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(cond_jump_mode): Adjust.
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(Ma): Change to a_mode.
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(intel_operand_size): Handle a_mode.
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* i386-opc.tbl: Allow Dword and Qword for bound.
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* i386-tbl.h: Re-generate.
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2008-02-13 Jan Beulich <jbeulich@novell.com>
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* i386-gen.c (process_i386_registers): Process new fields.
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@ -231,7 +231,7 @@ fetch_data (struct disassemble_info *info, bfd_byte *addr)
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#define Em { OP_E, m_mode }
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#define Ew { OP_E, w_mode }
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#define M { OP_M, 0 } /* lea, lgdt, etc. */
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#define Ma { OP_M, v_mode }
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#define Ma { OP_M, a_mode }
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#define Mb { OP_M, b_mode }
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#define Md { OP_M, d_mode }
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#define Mp { OP_M, f_mode } /* 32 or 48 bit memory operand for LDS, LES etc */
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@ -378,7 +378,9 @@ fetch_data (struct disassemble_info *info, bfd_byte *addr)
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#define x_mode (t_mode + 1)
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/* d_mode in 32bit, q_mode in 64bit mode. */
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#define m_mode (x_mode + 1)
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#define cond_jump_mode (m_mode + 1)
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/* pair of v_mode operands */
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#define a_mode (m_mode + 1)
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#define cond_jump_mode (a_mode + 1)
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#define loop_jcxz_mode (cond_jump_mode + 1)
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/* operand size depends on REX prefixes. */
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#define dq_mode (loop_jcxz_mode + 1)
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@ -6544,6 +6546,13 @@ intel_operand_size (int bytemode, int sizeflag)
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if (!(rex & REX_W))
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used_prefixes |= (prefixes & PREFIX_DATA);
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break;
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case a_mode:
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if (sizeflag & DFLAG)
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oappend ("QWORD PTR ");
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else
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oappend ("DWORD PTR ");
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used_prefixes |= (prefixes & PREFIX_DATA);
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break;
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case d_mode:
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case dqd_mode:
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oappend ("DWORD PTR ");
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@ -488,7 +488,7 @@ iret, 0, 0xcf, None, 1, 0, DefaultSize|No_bSuf|No_sSuf|No_ldSuf, { 0 }
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// i386sl, i486sl, later 486, and Pentium.
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rsm, 0, 0xfaa, None, 2, Cpu386, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { 0 }
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bound, 2, 0x62, None, 1, Cpu186|CpuNo64, Modrm|No_bSuf|No_sSuf|No_qSuf|No_ldSuf, { Reg16|Reg32, Unspecified|BaseIndex|Disp8|Disp16|Disp32 }
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bound, 2, 0x62, None, 1, Cpu186|CpuNo64, Modrm|No_bSuf|No_sSuf|No_qSuf|No_ldSuf, { Reg16|Reg32, Dword|Qword|Unspecified|BaseIndex|Disp8|Disp16|Disp32 }
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hlt, 0, 0xf4, None, 1, 0, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { 0 }
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@ -3713,7 +3713,7 @@ const template i386_optab[] =
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 0 } },
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{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
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1, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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1, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0,
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1, 0, 0 } } } },
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{ "hlt", 0, 0xf4, None, 1,
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{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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