mirror of
https://github.com/darlinghq/darling-gdb.git
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* msp430-decode.opc: New.
* msp430-decode.c: New/generated.
* Makefile.am (TARGET_LIBOPCODES_CFILES): Add msp430-decode.c.
(MAINTAINER_CLEANFILES): Likewise.
Add rule to build msp430-decode.c frommsp430decode.opc
using the opc2c program.
* Makefile.in: Regenerate.
* configure.in: Add msp430-decode.lo to msp430 architecture files.
* configure: Regenerate.
* msp430-decode.h: New.
This commit is contained in:
Nick Clifton
parent
3346cfda88
commit
34c911a458
130
include/opcode/msp430-decode.h
Normal file
130
include/opcode/msp430-decode.h
Normal file
@ -0,0 +1,130 @@
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/* Opcode decoder for the TI MSP430
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Copyright 2012-2013 Free Software Foundation, Inc.
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Written by DJ Delorie <dj@redhat.com>
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This file is part of GDB, the GNU Debugger.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
|
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along with this program; if not, write to the Free Software
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Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA
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02110-1301, USA. */
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typedef enum
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{
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MSO_unknown,
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/* Double-operand instructions - all repeat .REPEATS times. */
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MSO_mov, /* dest = src */
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MSO_add, /* dest += src */
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MSO_addc, /* dest += src + carry */
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MSO_subc, /* dest -= (src-1) + carry */
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MSO_sub, /* dest -= src */
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MSO_cmp, /* dest - src -> status */
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MSO_dadd, /* dest += src (as BCD) */
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MSO_bit, /* dest & src -> status */
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MSO_bic, /* dest &= ~src (bit clear) */
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MSO_bis, /* dest |= src (bit set, OR) */
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MSO_xor, /* dest ^= src */
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MSO_and, /* dest &= src */
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/* Single-operand instructions. */
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MSO_rrc, /* Rotate through carry, dest >>= .REPEATS. */
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MSO_swpb, /* Swap lower bytes of operand. */
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MSO_rra, /* Signed shift dest >>= .REPEATS. */
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MSO_sxt, /* Sign extend lower byte. */
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MSO_push, /* Push .REPEATS registers (or other op) starting at SRC going towards R0. */
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MSO_pop, /* Pop .REPEATS registers starting at DEST going towards R15. */
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MSO_call,
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MSO_reti,
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/* Jumps. */
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MSO_jmp, /* PC = SRC if .COND true. */
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/* Extended single-operand instructions. */
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MSO_rru, /* Unsigned shift right, dest >>= .REPEATS. */
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} MSP430_Opcode_ID;
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typedef enum
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{
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MSP430_Operand_None,
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MSP430_Operand_Immediate,
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MSP430_Operand_Register,
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MSP430_Operand_Indirect,
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MSP430_Operand_Indirect_Postinc
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} MSP430_Operand_Type;
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typedef enum
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{
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MSR_0 = 0,
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MSR_PC = 0,
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MSR_SP = 1,
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MSR_SR = 2,
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MSR_CG = 3,
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MSR_None = 16,
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} MSP430_Register;
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typedef struct
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{
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MSP430_Operand_Type type;
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int addend;
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MSP430_Register reg : 8;
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MSP430_Register reg2 : 8;
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unsigned char bit_number : 4;
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unsigned char condition : 3;
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} MSP430_Opcode_Operand;
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typedef enum
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{
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MSP430_Byte = 0,
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MSP430_Word,
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MSP430_Addr
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} MSP430_Size;
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/* These numerically match the bit encoding. */
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typedef enum
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{
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MSC_nz = 0,
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MSC_z,
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MSC_nc,
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MSC_c,
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MSC_n,
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MSC_ge,
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MSC_l,
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MSC_true,
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} MSP430_Condition;
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#define MSP430_FLAG_C 0x01
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#define MSP430_FLAG_Z 0x02
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#define MSP430_FLAG_N 0x04
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#define MSP430_FLAG_V 0x80
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typedef struct
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{
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int lineno;
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MSP430_Opcode_ID id;
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unsigned flags_1:8; /* These flags are set to '1' by the insn. */
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unsigned flags_0:8; /* These flags are set to '0' by the insn. */
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unsigned flags_set:8; /* These flags are set appropriately by the insn. */
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unsigned zc:1; /* If set, pretend the carry bit is zero. */
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unsigned repeat_reg:1; /* If set, count is in REG[repeats]. */
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unsigned ofs_430x:1; /* If set, the offset in any operand is 430x (else use 430 compatibility mode). */
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unsigned repeats:5; /* Contains COUNT-1, or register number. */
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int n_bytes; /* Opcode size in BYTES. */
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char * syntax;
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MSP430_Size size; /* Operand size in BITS. */
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MSP430_Condition cond;
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/* By convention, these are [0]destination, [1]source. */
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MSP430_Opcode_Operand op[2];
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} MSP430_Opcode_Decoded;
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int msp430_decode_opcode (unsigned long, MSP430_Opcode_Decoded *, int (*)(void *), void *);
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@ -1,3 +1,15 @@
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2013-06-21 DJ Delorie <dj@redhat.com>
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* msp430-decode.opc: New.
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* msp430-decode.c: New/generated.
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* Makefile.am (TARGET_LIBOPCODES_CFILES): Add msp430-decode.c.
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(MAINTAINER_CLEANFILES): Likewise.
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Add rule to build msp430-decode.c frommsp430decode.opc
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using the opc2c program.
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* Makefile.in: Regenerate.
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* configure.in: Add msp430-decode.lo to msp430 architecture files.
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* configure: Regenerate.
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2013-06-20 Yufeng Zhang <yufeng.zhang@arm.com>
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* aarch64-dis.c (EMBEDDED_ENV): Remove the check on it.
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@ -199,6 +199,7 @@ TARGET_LIBOPCODES_CFILES = \
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mmix-opc.c \
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moxie-dis.c \
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moxie-opc.c \
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msp430-decode.c \
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msp430-dis.c \
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mt-asm.c \
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mt-desc.c \
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@ -516,6 +517,7 @@ MOSTLYCLEANFILES = aarch64-gen$(EXEEXT_FOR_BUILD) i386-gen$(EXEEXT_FOR_BUILD) \
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MAINTAINERCLEANFILES = $(srcdir)/aarch64-asm-2.c $(srcdir)/aarch64-dis-2.c \
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$(srcdir)/aarch64-opc-2.c $(srcdir)/i386-tbl.h $(srcdir)/i386-init.h \
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$(srcdir)/ia64-asmtab.c $(srcdir)/z8k-opc.h \
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$(srcdir)/msp430-decode.c \
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$(srcdir)/rl78-decode.c \
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$(srcdir)/rx-decode.c
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@ -569,6 +571,9 @@ $(srcdir)/ia64-asmtab.c: @MAINT@ $(ia64_asmtab_deps)
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ia64-opc.lo: $(srcdir)/ia64-asmtab.c
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$(srcdir)/msp430-decode.c: @MAINT@ $(srcdir)/msp430-decode.opc opc2c$(EXEEXT_FOR_BUILD)
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./opc2c$(EXEEXT_FOR_BUILD) $(srcdir)/msp430-decode.opc > $(srcdir)/msp430-decode.c
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$(srcdir)/rl78-decode.c: @MAINT@ $(srcdir)/rl78-decode.opc opc2c$(EXEEXT_FOR_BUILD)
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./opc2c$(EXEEXT_FOR_BUILD) $(srcdir)/rl78-decode.opc > $(srcdir)/rl78-decode.c
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@ -471,6 +471,7 @@ TARGET_LIBOPCODES_CFILES = \
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mmix-opc.c \
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moxie-dis.c \
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moxie-opc.c \
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msp430-decode.c \
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msp430-dis.c \
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mt-asm.c \
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mt-desc.c \
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@ -641,6 +642,7 @@ MOSTLYCLEANFILES = aarch64-gen$(EXEEXT_FOR_BUILD) i386-gen$(EXEEXT_FOR_BUILD) \
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MAINTAINERCLEANFILES = $(srcdir)/aarch64-asm-2.c $(srcdir)/aarch64-dis-2.c \
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$(srcdir)/aarch64-opc-2.c $(srcdir)/i386-tbl.h $(srcdir)/i386-init.h \
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$(srcdir)/ia64-asmtab.c $(srcdir)/z8k-opc.h \
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$(srcdir)/msp430-decode.c \
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$(srcdir)/rl78-decode.c \
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$(srcdir)/rx-decode.c
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@ -870,6 +872,7 @@ distclean-compile:
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@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/mmix-opc.Plo@am__quote@
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@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/moxie-dis.Plo@am__quote@
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@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/moxie-opc.Plo@am__quote@
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@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/msp430-decode.Plo@am__quote@
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@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/msp430-dis.Plo@am__quote@
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@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/mt-asm.Plo@am__quote@
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@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/mt-desc.Plo@am__quote@
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@ -1429,6 +1432,9 @@ $(srcdir)/ia64-asmtab.c: @MAINT@ $(ia64_asmtab_deps)
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ia64-opc.lo: $(srcdir)/ia64-asmtab.c
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$(srcdir)/msp430-decode.c: @MAINT@ $(srcdir)/msp430-decode.opc opc2c$(EXEEXT_FOR_BUILD)
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./opc2c$(EXEEXT_FOR_BUILD) $(srcdir)/msp430-decode.opc > $(srcdir)/msp430-decode.c
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$(srcdir)/rl78-decode.c: @MAINT@ $(srcdir)/rl78-decode.opc opc2c$(EXEEXT_FOR_BUILD)
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./opc2c$(EXEEXT_FOR_BUILD) $(srcdir)/rl78-decode.opc > $(srcdir)/rl78-decode.c
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2
opcodes/configure
vendored
2
opcodes/configure
vendored
@ -12539,7 +12539,7 @@ if test x${all_targets} = xfalse ; then
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bfd_mn10200_arch) ta="$ta m10200-dis.lo m10200-opc.lo" ;;
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bfd_mn10300_arch) ta="$ta m10300-dis.lo m10300-opc.lo" ;;
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bfd_mt_arch) ta="$ta mt-asm.lo mt-desc.lo mt-dis.lo mt-ibld.lo mt-opc.lo" using_cgen=yes ;;
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bfd_msp430_arch) ta="$ta msp430-dis.lo" ;;
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bfd_msp430_arch) ta="$ta msp430-dis.lo msp430-decode.lo" ;;
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bfd_nios2_arch) ta="$ta nios2-dis.lo nios2-opc.lo" ;;
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bfd_ns32k_arch) ta="$ta ns32k-dis.lo" ;;
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bfd_openrisc_arch) ta="$ta openrisc-asm.lo openrisc-desc.lo openrisc-dis.lo openrisc-ibld.lo openrisc-opc.lo" using_cgen=yes ;;
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@ -292,7 +292,7 @@ if test x${all_targets} = xfalse ; then
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bfd_mn10200_arch) ta="$ta m10200-dis.lo m10200-opc.lo" ;;
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bfd_mn10300_arch) ta="$ta m10300-dis.lo m10300-opc.lo" ;;
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bfd_mt_arch) ta="$ta mt-asm.lo mt-desc.lo mt-dis.lo mt-ibld.lo mt-opc.lo" using_cgen=yes ;;
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bfd_msp430_arch) ta="$ta msp430-dis.lo" ;;
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bfd_msp430_arch) ta="$ta msp430-dis.lo msp430-decode.lo" ;;
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bfd_nios2_arch) ta="$ta nios2-dis.lo nios2-opc.lo" ;;
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bfd_ns32k_arch) ta="$ta ns32k-dis.lo" ;;
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bfd_openrisc_arch) ta="$ta openrisc-asm.lo openrisc-desc.lo openrisc-dis.lo openrisc-ibld.lo openrisc-opc.lo" using_cgen=yes ;;
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4327
opcodes/msp430-decode.c
Normal file
4327
opcodes/msp430-decode.c
Normal file
File diff suppressed because it is too large
Load Diff
590
opcodes/msp430-decode.opc
Normal file
590
opcodes/msp430-decode.opc
Normal file
@ -0,0 +1,590 @@
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/* -*- c -*- */
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/* Copyright 2013 Free Software Foundation, Inc.
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Contributed by Red Hat.
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Written by DJ Delorie.
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This file is part of the GNU opcodes library.
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This library is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
|
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the Free Software Foundation; either version 3, or (at your option)
|
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any later version.
|
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It is distributed in the hope that it will be useful, but WITHOUT
|
||||
ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
|
||||
or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
|
||||
License for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License
|
||||
along with this program; if not, write to the Free Software
|
||||
Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
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MA 02110-1301, USA. */
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#include "sysdep.h"
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#include <stdio.h>
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#include <stdlib.h>
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#include <string.h>
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#include "ansidecl.h"
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#include "opcode/msp430-decode.h"
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static int trace = 0;
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typedef struct
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{
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MSP430_Opcode_Decoded *msp430;
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int (*getbyte)(void *);
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void *ptr;
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unsigned char *op;
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int op_ptr;
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int pc;
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} LocalData;
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#define AU ATTRIBUTE_UNUSED
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#define GETBYTE() getbyte_swapped (ld)
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#define B ((unsigned long) GETBYTE ())
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static int
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getbyte_swapped (LocalData *ld)
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{
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int b;
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if (ld->op_ptr == ld->msp430->n_bytes)
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{
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do
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{
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b = ld->getbyte (ld->ptr);
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ld->op [(ld->msp430->n_bytes++)^1] = b;
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}
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while (ld->msp430->n_bytes & 1);
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}
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return ld->op[ld->op_ptr++];
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}
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#define ID(x) msp430->id = x
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#define OP(n, t, r, a) (msp430->op[n].type = t, \
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msp430->op[n].reg = r, \
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msp430->op[n].addend = a)
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#define OPX(n, t, r1, r2, a) \
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(msp430->op[n].type = t, \
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msp430->op[n].reg = r1, \
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msp430->op[n].reg2 = r2, \
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msp430->op[n].addend = a)
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#define SYNTAX(x) msp430->syntax = x
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#define UNSUPPORTED() msp430->syntax = "*unknown*"
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#define DC(c) OP (0, MSP430_Operand_Immediate, 0, c)
|
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#define DR(r) OP (0, MSP430_Operand_Register, r, 0)
|
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#define DM(r, a) OP (0, MSP430_Operand_Indirect, r, a)
|
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#define DA(a) OP (0, MSP430_Operand_Indirect, MSR_None, a)
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#define AD(r, ad) encode_ad (r, ad, ld, 0)
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#define ADX(r, ad, x) encode_ad (r, ad, ld, x)
|
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|
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#define SC(c) OP (1, MSP430_Operand_Immediate, 0, c)
|
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#define SR(r) OP (1, MSP430_Operand_Register, r, 0)
|
||||
#define SM(r, a) OP (1, MSP430_Operand_Indirect, r, a)
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#define SA(a) OP (1, MSP430_Operand_Indirect, MSR_None, a)
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#define SI(r) OP (1, MSP430_Operand_Indirect_Postinc, r, 0)
|
||||
#define AS(r, as) encode_as (r, as, ld, 0)
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#define ASX(r, as, x) encode_as (r, as, ld, x)
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||||
#define BW(x) msp430->size = (x ? 8 : 16)
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/* The last 20 is for SWPBX.Z and SXTX.A. */
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#define ABW(a,x) msp430->size = (a ? ((x ? 8 : 16)) : (x ? 20 : 20))
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||||
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||||
#define IMMU(bytes) immediate (bytes, 0, ld)
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#define IMMS(bytes) immediate (bytes, 1, ld)
|
||||
|
||||
/* Helper macros for known status bits settings. */
|
||||
#define F_____ msp430->flags_1 = msp430->flags_0 = 0; msp430->flags_set = 0
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||||
#define F_VNZC msp430->flags_1 = msp430->flags_0 = 0; msp430->flags_set = 0x87
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||||
#define F_0NZC msp430->flags_1 = 0; msp430->flags_0 = 0x80; msp430->flags_set = 0x07
|
||||
|
||||
|
||||
/* The chip is little-endian, but GETBYTE byte-swaps words because the
|
||||
decoder is based on 16-bit "words" so *this* logic is big-endian. */
|
||||
|
||||
static int
|
||||
immediate (int bytes, int sign_extend, LocalData *ld)
|
||||
{
|
||||
unsigned long i = 0;
|
||||
|
||||
switch (bytes)
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||||
{
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||||
case 1:
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||||
i |= B;
|
||||
if (sign_extend && (i & 0x80))
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||||
i -= 0x100;
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||||
break;
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||||
case 2:
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i |= B << 8;
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i |= B;
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if (sign_extend && (i & 0x8000))
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i -= 0x10000;
|
||||
break;
|
||||
case 3:
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i |= B << 16;
|
||||
i |= B << 8;
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||||
i |= B;
|
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if (sign_extend && (i & 0x800000))
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||||
i -= 0x1000000;
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||||
break;
|
||||
case 4:
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i |= B << 24;
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||||
i |= B << 16;
|
||||
i |= B << 8;
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||||
i |= B;
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||||
if (sign_extend && (i & 0x80000000ULL))
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||||
i -= 0x100000000ULL;
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||||
break;
|
||||
default:
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||||
fprintf (stderr,
|
||||
"Programmer error: immediate() called with invalid byte count %d\n",
|
||||
bytes);
|
||||
abort ();
|
||||
}
|
||||
return i;
|
||||
}
|
||||
|
||||
/*
|
||||
PC SP SR CG
|
||||
As
|
||||
00 Rn - - R2 #0
|
||||
01 X(Rn) Sym - X(abs) #1
|
||||
10 (Rn) - - #4 #2
|
||||
11 (Rn++) #imm - #8 #-1
|
||||
|
||||
Ad
|
||||
0 Rn - - - -
|
||||
1 X(Rn) Sym - X(abs) - */
|
||||
|
||||
static void
|
||||
encode_ad (int reg, int ad, LocalData *ld, int ext)
|
||||
{
|
||||
MSP430_Opcode_Decoded *msp430 = ld->msp430;
|
||||
|
||||
if (ad)
|
||||
{
|
||||
int x = IMMU(2) | (ext << 16);
|
||||
switch (reg)
|
||||
{
|
||||
case 0: /* (PC) -> Symbolic. */
|
||||
DA (x + ld->pc + ld->op_ptr - 2);
|
||||
break;
|
||||
case 2: /* (SR) -> Absolute. */
|
||||
DA (x);
|
||||
break;
|
||||
default:
|
||||
DM (reg, x);
|
||||
break;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
DR (reg);
|
||||
}
|
||||
}
|
||||
|
||||
static void
|
||||
encode_as (int reg, int as, LocalData *ld, int ext)
|
||||
{
|
||||
MSP430_Opcode_Decoded *msp430 = ld->msp430;
|
||||
int x;
|
||||
|
||||
switch (as)
|
||||
{
|
||||
case 0:
|
||||
switch (reg)
|
||||
{
|
||||
case 3:
|
||||
SC (0);
|
||||
break;
|
||||
default:
|
||||
SR (reg);
|
||||
break;
|
||||
}
|
||||
break;
|
||||
case 1:
|
||||
switch (reg)
|
||||
{
|
||||
case 0: /* PC -> Symbolic. */
|
||||
x = IMMU(2) | (ext << 16);
|
||||
SA (x + ld->pc + ld->op_ptr - 2);
|
||||
break;
|
||||
case 2: /* SR -> Absolute. */
|
||||
x = IMMU(2) | (ext << 16);
|
||||
SA (x);
|
||||
break;
|
||||
case 3:
|
||||
SC (1);
|
||||
break;
|
||||
default:
|
||||
x = IMMU(2) | (ext << 16);
|
||||
SM (reg, x);
|
||||
break;
|
||||
}
|
||||
break;
|
||||
case 2:
|
||||
switch (reg)
|
||||
{
|
||||
case 2:
|
||||
SC (4);
|
||||
break;
|
||||
case 3:
|
||||
SC (2);
|
||||
break;
|
||||
case MSR_None:
|
||||
SA (0);
|
||||
default:
|
||||
SM (reg, 0);
|
||||
break;
|
||||
}
|
||||
break;
|
||||
case 3:
|
||||
switch (reg)
|
||||
{
|
||||
case 0:
|
||||
{
|
||||
/* This fetch *is* the *PC++ that the opcode encodes :-) */
|
||||
x = IMMU(2) | (ext << 16);
|
||||
SC (x);
|
||||
}
|
||||
break;
|
||||
case 2:
|
||||
SC (8);
|
||||
break;
|
||||
case 3:
|
||||
SC (-1);
|
||||
break;
|
||||
default:
|
||||
SI (reg);
|
||||
break;
|
||||
}
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
static void
|
||||
encode_rep_zc (int srxt, int dsxt, LocalData *ld)
|
||||
{
|
||||
MSP430_Opcode_Decoded *msp430 = ld->msp430;
|
||||
|
||||
msp430->repeat_reg = srxt & 1;
|
||||
msp430->repeats = dsxt;
|
||||
msp430->zc = (srxt & 2) ? 1 : 0;
|
||||
}
|
||||
|
||||
#define REPZC(s,d) encode_rep_zc (s, d, ld)
|
||||
|
||||
static int
|
||||
dopc_to_id (int dopc)
|
||||
{
|
||||
switch (dopc)
|
||||
{
|
||||
case 4: return MSO_mov;
|
||||
case 5: return MSO_add;
|
||||
case 6: return MSO_addc;
|
||||
case 7: return MSO_subc;
|
||||
case 8: return MSO_sub;
|
||||
case 9: return MSO_cmp;
|
||||
case 10: return MSO_dadd;
|
||||
case 11: return MSO_bit;
|
||||
case 12: return MSO_bic;
|
||||
case 13: return MSO_bis;
|
||||
case 14: return MSO_xor;
|
||||
case 15: return MSO_and;
|
||||
default: return MSO_unknown;
|
||||
}
|
||||
}
|
||||
|
||||
static int
|
||||
sopc_to_id (int sop, int c)
|
||||
{
|
||||
switch (sop * 2 + c)
|
||||
{
|
||||
case 0: return MSO_rrc;
|
||||
case 1: return MSO_swpb;
|
||||
case 2: return MSO_rra;
|
||||
case 3: return MSO_sxt;
|
||||
case 4: return MSO_push;
|
||||
case 5: return MSO_call;
|
||||
case 6: return MSO_reti;
|
||||
default: return MSO_unknown;
|
||||
}
|
||||
}
|
||||
|
||||
int
|
||||
msp430_decode_opcode (unsigned long pc,
|
||||
MSP430_Opcode_Decoded *msp430,
|
||||
int (*getbyte)(void *),
|
||||
void *ptr)
|
||||
{
|
||||
LocalData lds, *ld = &lds;
|
||||
unsigned char op_buf[20] = {0};
|
||||
unsigned char *op = op_buf;
|
||||
int raddr;
|
||||
int al_bit;
|
||||
int srxt_bits, dsxt_bits;
|
||||
|
||||
lds.msp430 = msp430;
|
||||
lds.getbyte = getbyte;
|
||||
lds.ptr = ptr;
|
||||
lds.op = op;
|
||||
lds.op_ptr = 0;
|
||||
lds.pc = pc;
|
||||
|
||||
memset (msp430, 0, sizeof (*msp430));
|
||||
|
||||
/* These are overridden by an extension word. */
|
||||
al_bit = 1;
|
||||
srxt_bits = 0;
|
||||
dsxt_bits = 0;
|
||||
|
||||
post_extension_word:
|
||||
;
|
||||
|
||||
/* 430X extention word. */
|
||||
/** 0001 1srx t l 00 dsxt 430x */
|
||||
|
||||
al_bit = l;
|
||||
srxt_bits = srx * 2 + t;
|
||||
dsxt_bits = dsxt;
|
||||
op = op_buf + lds.op_ptr;
|
||||
msp430->ofs_430x = 1;
|
||||
goto post_extension_word;
|
||||
|
||||
/* double-op insns:
|
||||
opcode:4 sreg:4 Ad:1 BW:1 As:2 Dreg:4
|
||||
|
||||
single-op insn:
|
||||
opcode:9 BW:1 Ad:2 DSreg:4
|
||||
|
||||
jumps:
|
||||
opcode:3 Cond:3 pcrel:10. */
|
||||
|
||||
/* Double-Operand "opcode" fields. */
|
||||
/** VARY dopc 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111 */
|
||||
|
||||
/** dopc sreg a b as dreg %D%b %1,%0 */
|
||||
|
||||
ID (dopc_to_id (dopc)); ASX (sreg, as, srxt_bits); ADX (dreg, a, dsxt_bits); ABW (al_bit, b);
|
||||
if (a == 0 && as == 0)
|
||||
REPZC (srxt_bits, dsxt_bits);
|
||||
|
||||
switch (msp430->id)
|
||||
{
|
||||
case MSO_mov: F_____; break;
|
||||
case MSO_add: F_VNZC; break;
|
||||
case MSO_addc: F_VNZC; break;
|
||||
case MSO_subc: F_VNZC; break;
|
||||
case MSO_sub: F_VNZC; break;
|
||||
case MSO_cmp: F_VNZC; break;
|
||||
case MSO_dadd: F_VNZC; break;
|
||||
case MSO_bit: F_0NZC; break;
|
||||
case MSO_bic: F_____; break;
|
||||
case MSO_bis: F_____; break;
|
||||
case MSO_xor: F_VNZC; break;
|
||||
case MSO_and: F_0NZC; break;
|
||||
default: break;
|
||||
}
|
||||
|
||||
/** 0001 00so c b ad dreg %S%b %1 */
|
||||
|
||||
ID (sopc_to_id (so,c)); ASX (dreg, ad, srxt_bits); ABW (al_bit, b);
|
||||
|
||||
if (ad == 0)
|
||||
REPZC (srxt_bits, dsxt_bits);
|
||||
|
||||
/* The helper functions encode for source, but it's
|
||||
both source and dest, with a few documented exceptions. */
|
||||
msp430->op[0] = msp430->op[1];
|
||||
|
||||
/* RETI ignores the operand. */
|
||||
if (msp430->id == MSO_reti)
|
||||
msp430->syntax = "%S";
|
||||
|
||||
switch (msp430->id)
|
||||
{
|
||||
case MSO_rrc: F_VNZC; break;
|
||||
case MSO_swpb: F_____; break;
|
||||
case MSO_rra: F_0NZC; break;
|
||||
case MSO_sxt: F_0NZC; break;
|
||||
case MSO_push: F_____; break;
|
||||
case MSO_call: F_____; break;
|
||||
case MSO_reti: F_VNZC; break;
|
||||
default: break;
|
||||
}
|
||||
|
||||
/* 20xx 0010 0000 ---- ----
|
||||
3cxx 0011 1100 ---- ----
|
||||
001j mp-- ---- ----. */
|
||||
/** 001jmp aa addrlsbs %J %1 */
|
||||
|
||||
raddr = (aa << 9) | (addrlsbs << 1);
|
||||
if (raddr & 0x400)
|
||||
raddr = raddr - 0x800;
|
||||
/* This is a pc-relative jump, but we don't use SM because that
|
||||
would load the target address from the memory at X(PC), not use
|
||||
PC+X *as* the address. So we use SC to use the address, not the
|
||||
data at that address. */
|
||||
ID (MSO_jmp); SC (pc + raddr + msp430->n_bytes);
|
||||
msp430->cond = jmp;
|
||||
|
||||
/* Extended instructions. */
|
||||
|
||||
/** 0000 srcr 0000 dstr MOVA @%1, %0 */
|
||||
ID (MSO_mov); SM (srcr, 0); DR (dstr);
|
||||
msp430->size = 20;
|
||||
msp430->ofs_430x = 1;
|
||||
|
||||
/** 0000 srcr 0001 dstr MOVA @%1+, %0 */
|
||||
ID (MSO_mov); SI (srcr); DR (dstr);
|
||||
msp430->size = 20;
|
||||
msp430->ofs_430x = 1;
|
||||
|
||||
/** 0000 srcr 0010 dstr MOVA &%1, %0 */
|
||||
ID (MSO_mov); SA ((srcr << 16) + IMMU(2)); DR (dstr);
|
||||
msp430->size = 20;
|
||||
msp430->ofs_430x = 1;
|
||||
|
||||
/** 0000 srcr 0011 dstr MOVA %1, %0 */
|
||||
ID (MSO_mov); SM (srcr, IMMS(2)); DR (dstr);
|
||||
msp430->size = 20;
|
||||
msp430->ofs_430x = 1;
|
||||
|
||||
/** 0000 srcr 0110 dstr MOVA %1, &%0 */
|
||||
ID (MSO_mov); SR (srcr); DA ((dstr << 16) + IMMU(2));
|
||||
msp430->size = 20;
|
||||
msp430->ofs_430x = 1;
|
||||
|
||||
/** 0000 srcr 0111 dstr MOVA %1, &%0 */
|
||||
ID (MSO_mov); SR (srcr); DM (dstr, IMMS(2));
|
||||
msp430->size = 20;
|
||||
msp430->ofs_430x = 1;
|
||||
|
||||
/** 0000 srcr 1000 dstr MOVA %1, %0 */
|
||||
ID (MSO_mov); SC ((srcr << 16) + IMMU(2)); DR (dstr);
|
||||
msp430->size = 20;
|
||||
msp430->ofs_430x = 1;
|
||||
|
||||
/** 0000 srcr 1001 dstr CMPA %1, %0 */
|
||||
ID (MSO_cmp); SC ((srcr << 16) + IMMU(2)); DR (dstr);
|
||||
msp430->size = 20;
|
||||
msp430->ofs_430x = 1;
|
||||
F_VNZC;
|
||||
|
||||
/** 0000 srcr 1010 dstr ADDA %1, %0 */
|
||||
ID (MSO_add); SC ((srcr << 16) + IMMU(2)); DR (dstr);
|
||||
msp430->size = 20;
|
||||
msp430->ofs_430x = 1;
|
||||
F_VNZC;
|
||||
|
||||
/** 0000 srcr 1011 dstr SUBA %1, %0 */
|
||||
ID (MSO_sub); SC ((srcr << 16) + IMMU(2)); DR (dstr);
|
||||
msp430->size = 20;
|
||||
msp430->ofs_430x = 1;
|
||||
F_VNZC;
|
||||
|
||||
/** 0000 srcr 1011 dstr SUBA %1, %0 */
|
||||
ID (MSO_sub); SC ((srcr << 16) + IMMU(2)); DR (dstr);
|
||||
msp430->size = 20;
|
||||
msp430->ofs_430x = 1;
|
||||
F_VNZC;
|
||||
|
||||
/** 0000 srcr 1100 dstr MOVA %1, %0 */
|
||||
ID (MSO_mov); SR (srcr); DR (dstr);
|
||||
msp430->size = 20;
|
||||
msp430->ofs_430x = 1;
|
||||
|
||||
/** 0000 srcr 1101 dstr CMPA %1, %0 */
|
||||
ID (MSO_cmp); SR (srcr); DR (dstr);
|
||||
msp430->size = 20;
|
||||
msp430->ofs_430x = 1;
|
||||
F_VNZC;
|
||||
|
||||
/** 0000 srcr 1110 dstr ADDA %1, %0 */
|
||||
ID (MSO_add); SR (srcr); DR (dstr);
|
||||
msp430->size = 20;
|
||||
msp430->ofs_430x = 1;
|
||||
F_VNZC;
|
||||
|
||||
/** 0000 srcr 1111 dstr SUBA %1, %0 */
|
||||
ID (MSO_sub); SR (srcr); DR (dstr);
|
||||
msp430->size = 20;
|
||||
msp430->ofs_430x = 1;
|
||||
F_VNZC;
|
||||
|
||||
/** 0000 bt00 010w dstr RRCM.A %c, %0 */
|
||||
ID (MSO_rrc); DR (dstr); SR (dstr);
|
||||
msp430->repeats = bt;
|
||||
msp430->size = w ? 16 : 20;
|
||||
msp430->ofs_430x = 1;
|
||||
F_0NZC;
|
||||
|
||||
/** 0000 bt01 010w dstr RRAM.A %c, %0 */
|
||||
ID (MSO_rra); DR (dstr); SR (dstr);
|
||||
msp430->repeats = bt;
|
||||
msp430->size = w ? 16 : 20;
|
||||
msp430->ofs_430x = 1;
|
||||
F_0NZC;
|
||||
|
||||
/** 0000 bt10 010w dstr RLAM.A %c, %0 */
|
||||
ID (MSO_add); DR (dstr); SR (dstr);
|
||||
msp430->repeats = bt;
|
||||
msp430->size = w ? 16 : 20;
|
||||
msp430->ofs_430x = 1;
|
||||
F_0NZC;
|
||||
|
||||
/** 0000 bt11 010w dstr RRUM.A %c, %0 */
|
||||
ID (MSO_rru); DR (dstr); SR (dstr);
|
||||
msp430->repeats = bt;
|
||||
msp430->size = w ? 16 : 20;
|
||||
msp430->ofs_430x = 1;
|
||||
F_0NZC;
|
||||
|
||||
/** 0001 0011 0000 0000 RETI */
|
||||
ID (MSO_reti);
|
||||
msp430->size = 20;
|
||||
msp430->ofs_430x = 1;
|
||||
|
||||
/** 0001 0011 01as dstr CALLA %0 */
|
||||
ID (MSO_call); AS (dstr, as);
|
||||
msp430->size = 20;
|
||||
msp430->ofs_430x = 1;
|
||||
|
||||
/** 0001 0011 1000 extb CALLA %0 */
|
||||
ID (MSO_call); SA (IMMU(2) | (extb << 16));
|
||||
msp430->size = 20;
|
||||
msp430->ofs_430x = 1;
|
||||
|
||||
/** 0001 0011 1001 extb CALLA %0 */
|
||||
raddr = IMMU(2) | (extb << 16);
|
||||
if (raddr & 0x80000)
|
||||
raddr -= 0x100000;
|
||||
ID (MSO_call); SA (pc + raddr + msp430->n_bytes);
|
||||
msp430->size = 20;
|
||||
msp430->ofs_430x = 1;
|
||||
|
||||
/** 0001 0011 1011 extb CALLA %0 */
|
||||
ID (MSO_call); SC (IMMU(2) | (extb << 16));
|
||||
msp430->size = 20;
|
||||
msp430->ofs_430x = 1;
|
||||
|
||||
/** 0001 010w bits srcr PUSHM.A %0 */
|
||||
ID (MSO_push); SR (srcr);
|
||||
msp430->size = w ? 16 : 20;
|
||||
msp430->repeats = bits;
|
||||
msp430->ofs_430x = 1;
|
||||
|
||||
/** 0001 011w bits dstr POPM.A %0 */
|
||||
ID (MSO_pop); DR (dstr);
|
||||
msp430->size = w ? 16 : 20;
|
||||
msp430->repeats = bits;
|
||||
msp430->ofs_430x = 1;
|
||||
|
||||
/** */
|
||||
|
||||
return msp430->n_bytes;
|
||||
}
|
||||
@ -148,6 +148,7 @@ mmix-dis.c
|
||||
mmix-opc.c
|
||||
moxie-dis.c
|
||||
moxie-opc.c
|
||||
msp430-decode.c
|
||||
msp430-dis.c
|
||||
mt-asm.c
|
||||
mt-desc.c
|
||||
@ -156,6 +157,8 @@ mt-dis.c
|
||||
mt-ibld.c
|
||||
mt-opc.c
|
||||
mt-opc.h
|
||||
nios2-dis.c
|
||||
nios2-opc.c
|
||||
ns32k-dis.c
|
||||
openrisc-asm.c
|
||||
openrisc-desc.c
|
||||
|
||||
@ -8,7 +8,7 @@ msgid ""
|
||||
msgstr ""
|
||||
"Project-Id-Version: PACKAGE VERSION\n"
|
||||
"Report-Msgid-Bugs-To: bug-binutils@gnu.org\n"
|
||||
"POT-Creation-Date: 2011-11-02 12:03+0000\n"
|
||||
"POT-Creation-Date: 2013-06-21 15:51+0100\n"
|
||||
"PO-Revision-Date: YEAR-MO-DA HO:MI+ZONE\n"
|
||||
"Last-Translator: FULL NAME <EMAIL@ADDRESS>\n"
|
||||
"Language-Team: LANGUAGE <LL@li.org>\n"
|
||||
@ -17,6 +17,173 @@ msgstr ""
|
||||
"Content-Type: text/plain; charset=CHARSET\n"
|
||||
"Content-Transfer-Encoding: 8bit\n"
|
||||
|
||||
#. Invalid option.
|
||||
#. XXX - should break 'option' at following delimiter.
|
||||
#: aarch64-dis.c:81 arm-dis.c:4593
|
||||
#, c-format
|
||||
msgid "Unrecognised disassembler option: %s\n"
|
||||
msgstr ""
|
||||
|
||||
#: aarch64-dis.c:2391
|
||||
#, c-format
|
||||
msgid ""
|
||||
"\n"
|
||||
"The following AARCH64 specific disassembler options are supported for use\n"
|
||||
"with the -M switch (multiple options should be separated by commas):\n"
|
||||
msgstr ""
|
||||
|
||||
#: aarch64-dis.c:2395
|
||||
#, c-format
|
||||
msgid ""
|
||||
"\n"
|
||||
" no-aliases Don't print instruction aliases.\n"
|
||||
msgstr ""
|
||||
|
||||
#: aarch64-dis.c:2398
|
||||
#, c-format
|
||||
msgid ""
|
||||
"\n"
|
||||
" aliases Do print instruction aliases.\n"
|
||||
msgstr ""
|
||||
|
||||
#: aarch64-dis.c:2402
|
||||
#, c-format
|
||||
msgid ""
|
||||
"\n"
|
||||
" debug_dump Temp switch for debug trace.\n"
|
||||
msgstr ""
|
||||
|
||||
#: aarch64-dis.c:2406 mips-dis.c:3102 mips-dis.c:3110 mips-dis.c:3112
|
||||
#, c-format
|
||||
msgid "\n"
|
||||
msgstr ""
|
||||
|
||||
#: aarch64-opc.c:1142
|
||||
msgid "immediate value"
|
||||
msgstr ""
|
||||
|
||||
#: aarch64-opc.c:1152
|
||||
msgid "immediate offset"
|
||||
msgstr ""
|
||||
|
||||
#: aarch64-opc.c:1162
|
||||
msgid "register number"
|
||||
msgstr ""
|
||||
|
||||
#: aarch64-opc.c:1172
|
||||
msgid "register element index"
|
||||
msgstr ""
|
||||
|
||||
#: aarch64-opc.c:1182
|
||||
msgid "shift amount"
|
||||
msgstr ""
|
||||
|
||||
#: aarch64-opc.c:1254
|
||||
msgid "extraneous register"
|
||||
msgstr ""
|
||||
|
||||
#: aarch64-opc.c:1259
|
||||
msgid "missing register"
|
||||
msgstr ""
|
||||
|
||||
#: aarch64-opc.c:1270
|
||||
msgid "stack pointer register expected"
|
||||
msgstr ""
|
||||
|
||||
#: aarch64-opc.c:1291
|
||||
msgid "unexpected address writeback"
|
||||
msgstr ""
|
||||
|
||||
#: aarch64-opc.c:1302
|
||||
msgid "address writeback expected"
|
||||
msgstr ""
|
||||
|
||||
#: aarch64-opc.c:1348
|
||||
msgid "negative or unaligned offset expected"
|
||||
msgstr ""
|
||||
|
||||
#: aarch64-opc.c:1361
|
||||
msgid "invalid register offset"
|
||||
msgstr ""
|
||||
|
||||
#: aarch64-opc.c:1383
|
||||
msgid "invalid post-increment amount"
|
||||
msgstr ""
|
||||
|
||||
#: aarch64-opc.c:1399 aarch64-opc.c:1666
|
||||
msgid "invalid shift amount"
|
||||
msgstr ""
|
||||
|
||||
#: aarch64-opc.c:1412
|
||||
msgid "invalid extend/shift operator"
|
||||
msgstr ""
|
||||
|
||||
#: aarch64-opc.c:1458 aarch64-opc.c:1532 aarch64-opc.c:1567 aarch64-opc.c:1586
|
||||
#: aarch64-opc.c:1594 aarch64-opc.c:1644 aarch64-opc.c:1795
|
||||
msgid "immediate out of range"
|
||||
msgstr ""
|
||||
|
||||
#: aarch64-opc.c:1520 aarch64-opc.c:1542 aarch64-opc.c:1699 aarch64-opc.c:1707
|
||||
#: aarch64-opc.c:1773 aarch64-opc.c:1801
|
||||
msgid "invalid shift operator"
|
||||
msgstr ""
|
||||
|
||||
#: aarch64-opc.c:1526
|
||||
msgid "shift amount expected to be 0 or 12"
|
||||
msgstr ""
|
||||
|
||||
#: aarch64-opc.c:1549
|
||||
msgid "shift amount should be a multiple of 16"
|
||||
msgstr ""
|
||||
|
||||
#: aarch64-opc.c:1561
|
||||
msgid "negative immediate value not allowed"
|
||||
msgstr ""
|
||||
|
||||
#: aarch64-opc.c:1655
|
||||
msgid "immediate zero expected"
|
||||
msgstr ""
|
||||
|
||||
#: aarch64-opc.c:1715
|
||||
msgid "shift is not permitted"
|
||||
msgstr ""
|
||||
|
||||
#: aarch64-opc.c:1740
|
||||
msgid "invalid value for immediate"
|
||||
msgstr ""
|
||||
|
||||
#: aarch64-opc.c:1765
|
||||
msgid "shift amount expected to be 0 or 16"
|
||||
msgstr ""
|
||||
|
||||
#: aarch64-opc.c:1785
|
||||
msgid "floating-point immediate expected"
|
||||
msgstr ""
|
||||
|
||||
#: aarch64-opc.c:1876
|
||||
msgid "extend operator expected"
|
||||
msgstr ""
|
||||
|
||||
#: aarch64-opc.c:1889
|
||||
msgid "missing extend operator"
|
||||
msgstr ""
|
||||
|
||||
#: aarch64-opc.c:1895
|
||||
msgid "'LSL' operator not allowed"
|
||||
msgstr ""
|
||||
|
||||
#: aarch64-opc.c:1916
|
||||
msgid "W register expected"
|
||||
msgstr ""
|
||||
|
||||
#: aarch64-opc.c:1927
|
||||
msgid "shift operator expected"
|
||||
msgstr ""
|
||||
|
||||
#: aarch64-opc.c:1934
|
||||
msgid "'ROR' operator not allowed"
|
||||
msgstr ""
|
||||
|
||||
#: alpha-opc.c:155
|
||||
msgid "branch operand unaligned"
|
||||
msgstr ""
|
||||
@ -25,7 +192,7 @@ msgstr ""
|
||||
msgid "jump hint unaligned"
|
||||
msgstr ""
|
||||
|
||||
#: arc-dis.c:77
|
||||
#: arc-dis.c:75
|
||||
msgid "Illegal limm reference in last instruction!\n"
|
||||
msgstr ""
|
||||
|
||||
@ -111,23 +278,17 @@ msgstr ""
|
||||
msgid "must specify .jd or no nullify suffix"
|
||||
msgstr ""
|
||||
|
||||
#: arm-dis.c:2000
|
||||
#: arm-dis.c:2143
|
||||
msgid "<illegal precision>"
|
||||
msgstr ""
|
||||
|
||||
#. XXX - should break 'option' at following delimiter.
|
||||
#: arm-dis.c:4395
|
||||
#: arm-dis.c:4585
|
||||
#, c-format
|
||||
msgid "Unrecognised register name set: %s\n"
|
||||
msgstr ""
|
||||
|
||||
#. XXX - should break 'option' at following delimiter.
|
||||
#: arm-dis.c:4403
|
||||
#, c-format
|
||||
msgid "Unrecognised disassembler option: %s\n"
|
||||
msgstr ""
|
||||
|
||||
#: arm-dis.c:4995
|
||||
#: arm-dis.c:5195
|
||||
#, c-format
|
||||
msgid ""
|
||||
"\n"
|
||||
@ -150,7 +311,7 @@ msgstr ""
|
||||
msgid "unknown constraint `%c'"
|
||||
msgstr ""
|
||||
|
||||
#: cgen-asm.c:336 epiphany-ibld.c:201 fr30-ibld.c:201 frv-ibld.c:201
|
||||
#: cgen-asm.c:352 epiphany-ibld.c:201 fr30-ibld.c:201 frv-ibld.c:201
|
||||
#: ip2k-ibld.c:201 iq2000-ibld.c:201 lm32-ibld.c:201 m32c-ibld.c:201
|
||||
#: m32r-ibld.c:201 mep-ibld.c:201 mt-ibld.c:201 openrisc-ibld.c:201
|
||||
#: xc16x-ibld.c:201 xstormy16-ibld.c:201
|
||||
@ -158,7 +319,7 @@ msgstr ""
|
||||
msgid "operand out of range (%ld not between %ld and %ld)"
|
||||
msgstr ""
|
||||
|
||||
#: cgen-asm.c:358
|
||||
#: cgen-asm.c:374
|
||||
#, c-format
|
||||
msgid "operand out of range (%lu not between %lu and %lu)"
|
||||
msgstr ""
|
||||
@ -294,7 +455,7 @@ msgstr ""
|
||||
|
||||
#. Default text to print if an instruction isn't recognized.
|
||||
#: epiphany-dis.c:41 fr30-dis.c:41 frv-dis.c:41 ip2k-dis.c:41 iq2000-dis.c:41
|
||||
#: lm32-dis.c:41 m32c-dis.c:41 m32r-dis.c:41 mep-dis.c:41 mmix-dis.c:277
|
||||
#: lm32-dis.c:41 m32c-dis.c:41 m32r-dis.c:41 mep-dis.c:41 mmix-dis.c:276
|
||||
#: mt-dis.c:41 openrisc-dis.c:41 xc16x-dis.c:41 xstormy16-dis.c:41
|
||||
msgid "*unknown*"
|
||||
msgstr ""
|
||||
@ -424,11 +585,11 @@ msgstr ""
|
||||
msgid "%02x\t\t*unknown*"
|
||||
msgstr ""
|
||||
|
||||
#: i386-dis.c:10504
|
||||
#: i386-dis.c:10647
|
||||
msgid "<internal disassembler error>"
|
||||
msgstr ""
|
||||
|
||||
#: i386-dis.c:10801
|
||||
#: i386-dis.c:10953
|
||||
#, c-format
|
||||
msgid ""
|
||||
"\n"
|
||||
@ -437,126 +598,126 @@ msgid ""
|
||||
"with the -M switch (multiple options should be separated by commas):\n"
|
||||
msgstr ""
|
||||
|
||||
#: i386-dis.c:10805
|
||||
#: i386-dis.c:10957
|
||||
#, c-format
|
||||
msgid " x86-64 Disassemble in 64bit mode\n"
|
||||
msgstr ""
|
||||
|
||||
#: i386-dis.c:10806
|
||||
#: i386-dis.c:10958
|
||||
#, c-format
|
||||
msgid " i386 Disassemble in 32bit mode\n"
|
||||
msgstr ""
|
||||
|
||||
#: i386-dis.c:10807
|
||||
#: i386-dis.c:10959
|
||||
#, c-format
|
||||
msgid " i8086 Disassemble in 16bit mode\n"
|
||||
msgstr ""
|
||||
|
||||
#: i386-dis.c:10808
|
||||
#: i386-dis.c:10960
|
||||
#, c-format
|
||||
msgid " att Display instruction in AT&T syntax\n"
|
||||
msgstr ""
|
||||
|
||||
#: i386-dis.c:10809
|
||||
#: i386-dis.c:10961
|
||||
#, c-format
|
||||
msgid " intel Display instruction in Intel syntax\n"
|
||||
msgstr ""
|
||||
|
||||
#: i386-dis.c:10810
|
||||
#: i386-dis.c:10962
|
||||
#, c-format
|
||||
msgid ""
|
||||
" att-mnemonic\n"
|
||||
" Display instruction in AT&T mnemonic\n"
|
||||
msgstr ""
|
||||
|
||||
#: i386-dis.c:10812
|
||||
#: i386-dis.c:10964
|
||||
#, c-format
|
||||
msgid ""
|
||||
" intel-mnemonic\n"
|
||||
" Display instruction in Intel mnemonic\n"
|
||||
msgstr ""
|
||||
|
||||
#: i386-dis.c:10814
|
||||
#: i386-dis.c:10966
|
||||
#, c-format
|
||||
msgid " addr64 Assume 64bit address size\n"
|
||||
msgstr ""
|
||||
|
||||
#: i386-dis.c:10815
|
||||
#: i386-dis.c:10967
|
||||
#, c-format
|
||||
msgid " addr32 Assume 32bit address size\n"
|
||||
msgstr ""
|
||||
|
||||
#: i386-dis.c:10816
|
||||
#: i386-dis.c:10968
|
||||
#, c-format
|
||||
msgid " addr16 Assume 16bit address size\n"
|
||||
msgstr ""
|
||||
|
||||
#: i386-dis.c:10817
|
||||
#: i386-dis.c:10969
|
||||
#, c-format
|
||||
msgid " data32 Assume 32bit data size\n"
|
||||
msgstr ""
|
||||
|
||||
#: i386-dis.c:10818
|
||||
#: i386-dis.c:10970
|
||||
#, c-format
|
||||
msgid " data16 Assume 16bit data size\n"
|
||||
msgstr ""
|
||||
|
||||
#: i386-dis.c:10819
|
||||
#: i386-dis.c:10971
|
||||
#, c-format
|
||||
msgid " suffix Always display instruction suffix in AT&T syntax\n"
|
||||
msgstr ""
|
||||
|
||||
#: i386-gen.c:483 ia64-gen.c:307
|
||||
#: i386-gen.c:517 ia64-gen.c:307
|
||||
#, c-format
|
||||
msgid "%s: Error: "
|
||||
msgstr ""
|
||||
|
||||
#: i386-gen.c:615
|
||||
#: i386-gen.c:649
|
||||
#, c-format
|
||||
msgid "%s: %d: Unknown bitfield: %s\n"
|
||||
msgstr ""
|
||||
|
||||
#: i386-gen.c:617
|
||||
#: i386-gen.c:651
|
||||
#, c-format
|
||||
msgid "Unknown bitfield: %s\n"
|
||||
msgstr ""
|
||||
|
||||
#: i386-gen.c:673
|
||||
#: i386-gen.c:707
|
||||
#, c-format
|
||||
msgid "%s: %d: Missing `)' in bitfield: %s\n"
|
||||
msgstr ""
|
||||
|
||||
#: i386-gen.c:938
|
||||
#: i386-gen.c:972
|
||||
#, c-format
|
||||
msgid "can't find i386-opc.tbl for reading, errno = %s\n"
|
||||
msgstr ""
|
||||
|
||||
#: i386-gen.c:1069
|
||||
#: i386-gen.c:1103
|
||||
#, c-format
|
||||
msgid "can't find i386-reg.tbl for reading, errno = %s\n"
|
||||
msgstr ""
|
||||
|
||||
#: i386-gen.c:1146
|
||||
#: i386-gen.c:1180
|
||||
#, c-format
|
||||
msgid "can't create i386-init.h, errno = %s\n"
|
||||
msgstr ""
|
||||
|
||||
#: i386-gen.c:1235 ia64-gen.c:2820
|
||||
#: i386-gen.c:1269 ia64-gen.c:2830
|
||||
#, c-format
|
||||
msgid "unable to change directory to \"%s\", errno = %s\n"
|
||||
msgstr ""
|
||||
|
||||
#: i386-gen.c:1242
|
||||
#: i386-gen.c:1276
|
||||
#, c-format
|
||||
msgid "%d unused bits in i386_cpu_flags.\n"
|
||||
msgstr ""
|
||||
|
||||
#: i386-gen.c:1249
|
||||
#: i386-gen.c:1283
|
||||
#, c-format
|
||||
msgid "%d unused bits in i386_operand_type.\n"
|
||||
msgstr ""
|
||||
|
||||
#: i386-gen.c:1263
|
||||
#: i386-gen.c:1297
|
||||
#, c-format
|
||||
msgid "can't create i386-tbl.h, errno = %s\n"
|
||||
msgstr ""
|
||||
@ -580,84 +741,84 @@ msgstr ""
|
||||
msgid "can't find %s for reading\n"
|
||||
msgstr ""
|
||||
|
||||
#: ia64-gen.c:1043
|
||||
#: ia64-gen.c:1051
|
||||
#, c-format
|
||||
msgid ""
|
||||
"most recent format '%s'\n"
|
||||
"appears more restrictive than '%s'\n"
|
||||
msgstr ""
|
||||
|
||||
#: ia64-gen.c:1054
|
||||
#: ia64-gen.c:1062
|
||||
#, c-format
|
||||
msgid "overlapping field %s->%s\n"
|
||||
msgstr ""
|
||||
|
||||
#: ia64-gen.c:1251
|
||||
#: ia64-gen.c:1259
|
||||
#, c-format
|
||||
msgid "overwriting note %d with note %d (IC:%s)\n"
|
||||
msgstr ""
|
||||
|
||||
#: ia64-gen.c:1456
|
||||
#: ia64-gen.c:1466
|
||||
#, c-format
|
||||
msgid "don't know how to specify %% dependency %s\n"
|
||||
msgstr ""
|
||||
|
||||
#: ia64-gen.c:1478
|
||||
#: ia64-gen.c:1488
|
||||
#, c-format
|
||||
msgid "Don't know how to specify # dependency %s\n"
|
||||
msgstr ""
|
||||
|
||||
#: ia64-gen.c:1517
|
||||
#: ia64-gen.c:1527
|
||||
#, c-format
|
||||
msgid "IC:%s [%s] has no terminals or sub-classes\n"
|
||||
msgstr ""
|
||||
|
||||
#: ia64-gen.c:1520
|
||||
#: ia64-gen.c:1530
|
||||
#, c-format
|
||||
msgid "IC:%s has no terminals or sub-classes\n"
|
||||
msgstr ""
|
||||
|
||||
#: ia64-gen.c:1529
|
||||
#: ia64-gen.c:1539
|
||||
#, c-format
|
||||
msgid "no insns mapped directly to terminal IC %s [%s]"
|
||||
msgstr ""
|
||||
|
||||
#: ia64-gen.c:1532
|
||||
#: ia64-gen.c:1542
|
||||
#, c-format
|
||||
msgid "no insns mapped directly to terminal IC %s\n"
|
||||
msgstr ""
|
||||
|
||||
#: ia64-gen.c:1543
|
||||
#: ia64-gen.c:1553
|
||||
#, c-format
|
||||
msgid "class %s is defined but not used\n"
|
||||
msgstr ""
|
||||
|
||||
#: ia64-gen.c:1556
|
||||
#: ia64-gen.c:1566
|
||||
#, c-format
|
||||
msgid "Warning: rsrc %s (%s) has no chks\n"
|
||||
msgstr ""
|
||||
|
||||
#: ia64-gen.c:1559
|
||||
#: ia64-gen.c:1569
|
||||
#, c-format
|
||||
msgid "Warning: rsrc %s (%s) has no chks or regs\n"
|
||||
msgstr ""
|
||||
|
||||
#: ia64-gen.c:1563
|
||||
#: ia64-gen.c:1573
|
||||
#, c-format
|
||||
msgid "rsrc %s (%s) has no regs\n"
|
||||
msgstr ""
|
||||
|
||||
#: ia64-gen.c:2455
|
||||
#: ia64-gen.c:2465
|
||||
#, c-format
|
||||
msgid "IC note %d in opcode %s (IC:%s) conflicts with resource %s note %d\n"
|
||||
msgstr ""
|
||||
|
||||
#: ia64-gen.c:2483
|
||||
#: ia64-gen.c:2493
|
||||
#, c-format
|
||||
msgid "IC note %d for opcode %s (IC:%s) conflicts with resource %s note %d\n"
|
||||
msgstr ""
|
||||
|
||||
#: ia64-gen.c:2497
|
||||
#: ia64-gen.c:2507
|
||||
#, c-format
|
||||
msgid "opcode %s has no class (ops %d %d %d)\n"
|
||||
msgstr ""
|
||||
@ -742,7 +903,7 @@ msgstr ""
|
||||
msgid "expecting got relative address: gotofflo16(symbol)"
|
||||
msgstr ""
|
||||
|
||||
#: m10200-dis.c:158 m10300-dis.c:582
|
||||
#: m10200-dis.c:158 m10300-dis.c:581
|
||||
#, c-format
|
||||
msgid "unknown\t0x%04lx"
|
||||
msgstr ""
|
||||
@ -874,41 +1035,41 @@ msgstr ""
|
||||
msgid "Value is not aligned enough"
|
||||
msgstr ""
|
||||
|
||||
#: mips-dis.c:947
|
||||
#: mips-dis.c:1011
|
||||
msgid "# internal error, incomplete extension sequence (+)"
|
||||
msgstr ""
|
||||
|
||||
#: mips-dis.c:1113
|
||||
#: mips-dis.c:1162
|
||||
#, c-format
|
||||
msgid "# internal error, undefined extension sequence (+%c)"
|
||||
msgstr ""
|
||||
|
||||
#: mips-dis.c:1485
|
||||
#: mips-dis.c:1462
|
||||
#, c-format
|
||||
msgid "# internal error, undefined modifier (%c)"
|
||||
msgstr ""
|
||||
|
||||
#: mips-dis.c:2089
|
||||
#: mips-dis.c:2052
|
||||
#, c-format
|
||||
msgid "# internal disassembler error, unrecognised modifier (%c)"
|
||||
msgstr ""
|
||||
|
||||
#: mips-dis.c:2664
|
||||
#: mips-dis.c:2674
|
||||
#, c-format
|
||||
msgid "# internal disassembler error, unrecognized modifier (+%c)"
|
||||
msgstr ""
|
||||
|
||||
#: mips-dis.c:2894
|
||||
#: mips-dis.c:2902
|
||||
#, c-format
|
||||
msgid "# internal disassembler error, unrecognized modifier (m%c)"
|
||||
msgstr ""
|
||||
|
||||
#: mips-dis.c:2904
|
||||
#: mips-dis.c:2912
|
||||
#, c-format
|
||||
msgid "# internal disassembler error, unrecognized modifier (%c)"
|
||||
msgstr ""
|
||||
|
||||
#: mips-dis.c:3052
|
||||
#: mips-dis.c:3064
|
||||
#, c-format
|
||||
msgid ""
|
||||
"\n"
|
||||
@ -916,7 +1077,14 @@ msgid ""
|
||||
"with the -M switch (multiple options should be separated by commas):\n"
|
||||
msgstr ""
|
||||
|
||||
#: mips-dis.c:3056
|
||||
#: mips-dis.c:3068
|
||||
#, c-format
|
||||
msgid ""
|
||||
"\n"
|
||||
" virt Recognize the virtualization ASE instructions.\n"
|
||||
msgstr ""
|
||||
|
||||
#: mips-dis.c:3071
|
||||
#, c-format
|
||||
msgid ""
|
||||
"\n"
|
||||
@ -924,7 +1092,7 @@ msgid ""
|
||||
" Default: based on binary being disassembled.\n"
|
||||
msgstr ""
|
||||
|
||||
#: mips-dis.c:3060
|
||||
#: mips-dis.c:3075
|
||||
#, c-format
|
||||
msgid ""
|
||||
"\n"
|
||||
@ -932,7 +1100,7 @@ msgid ""
|
||||
" Default: numeric.\n"
|
||||
msgstr ""
|
||||
|
||||
#: mips-dis.c:3064
|
||||
#: mips-dis.c:3079
|
||||
#, c-format
|
||||
msgid ""
|
||||
"\n"
|
||||
@ -941,7 +1109,7 @@ msgid ""
|
||||
" Default: based on binary being disassembled.\n"
|
||||
msgstr ""
|
||||
|
||||
#: mips-dis.c:3069
|
||||
#: mips-dis.c:3084
|
||||
#, c-format
|
||||
msgid ""
|
||||
"\n"
|
||||
@ -950,7 +1118,7 @@ msgid ""
|
||||
" Default: based on binary being disassembled.\n"
|
||||
msgstr ""
|
||||
|
||||
#: mips-dis.c:3074
|
||||
#: mips-dis.c:3089
|
||||
#, c-format
|
||||
msgid ""
|
||||
"\n"
|
||||
@ -958,7 +1126,7 @@ msgid ""
|
||||
" specified ABI.\n"
|
||||
msgstr ""
|
||||
|
||||
#: mips-dis.c:3078
|
||||
#: mips-dis.c:3093
|
||||
#, c-format
|
||||
msgid ""
|
||||
"\n"
|
||||
@ -966,7 +1134,7 @@ msgid ""
|
||||
" specified architecture.\n"
|
||||
msgstr ""
|
||||
|
||||
#: mips-dis.c:3082
|
||||
#: mips-dis.c:3097
|
||||
#, c-format
|
||||
msgid ""
|
||||
"\n"
|
||||
@ -974,12 +1142,7 @@ msgid ""
|
||||
" "
|
||||
msgstr ""
|
||||
|
||||
#: mips-dis.c:3087 mips-dis.c:3095 mips-dis.c:3097
|
||||
#, c-format
|
||||
msgid "\n"
|
||||
msgstr ""
|
||||
|
||||
#: mips-dis.c:3089
|
||||
#: mips-dis.c:3104
|
||||
#, c-format
|
||||
msgid ""
|
||||
"\n"
|
||||
@ -987,34 +1150,43 @@ msgid ""
|
||||
" "
|
||||
msgstr ""
|
||||
|
||||
#: mmix-dis.c:35
|
||||
#: mmix-dis.c:34
|
||||
#, c-format
|
||||
msgid "Bad case %d (%s) in %s:%d\n"
|
||||
msgstr ""
|
||||
|
||||
#: mmix-dis.c:45
|
||||
#: mmix-dis.c:44
|
||||
#, c-format
|
||||
msgid "Internal: Non-debugged code (test-case missing): %s:%d"
|
||||
msgstr ""
|
||||
|
||||
#: mmix-dis.c:54
|
||||
#: mmix-dis.c:53
|
||||
msgid "(unknown)"
|
||||
msgstr ""
|
||||
|
||||
#: mmix-dis.c:512
|
||||
#: mmix-dis.c:511
|
||||
#, c-format
|
||||
msgid "*unknown operands type: %d*"
|
||||
msgstr ""
|
||||
|
||||
#: msp430-dis.c:328
|
||||
#: msp430-dis.c:412
|
||||
msgid "Illegal as emulation instr"
|
||||
msgstr ""
|
||||
|
||||
#. R2/R3 are illegal as dest: may be data section.
|
||||
#: msp430-dis.c:379
|
||||
#: msp430-dis.c:487
|
||||
msgid "Illegal as 2-op instr"
|
||||
msgstr ""
|
||||
|
||||
#: msp430-dis.c:839
|
||||
msgid "unercognised CALLA addressing mode"
|
||||
msgstr ""
|
||||
|
||||
#: msp430-dis.c:1110 msp430-dis.c:1127 msp430-dis.c:1148
|
||||
#, c-format
|
||||
msgid "Reserved use of A/L and B/W bits detected"
|
||||
msgstr ""
|
||||
|
||||
#: mt-asm.c:110 mt-asm.c:190
|
||||
msgid "Operand out of range. Must be between -32768 and 32767."
|
||||
msgstr ""
|
||||
@ -1041,12 +1213,12 @@ msgstr ""
|
||||
msgid "$<undefined>"
|
||||
msgstr ""
|
||||
|
||||
#: ppc-dis.c:234
|
||||
#: ppc-dis.c:337
|
||||
#, c-format
|
||||
msgid "warning: ignoring unknown -M%s option\n"
|
||||
msgstr ""
|
||||
|
||||
#: ppc-dis.c:523
|
||||
#: ppc-dis.c:762
|
||||
#, c-format
|
||||
msgid ""
|
||||
"\n"
|
||||
@ -1054,51 +1226,59 @@ msgid ""
|
||||
"the -M switch:\n"
|
||||
msgstr ""
|
||||
|
||||
#: ppc-opc.c:906 ppc-opc.c:936
|
||||
#: ppc-opc.c:887 ppc-opc.c:910 ppc-opc.c:935 ppc-opc.c:964
|
||||
msgid "invalid register"
|
||||
msgstr ""
|
||||
|
||||
#: ppc-opc.c:1212 ppc-opc.c:1242
|
||||
msgid "invalid conditional option"
|
||||
msgstr ""
|
||||
|
||||
#: ppc-opc.c:908 ppc-opc.c:938
|
||||
#: ppc-opc.c:1214 ppc-opc.c:1244
|
||||
msgid "invalid counter access"
|
||||
msgstr ""
|
||||
|
||||
#: ppc-opc.c:940
|
||||
#: ppc-opc.c:1246
|
||||
msgid "attempt to set y bit when using + or - modifier"
|
||||
msgstr ""
|
||||
|
||||
#: ppc-opc.c:972
|
||||
#: ppc-opc.c:1278
|
||||
msgid "invalid mask field"
|
||||
msgstr ""
|
||||
|
||||
#: ppc-opc.c:998
|
||||
#: ppc-opc.c:1304
|
||||
msgid "ignoring invalid mfcr mask"
|
||||
msgstr ""
|
||||
|
||||
#: ppc-opc.c:1048 ppc-opc.c:1083
|
||||
#: ppc-opc.c:1403 ppc-opc.c:1438
|
||||
msgid "illegal bitmask"
|
||||
msgstr ""
|
||||
|
||||
#: ppc-opc.c:1170
|
||||
#: ppc-opc.c:1525
|
||||
msgid "address register in load range"
|
||||
msgstr ""
|
||||
|
||||
#: ppc-opc.c:1223
|
||||
#: ppc-opc.c:1578
|
||||
msgid "index register in load range"
|
||||
msgstr ""
|
||||
|
||||
#: ppc-opc.c:1239 ppc-opc.c:1295
|
||||
#: ppc-opc.c:1594 ppc-opc.c:1650
|
||||
msgid "source and target register operands must be different"
|
||||
msgstr ""
|
||||
|
||||
#: ppc-opc.c:1254
|
||||
#: ppc-opc.c:1609
|
||||
msgid "invalid register operand when updating"
|
||||
msgstr ""
|
||||
|
||||
#: ppc-opc.c:1349
|
||||
#: ppc-opc.c:1700
|
||||
msgid "illegal immediate value"
|
||||
msgstr ""
|
||||
|
||||
#: ppc-opc.c:1839
|
||||
msgid "invalid sprg number"
|
||||
msgstr ""
|
||||
|
||||
#: ppc-opc.c:1519
|
||||
#: ppc-opc.c:2009
|
||||
msgid "invalid constant"
|
||||
msgstr ""
|
||||
|
||||
@ -1135,22 +1315,22 @@ msgstr ""
|
||||
msgid "Internal error: bad sparc-opcode.h: \"%s\", %#.8lx, %#.8lx\n"
|
||||
msgstr ""
|
||||
|
||||
#: sparc-dis.c:346
|
||||
#: sparc-dis.c:355
|
||||
#, c-format
|
||||
msgid "Internal error: bad sparc-opcode.h: \"%s\" == \"%s\"\n"
|
||||
msgstr ""
|
||||
|
||||
#. Mark as non-valid instruction.
|
||||
#: sparc-dis.c:1028
|
||||
#: sparc-dis.c:1046
|
||||
msgid "unknown"
|
||||
msgstr ""
|
||||
|
||||
#: v850-dis.c:372
|
||||
#: v850-dis.c:453
|
||||
#, c-format
|
||||
msgid "unknown operand shift: %x\n"
|
||||
msgstr ""
|
||||
|
||||
#: v850-dis.c:384
|
||||
#: v850-dis.c:465
|
||||
#, c-format
|
||||
msgid "unknown reg: %d\n"
|
||||
msgstr ""
|
||||
@ -1160,39 +1340,67 @@ msgstr ""
|
||||
#. v850_insert_operand() in gas/config/tc-v850.c. Error messages
|
||||
#. containing the string 'out of range' will be ignored unless a
|
||||
#. specific command line option is given to GAS.
|
||||
#: v850-opc.c:55
|
||||
#: v850-opc.c:53
|
||||
msgid "displacement value is not in range and is not aligned"
|
||||
msgstr ""
|
||||
|
||||
#: v850-opc.c:56
|
||||
#: v850-opc.c:54
|
||||
msgid "displacement value is out of range"
|
||||
msgstr ""
|
||||
|
||||
#: v850-opc.c:57
|
||||
#: v850-opc.c:55
|
||||
msgid "displacement value is not aligned"
|
||||
msgstr ""
|
||||
|
||||
#: v850-opc.c:59
|
||||
#: v850-opc.c:57
|
||||
msgid "immediate value is out of range"
|
||||
msgstr ""
|
||||
|
||||
#: v850-opc.c:60
|
||||
#: v850-opc.c:58
|
||||
msgid "branch value out of range"
|
||||
msgstr ""
|
||||
|
||||
#: v850-opc.c:61
|
||||
#: v850-opc.c:59
|
||||
msgid "branch value not in range and to odd offset"
|
||||
msgstr ""
|
||||
|
||||
#: v850-opc.c:62
|
||||
#: v850-opc.c:60
|
||||
msgid "branch to odd offset"
|
||||
msgstr ""
|
||||
|
||||
#: v850-opc.c:497
|
||||
#: v850-opc.c:61
|
||||
msgid "position value is out of range"
|
||||
msgstr ""
|
||||
|
||||
#: v850-opc.c:62
|
||||
msgid "width value is out of range"
|
||||
msgstr ""
|
||||
|
||||
#: v850-opc.c:63
|
||||
msgid "SelID is out of range"
|
||||
msgstr ""
|
||||
|
||||
#: v850-opc.c:64
|
||||
msgid "vector8 is out of range"
|
||||
msgstr ""
|
||||
|
||||
#: v850-opc.c:65
|
||||
msgid "vector5 is out of range"
|
||||
msgstr ""
|
||||
|
||||
#: v850-opc.c:66
|
||||
msgid "imm10 is out of range"
|
||||
msgstr ""
|
||||
|
||||
#: v850-opc.c:67
|
||||
msgid "SR/SelID is out of range"
|
||||
msgstr ""
|
||||
|
||||
#: v850-opc.c:512
|
||||
msgid "invalid register for stack adjustment"
|
||||
msgstr ""
|
||||
|
||||
#: v850-opc.c:518
|
||||
#: v850-opc.c:532
|
||||
msgid "invalid register name"
|
||||
msgstr ""
|
||||
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user