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Catch a bug in the msp430 disassembler where an add instruction was confused
with an rla instruction. Add a test for this to the testsuite.
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@ -1,3 +1,7 @@
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2004-01-02 Albert Bartoszko <albar@nt.kegel.com.pl>
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* gas/msp430/opcode.s: Add test for an 'add' instruction which
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looks similar to an 'rla' instruction.
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For older changes see ChangeLog-9303
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@ -42,4 +42,4 @@ Disassembly of section .text:
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0+05e <[^>]*> 82 4f 00 00 mov r15, &0x0000 ;
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0+062 <[^>]*> 3f 40 f0 00 mov #240, r15 ;#0x00f0
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0+066 <[^>]*> 30 40 00 00 br #0x0000 ;
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0+06a <[^>]*> 92 52 00 02 72 01 add &0x0200,&0x0172 ;0x0200
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@ -52,3 +52,6 @@ main:
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.comm c,4,2
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.comm d,4,2
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;; This next instruction triggered a bug which
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;; was fixed by a patch to msp430-dis.c on Jan 2, 2004
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add &0x200, &0x172
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@ -1,3 +1,7 @@
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2004-01-02 Albert Bartoszko <albar@nt.kegel.com.pl>
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* msp430-dis.c (msp430_doubleoperand): Check for an 'add'
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instruction which looks similar to an 'rla' instruction.
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For older changes see ChangeLog-0203
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@ -1,5 +1,5 @@
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/* Disassemble MSP430 instructions.
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Copyright (C) 2002 Free Software Foundation, Inc.
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Copyright (C) 2002, 2004 Free Software Foundation, Inc.
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Contributed by Dmitry Diky <diwil@mail.ru>
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@ -491,6 +491,10 @@ msp430_doubleoperand (info, opcode, addr, insn, op1, op2, comm1, comm2, cycles)
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{
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/* Absolute. */
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dst = msp430dis_opcode (addr + 2, info);
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/* If the 'src' field is not the same as the dst
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then this is not an rla instruction. */
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if (dst != msp430dis_opcode (addr + 4, info))
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return 0;
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cmd_len += 4;
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*cycles = 6;
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sprintf (op1, "&0x%04x", PS (dst));
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