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* config/tc-m68k.c (init_table): Now const. Always include 68851
data, so that "bc" is available to 68040 cache instructions. Added "tt0", "tt1", and 68ec030 variants. (md_assemble): Complain if 68000 (only) and 68881 are specified. (enum _register): Added TT0, TT1. (m68k_ip, cases '3' and 't'): Handle new operand type codes. Pass line number correctly in "internal error" messages. Don't print architecture-mismatch message for operand errors. From Colin Smith (colin@wrs.com): * config/tc-m68k.c (m68k_ip, case '_'): Use addword twice rather than install_operand.
This commit is contained in:
Ken Raeburn
parent
b2f221a944
commit
4134a793c7
@ -238,7 +238,7 @@ enum _register {
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FPS,
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FPC,
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DRP,
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DRP, /* 68851 or 68030 MMU regs */
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CRP,
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CAL,
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VAL,
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@ -262,7 +262,8 @@ enum _register {
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BAC5,
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BAC6,
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BAC7,
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PSR,
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PSR, /* aka MMUSR on 68030 (but not MMUSR on 68040)
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and ACUSR on 68ec030 */
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PCSR,
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IC, /* instruction cache token */
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@ -270,6 +271,8 @@ enum _register {
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NC, /* no cache token */
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BC, /* both caches token */
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TT0, /* 68030 access control unit regs */
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TT1,
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};
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/* Internal form of an operand. */
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@ -1176,6 +1179,11 @@ void m68k_ip (instring)
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losing++;
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break;
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case '3':
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if (opP->mode != MSCR || (opP->reg != TT0 && opP->reg != TT1))
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losing++;
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break;
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case 'A':
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if(opP->mode!=AREG)
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losing++;
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@ -1316,6 +1324,17 @@ void m68k_ip (instring)
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losing++;
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break;
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case 't':
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if (opP->mode != IMMED)
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losing++;
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else
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{
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long t = get_num (opP->con1, 80);
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if (t < 0 || t > 7 || isvar (opP->con1))
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losing++;
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}
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break;
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case 'U':
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if(opP->mode!=MSCR || opP->reg!=USP)
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losing++;
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@ -1323,7 +1342,10 @@ void m68k_ip (instring)
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/* JF these are out of order. We could put them
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in order if we were willing to put up with
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bunches of #ifdef m68851s in the code */
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bunches of #ifdef m68851s in the code.
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Don't forget that you need these operands
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to use 68030 MMU instructions. */
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#ifndef NO_68851
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/* Memory addressing mode used by pflushr */
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case '|':
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@ -1338,8 +1360,9 @@ void m68k_ip (instring)
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break;
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case 'P':
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if (opP->mode != MSCR || (opP->reg != TC && opP->reg != CAL &&
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opP->reg != VAL && opP->reg != SCC && opP->reg != AC))
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if (opP->mode != MSCR
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|| (opP->reg != TC && opP->reg != CAL
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&& opP->reg != VAL && opP->reg != SCC && opP->reg != AC))
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losing++;
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break;
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@ -1349,8 +1372,9 @@ void m68k_ip (instring)
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break;
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case 'W':
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if (opP->mode != MSCR || (opP->reg != DRP && opP->reg != SRP &&
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opP->reg != CRP))
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if (opP->mode != MSCR
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|| (opP->reg != DRP && opP->reg != SRP
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&& opP->reg != CRP))
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losing++;
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break;
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@ -1387,7 +1411,7 @@ void m68k_ip (instring)
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break;
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default:
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as_fatal("Internal error: Operand mode %c unknown in line %s of file \"%s\"",
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as_fatal("Internal error: Operand mode %c unknown in line %d of file \"%s\"",
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*s, __LINE__, __FILE__);
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} /* switch on type of operand */
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@ -1403,7 +1427,8 @@ void m68k_ip (instring)
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opcode = opcode->m_next;
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if (!opcode) {
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if (ok_arch)
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if (ok_arch
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&& !(ok_arch & current_architecture))
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{
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char buf[200], *cp;
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int len;
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@ -1412,10 +1437,10 @@ void m68k_ip (instring)
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switch (ok_arch)
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{
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case mfloat:
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strcpy (cp, "fpu");
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strcpy (cp, "fpu (68040 or 68881/68882)");
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break;
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case mmmu:
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strcpy (cp, "mmu");
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strcpy (cp, "mmu (68030 or 68851)");
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break;
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case m68020up:
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strcpy (cp, "68020 or higher");
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@ -2227,12 +2252,32 @@ void m68k_ip (instring)
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know(opP->reg == PCSR);
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break;
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#endif /* m68851 */
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case '_':
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case '3':
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switch (opP->reg)
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{
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case TT0:
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tmpreg = 2;
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break;
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case TT1:
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tmpreg = 3;
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break;
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default:
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as_fatal ("failed sanity check");
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}
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install_operand (s[1], tmpreg);
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break;
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case 't':
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tmpreg = get_num (opP->con1, 20);
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install_operand (s[1], tmpreg);
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break;
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case '_': /* used only for move16 absolute 32-bit address */
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tmpreg=get_num(opP->con1,80);
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install_operand(s[1], tmpreg);
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addword (tmpreg >> 16);
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addword (tmpreg & 0xFFFF);
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break;
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default:
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as_fatal("Internal error: Operand type %c unknown in line %s of file \"%s\"", s[0], __LINE__, __FILE__);
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as_fatal("Internal error: Operand type %c unknown in line %d of file \"%s\"",
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s[0], __LINE__, __FILE__);
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}
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}
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/* By the time whe get here (FINALLY) the_ins contains the complete
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@ -2537,11 +2582,10 @@ int regnum;
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symbol_table_insert(symbol_new(buf, SEG_REGISTER, regnum, &zero_address_frag));
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}
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static struct {
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static const struct {
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char *name;
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int number;
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} init_table[] =
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{
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} init_table[] = {
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"d0", DATA0,
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"d1", DATA1,
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"d2", DATA2,
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@ -2610,7 +2654,6 @@ int number;
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"srp", SRP,
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"urp", URP,
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#ifndef NO_68851
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"ac", AC,
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"bc", BC,
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"cal", CAL,
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@ -2636,12 +2679,19 @@ int number;
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"bac5", BAC5,
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"bac6", BAC6,
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"bac7", BAC7,
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#endif
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"ic", IC,
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"dc", DC,
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"nc", NC,
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"tt0", TT0,
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"tt1", TT1,
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/* 68ec030 versions of same */
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"ac0", TT0,
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"ac1", TT1,
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/* 68ec030 access control unit, identical to 030 MMU status reg */
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"acusr", PSR,
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0,
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};
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@ -2652,9 +2702,7 @@ init_regtable()
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{
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int i;
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for (i = 0; init_table[i].name; i++)
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{
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insert_reg(init_table[i].name, init_table[i].number);
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}
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}
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@ -2668,47 +2716,58 @@ md_assemble(str)
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int m,n = 0;
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char *to_beg_P;
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int shorts_this_frag;
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static int done_first_time;
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if (cpu_of_arch (current_architecture) == 0)
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if (!done_first_time)
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{
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enum m68k_architecture cpu_type;
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done_first_time = 1;
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if (cpu_of_arch (current_architecture) == 0)
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{
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enum m68k_architecture cpu_type;
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#ifndef TARGET_CPU
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cpu_type = m68020;
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cpu_type = m68020;
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#else
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if (strcmp (TARGET_CPU, "m68000") == 0)
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cpu_type = m68000;
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else if (strcmp (TARGET_CPU, "m68010") == 0)
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cpu_type = m68010;
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else if (strcmp (TARGET_CPU, "m68020") == 0
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|| strcmp (TARGET_CPU, "m68k") == 0)
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cpu_type = m68020;
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else if (strcmp (TARGET_CPU, "m68030") == 0)
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cpu_type = m68030;
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else if (strcmp (TARGET_CPU, "m68040") == 0)
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cpu_type = m68040;
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else
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cpu_type = m68020;
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if (strcmp (TARGET_CPU, "m68000") == 0)
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cpu_type = m68000;
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else if (strcmp (TARGET_CPU, "m68010") == 0)
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cpu_type = m68010;
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else if (strcmp (TARGET_CPU, "m68020") == 0
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|| strcmp (TARGET_CPU, "m68k") == 0)
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cpu_type = m68020;
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else if (strcmp (TARGET_CPU, "m68030") == 0)
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cpu_type = m68030;
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else if (strcmp (TARGET_CPU, "m68040") == 0)
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cpu_type = m68040;
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else
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cpu_type = m68020;
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#endif
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/* If float or mmu were specified, just default cpu. */
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if (current_architecture != 0)
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current_architecture |= cpu_type;
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else
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{
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if ((cpu_type & m68020up) != 0)
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current_architecture = (cpu_type
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/* If float or mmu were specified, just default cpu. */
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if (current_architecture != 0)
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current_architecture |= cpu_type;
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else
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{
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if ((cpu_type & m68020up) != 0)
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current_architecture = (cpu_type
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#ifndef NO_68881
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| m68881
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| m68881
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#endif
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#ifndef NO_68851
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| m68851
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| m68851
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#endif
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);
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else
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current_architecture = cpu_type;
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);
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else
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current_architecture = cpu_type;
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}
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}
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if (cpu_of_arch (current_architecture) == m68000
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&& (current_architecture & m68881) != 0)
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{
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as_bad ("incompatible processors 68000 and 68881 specified");
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}
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done_first_time = 1;
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}
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memset((char *)(&the_ins), '\0', sizeof(the_ins)); /* JF for paranoia sake */
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