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2007-03-24 Paul Brook <paul@codesourcery.com>
opcodes/ * arm-dis.c (coprocessor_opcodes): Remove superfluous 0x. (print_insn_coprocessor): Handle %<bitfield>x.
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@ -1,3 +1,8 @@
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2007-03-24 Paul Brook <paul@codesourcery.com>
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* arm-dis.c (coprocessor_opcodes): Remove superfluous 0x.
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(print_insn_coprocessor): Handle %<bitfield>x.
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2007-03-24 Paul Brook <paul@codesourcery.com>
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Mark Shinwell <shinwell@codesourcery.com>
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@ -279,8 +279,8 @@ static const struct opcode32 coprocessor_opcodes[] =
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{FPU_VFP_EXT_V1, 0x0e100b10, 0x0ff00fff, "fmrdl%c\t%12-15r, %z2"},
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{FPU_VFP_EXT_V1, 0x0e200b10, 0x0ff00fff, "fmdhr%c\t%z2, %12-15r"},
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{FPU_VFP_EXT_V1, 0x0e300b10, 0x0ff00fff, "fmrdh%c\t%12-15r, %z2"},
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{FPU_VFP_EXT_V1xD, 0x0ee00a10, 0x0ff00fff, "fmxr%c\t<impl def 0x%16-19x>, %12-15r"},
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{FPU_VFP_EXT_V1xD, 0x0ef00a10, 0x0ff00fff, "fmrx%c\t%12-15r, <impl def 0x%16-19x>"},
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{FPU_VFP_EXT_V1xD, 0x0ee00a10, 0x0ff00fff, "fmxr%c\t<impl def %16-19x>, %12-15r"},
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{FPU_VFP_EXT_V1xD, 0x0ef00a10, 0x0ff00fff, "fmrx%c\t%12-15r, <impl def %16-19x>"},
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{FPU_VFP_EXT_V1xD, 0x0e000a10, 0x0ff00f7f, "fmsr%c\t%y2, %12-15r"},
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{FPU_VFP_EXT_V1xD, 0x0e100a10, 0x0ff00f7f, "fmrs%c\t%12-15r, %y2"},
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{FPU_VFP_EXT_V1xD, 0x0eb50a40, 0x0fbf0f70, "fcmp%7'ezs%c\t%y1"},
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@ -1868,6 +1868,11 @@ print_insn_coprocessor (bfd_vma pc, struct disassemble_info *info, long given,
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case 'G':
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func (stream, "%s", iwmmxt_cregnames[value]);
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break;
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case 'x':
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func (stream, "0x%lx", value);
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break;
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case '`':
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c++;
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if (value == 0)
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