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* rs6000-tdep.c (struct rs6000_framedata): Add gpr_mask, used_bl,
lr_register. (rs6000_in_function_epilogue_p): Check for bctr. (skip_prologue): Initialize lr_register. Set lr_reg to a register number. Set gpr_mask and used_bl. Continue scanning while some expected registers are not saved. Set lr_register if LR is not stored. (rs6000_frame_cache): Handle gpr_mask and lr_register. * gdb.arch/powerpc-prologue.exp: Correct saved registers.
This commit is contained in:
Daniel Jacobowitz
parent
c2d805c8d5
commit
46a9b8ed1b
@ -1,3 +1,14 @@
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2008-08-18 Daniel Jacobowitz <dan@codesourcery.com>
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* rs6000-tdep.c (struct rs6000_framedata): Add gpr_mask, used_bl,
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lr_register.
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(rs6000_in_function_epilogue_p): Check for bctr.
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(skip_prologue): Initialize lr_register. Set lr_reg to a register
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number. Set gpr_mask and used_bl. Continue scanning while some
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expected registers are not saved. Set lr_register if LR is not
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stored.
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(rs6000_frame_cache): Handle gpr_mask and lr_register.
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2008-08-17 Tom Tromey <tromey@redhat.com>
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PR gdb/1535:
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@ -129,17 +129,20 @@ struct rs6000_framedata
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by which we decrement sp to allocate
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the frame */
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int saved_gpr; /* smallest # of saved gpr */
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unsigned int gpr_mask; /* Each bit is an individual saved GPR. */
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int saved_fpr; /* smallest # of saved fpr */
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int saved_vr; /* smallest # of saved vr */
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int saved_ev; /* smallest # of saved ev */
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int alloca_reg; /* alloca register number (frame ptr) */
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char frameless; /* true if frameless functions. */
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char nosavedpc; /* true if pc not saved. */
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char used_bl; /* true if link register clobbered */
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int gpr_offset; /* offset of saved gprs from prev sp */
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int fpr_offset; /* offset of saved fprs from prev sp */
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int vr_offset; /* offset of saved vrs from prev sp */
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int ev_offset; /* offset of saved evs from prev sp */
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int lr_offset; /* offset of saved lr */
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int lr_register; /* register of saved lr, if trustworthy */
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int cr_offset; /* offset of saved cr */
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int vrsave_offset; /* offset of saved vrsave register */
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};
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@ -870,6 +873,7 @@ insn_changes_sp_or_jumps (unsigned long insn)
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static int
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rs6000_in_function_epilogue_p (struct gdbarch *gdbarch, CORE_ADDR pc)
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{
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struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
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bfd_byte insn_buf[PPC_INSN_SIZE];
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CORE_ADDR scan_pc, func_start, func_end, epilogue_start, epilogue_end;
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unsigned long insn;
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@ -897,6 +901,17 @@ rs6000_in_function_epilogue_p (struct gdbarch *gdbarch, CORE_ADDR pc)
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insn = extract_unsigned_integer (insn_buf, PPC_INSN_SIZE);
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if (insn == 0x4e800020)
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break;
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/* Assume a bctr is a tail call unless it points strictly within
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this function. */
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if (insn == 0x4e800420)
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{
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CORE_ADDR ctr = get_frame_register_unsigned (curfrm,
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tdep->ppc_ctr_regnum);
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if (ctr > func_start && ctr < func_end)
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return 0;
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else
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break;
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}
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if (insn_changes_sp_or_jumps (insn))
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return 0;
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}
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@ -1316,6 +1331,7 @@ skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc, CORE_ADDR lim_pc,
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fdata->alloca_reg = -1;
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fdata->frameless = 1;
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fdata->nosavedpc = 1;
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fdata->lr_register = -1;
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for (;; pc += 4)
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{
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@ -1357,7 +1373,7 @@ skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc, CORE_ADDR lim_pc,
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remember just the first one, but skip over additional
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ones. */
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if (lr_reg == -1)
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lr_reg = (op & 0x03e00000);
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lr_reg = (op & 0x03e00000) >> 21;
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if (lr_reg == 0)
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r0_contains_arg = 0;
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continue;
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@ -1388,6 +1404,10 @@ skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc, CORE_ADDR lim_pc,
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{
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reg = GET_SRC_REG (op);
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if ((op & 0xfc1f0000) == 0xbc010000)
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fdata->gpr_mask |= ~((1U << reg) - 1);
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else
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fdata->gpr_mask |= 1U << reg;
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if (fdata->saved_gpr == -1 || fdata->saved_gpr > reg)
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{
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fdata->saved_gpr = reg;
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@ -1479,6 +1499,7 @@ skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc, CORE_ADDR lim_pc,
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else if (op == 0x48000005)
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{ /* bl .+4 used in
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-mrelocatable */
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fdata->used_bl = 1;
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continue;
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}
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@ -1503,7 +1524,10 @@ skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc, CORE_ADDR lim_pc,
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/* If the return address has already been saved, we can skip
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calls to blrl (for PIC). */
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if (lr_reg != -1 && bl_to_blrl_insn_p (pc, op))
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continue;
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{
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fdata->used_bl = 1;
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continue;
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}
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/* Don't skip over the subroutine call if it is not within
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the first three instructions of the prologue and either
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@ -1529,8 +1553,9 @@ skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc, CORE_ADDR lim_pc,
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if (op == 0x4def7b82 || op == 0) /* crorc 15, 15, 15 */
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break; /* don't skip over
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this branch */
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continue;
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fdata->used_bl = 1;
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continue;
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}
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/* update stack pointer */
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else if ((op & 0xfc1f0000) == 0x94010000)
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@ -1791,11 +1816,15 @@ skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc, CORE_ADDR lim_pc,
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else
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{
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unsigned int all_mask = ~((1U << fdata->saved_gpr) - 1);
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/* Not a recognized prologue instruction.
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Handle optimizer code motions into the prologue by continuing
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the search if we have no valid frame yet or if the return
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address is not yet saved in the frame. */
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if (fdata->frameless == 0 && fdata->nosavedpc == 0)
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address is not yet saved in the frame. Also skip instructions
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if some of the GPRs expected to be saved are not yet saved. */
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if (fdata->frameless == 0 && fdata->nosavedpc == 0
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&& (fdata->gpr_mask & all_mask) == all_mask)
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break;
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if (op == 0x4e800020 /* blr */
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@ -1848,6 +1877,9 @@ skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc, CORE_ADDR lim_pc,
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}
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#endif /* 0 */
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if (pc == lim_pc && lr_reg >= 0)
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fdata->lr_register = lr_reg;
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fdata->offset = -fdata->offset;
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return last_prologue_pc;
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}
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@ -2892,7 +2924,8 @@ rs6000_frame_cache (struct frame_info *this_frame, void **this_cache)
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}
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/* if != -1, fdata.saved_gpr is the smallest number of saved_gpr.
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All gpr's from saved_gpr to gpr31 are saved. */
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All gpr's from saved_gpr to gpr31 are saved (except during the
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prologue). */
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if (fdata.saved_gpr >= 0)
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{
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@ -2900,7 +2933,8 @@ rs6000_frame_cache (struct frame_info *this_frame, void **this_cache)
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CORE_ADDR gpr_addr = cache->base + fdata.gpr_offset;
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for (i = fdata.saved_gpr; i < ppc_num_gprs; i++)
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{
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cache->saved_regs[tdep->ppc_gp0_regnum + i].addr = gpr_addr;
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if (fdata.gpr_mask & (1U << i))
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cache->saved_regs[tdep->ppc_gp0_regnum + i].addr = gpr_addr;
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gpr_addr += wordsize;
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}
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}
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@ -2947,6 +2981,8 @@ rs6000_frame_cache (struct frame_info *this_frame, void **this_cache)
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holds the LR. */
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if (fdata.lr_offset != 0)
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cache->saved_regs[tdep->ppc_lr_regnum].addr = cache->base + fdata.lr_offset;
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else if (fdata.lr_register != -1)
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cache->saved_regs[tdep->ppc_lr_regnum].realreg = fdata.lr_register;
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/* The PC is found in the link register. */
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cache->saved_regs[gdbarch_pc_regnum (gdbarch)] =
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cache->saved_regs[tdep->ppc_lr_regnum];
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@ -1,3 +1,7 @@
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2008-08-18 Daniel Jacobowitz <dan@codesourcery.com>
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* gdb.arch/powerpc-prologue.exp: Correct saved registers.
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2008-08-17 Tom Tromey <tromey@redhat.com>
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* gdb.base/help.exp (help catch): Rewrite.
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@ -84,5 +84,5 @@ gdb_test "backtrace 10" \
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"backtrace in optimized"
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gdb_test "info frame" \
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".*Saved registers:.*r30 at.*r31 at.*pc at.*lr at.*" \
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".*Saved registers:.*r30 at.*pc at.*lr at.*" \
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"saved registers in optimized"
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