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* interp.c (OPTION_BRANCH_BUG_4011): Add.
(mips_option_handler): Handle OPTION_BRANCH_BUG_4011. (mips_options): Define the option. * mips.igen (check_4011_branch_bug): New. (mark_4011_branch_bug): New. (all branch insn): Call mark_branch_bug, and check_branch_bug. * sim-main.h (branchbug4011_option, branchbug4011_last_target, branchbug4011_last_cia, BRANCHBUG4011_OPTION, BRANCHBUG4011_LAST_TARGET, BRANCHBUG4011_LAST_CIA, check_branch_bug, mark_branch_bug): Define.
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@ -300,7 +300,33 @@ else
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done
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fi
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branchbug4011_files="interp.c mips.igen sim-main.h ChangeLog"
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if ( echo $* | grep keep\-branchbug4011 > /dev/null ) ; then
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for i in $branchbug4011_files ; do
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if test ! -d $i && (grep sanitize-branchbug4011 $i > /dev/null) ; then
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if [ -n "${verbose}" ] ; then
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echo Keeping branchbug4011 stuff in $i
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fi
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fi
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done
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else
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for i in $branchbug4011_files ; do
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if test -r $i && (grep sanitize-branchbug4011 $i > /dev/null) ; then
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if [ -n "${verbose}" ] ; then
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echo Removing traces of \"branchbug4011\" from $i...
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fi
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cp $i new
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sed '/start\-sanitize\-branchbug4011/,/end\-sanitize\-branchbug4011/d' < $i > new
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if [ -n "${safe}" -a ! -f .Recover/$i ] ; then
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if [ -n "${verbose}" ] ; then
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echo Caching $i in .Recover...
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fi
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mv $i .Recover
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fi
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mv new $i
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fi
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done
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fi
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never_files="ChangeLog configure configure.in interp.c gencode.c mips.igen mips.dc"
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@ -640,6 +640,23 @@ enum float_operation
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#define RAIDX 31
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#define RA (REGISTERS[RAIDX])
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/* While space is allocated in the main registers arrray for some of
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the COP0 registers, that space isn't sufficient. Unknown COP0
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registers overflow into the array below */
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#define NR_COP0_GPR 32
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unsigned_word cop0_gpr[NR_COP0_GPR];
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#define COP0_GPR ((CPU)->cop0_gpr)
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/* start-sanitize-r5900 */
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#define NR_COP0_BP 8
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unsigned_word cop0_bp[NR_COP0_BP];
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#define COP0_BP ((CPU)->cop0_bp)
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#define NR_COP0_P 64
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unsigned_word cop0_p[NR_COP0_P];
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#define COP0_P ((CPU)->cop0_p)
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/* end-sanitize-r5900 */
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/* Keep the current format state for each register: */
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FP_formats fpr_state[32];
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#define FPR_STATE ((CPU)->fpr_state)
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@ -665,6 +682,24 @@ enum float_operation
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hilo_history lo_history;
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#define LOHISTORY (&(CPU)->lo_history)
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/* start-sanitize-branchbug4011 */
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#if 1
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int branchbug4011_option;
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#define BRANCHBUG4011_OPTION ((CPU)->branchbug4011_option)
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address_word branchbug4011_last_target;
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#define BRANCHBUG4011_LAST_TARGET ((CPU)->branchbug4011_last_target)
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address_word branchbug4011_last_cia;
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#define BRANCHBUG4011_LAST_CIA ((CPU)->branchbug4011_last_cia)
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#define check_branch_bug() (check_4011_branch_bug (_SD))
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#define mark_branch_bug(TARGET) (mark_4011_branch_bug (_SD,TARGET))
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#else
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/* end-sanitize-branchbug4011 */
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#define check_branch_bug()
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#define mark_branch_bug(TARGET)
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/* start-sanitize-branchbug4011 */
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#endif
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/* end-sanitize-branchbug4011 */
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/* start-sanitize-r5900 */
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sim_r5900_cpu r5900;
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@ -737,6 +772,7 @@ struct sim_state {
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#define ksu_unknown (0x3)
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#define status_IE (1 << 0) /* Interrupt enable */
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#define status_EIE (1 << 16) /* Enable Interrupt Enable */
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#define status_EXL (1 << 1) /* Exception level */
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#define status_RE (1 << 25) /* Reverse Endian in user mode */
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#define status_FR (1 << 26) /* enables MIPS III additional FP registers */
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@ -856,6 +892,8 @@ struct sim_state {
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#define BREAKPOINT_INSTRUCTION2 (0x0000014d)
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void interrupt_event (SIM_DESC sd, void *data);
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void signal_exception (SIM_DESC sd, sim_cpu *cpu, address_word cia, int exception, ...);
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#define SignalException(exc,instruction) signal_exception (SD, CPU, cia, (exc), (instruction))
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#define SignalExceptionInterrupt() signal_exception (SD, CPU, cia, Interrupt)
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@ -975,7 +1013,7 @@ INLINE_SIM_MAIN (unsigned16) ifetch16 PARAMS ((SIM_DESC sd, sim_cpu *cpu, addres
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#define IMEM16_IMMED(CIA,NR) ifetch16 (SD, CPU, (CIA), ((CIA) & ~1) + 2 * (NR))
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void dotrace PARAMS ((SIM_DESC sd, sim_cpu *cpu, FILE *tracefh, int type, SIM_ADDR address, int width, char *comment, ...));
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FILE *tracefh;
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extern FILE *tracefh;
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INLINE_SIM_MAIN (void) pending_tick PARAMS ((SIM_DESC sd, sim_cpu *cpu, address_word cia));
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