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* sh-tdep.c (sh_sh4_nofpu_register_name): New function.
(sh_sh4al_dsp_register_name): Ditto. (sh4_nofpu_show_regs): Ditto. (sh_gdbarch_init): Add cases for bfd_mach_sh4al_dsp, bfd_mach_sh4a, bfd_mach_sh4_nofpu and bfd_mach_sh4a_nofpu.
This commit is contained in:
Corinna Vinschen
parent
2160782c82
commit
474e5826dd
@ -1,3 +1,11 @@
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2003-11-03 Corinna Vinschen <vinschen@redhat.com>
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* sh-tdep.c (sh_sh4_nofpu_register_name): New function.
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(sh_sh4al_dsp_register_name): Ditto.
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(sh4_nofpu_show_regs): Ditto.
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(sh_gdbarch_init): Add cases for bfd_mach_sh4al_dsp, bfd_mach_sh4a,
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bfd_mach_sh4_nofpu and bfd_mach_sh4a_nofpu.
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2003-11-03 Andrew Cagney <cagney@redhat.com>
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* bcache.c: Include "gdb_assert.h".
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102
gdb/sh-tdep.c
102
gdb/sh-tdep.c
@ -256,6 +256,60 @@ sh_sh4_register_name (int reg_nr)
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return register_names[reg_nr];
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}
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static const char *
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sh_sh4_nofpu_register_name (int reg_nr)
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{
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static char *register_names[] = {
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/* general registers 0-15 */
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"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
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"r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
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/* 16 - 22 */
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"pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
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/* 23, 24 */
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"", "",
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/* floating point registers 25 - 40 -- not for nofpu target */
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"", "", "", "", "", "", "", "",
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"", "", "", "", "", "", "", "",
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/* 41, 42 */
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"ssr", "spc",
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/* bank 0 43 - 50 */
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"r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0",
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/* bank 1 51 - 58 */
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"r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1",
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/* double precision (pseudo) 59 - 66 -- not for nofpu target */
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"", "", "", "", "", "", "", "",
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/* vectors (pseudo) 67 - 70 -- not for nofpu target */
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"", "", "", "",
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};
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if (reg_nr < 0)
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return NULL;
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if (reg_nr >= (sizeof (register_names) / sizeof (*register_names)))
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return NULL;
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return register_names[reg_nr];
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}
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static const char *
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sh_sh4al_dsp_register_name (int reg_nr)
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{
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static char *register_names[] = {
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"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
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"r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
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"pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
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"", "dsr",
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"a0g", "a0", "a1g", "a1", "m0", "m1", "x0", "x1",
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"y0", "y1", "", "", "", "", "", "mod",
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"ssr", "spc",
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"rs", "re", "", "", "", "", "", "",
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"r0b", "r1b", "r2b", "r3b", "r4b", "r5b", "r6b", "r7b"
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"", "", "", "", "", "", "", "",
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};
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if (reg_nr < 0)
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return NULL;
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if (reg_nr >= (sizeof (register_names) / sizeof (*register_names)))
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return NULL;
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return register_names[reg_nr];
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}
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static const unsigned char *
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sh_breakpoint_from_pc (CORE_ADDR *pcptr, int *lenptr)
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{
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@ -1339,6 +1393,36 @@ sh4_show_regs (void)
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(long) read_register (FP0_REGNUM + 15));
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}
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static void
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sh4_nofpu_show_regs (void)
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{
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printf_filtered ("PC=%s SR=%08lx PR=%08lx MACH=%08lx MACHL=%08lx\n",
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paddr (read_register (PC_REGNUM)),
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(long) read_register (SR_REGNUM),
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(long) read_register (PR_REGNUM),
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(long) read_register (MACH_REGNUM),
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(long) read_register (MACL_REGNUM));
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printf_filtered ("GBR=%08lx VBR=%08lx",
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(long) read_register (GBR_REGNUM),
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(long) read_register (VBR_REGNUM));
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printf_filtered (" SSR=%08lx SPC=%08lx",
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(long) read_register (SSR_REGNUM),
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(long) read_register (SPC_REGNUM));
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printf_filtered
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("\nR0-R7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
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(long) read_register (0), (long) read_register (1),
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(long) read_register (2), (long) read_register (3),
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(long) read_register (4), (long) read_register (5),
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(long) read_register (6), (long) read_register (7));
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printf_filtered ("R8-R15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
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(long) read_register (8), (long) read_register (9),
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(long) read_register (10), (long) read_register (11),
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(long) read_register (12), (long) read_register (13),
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(long) read_register (14), (long) read_register (15));
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}
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static void
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sh_dsp_show_regs (void)
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{
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@ -2097,13 +2181,20 @@ sh_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
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break;
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case bfd_mach_sh3_dsp:
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case bfd_mach_sh4al_dsp:
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sh_show_regs = sh3_dsp_show_regs;
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break;
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case bfd_mach_sh4:
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case bfd_mach_sh4a:
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sh_show_regs = sh4_show_regs;
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break;
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case bfd_mach_sh4_nofpu:
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case bfd_mach_sh4a_nofpu:
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sh_show_regs = sh4_nofpu_show_regs;
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break;
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case bfd_mach_sh5:
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sh_show_regs = sh64_show_regs;
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/* SH5 is handled entirely in sh64-tdep.c */
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@ -2222,6 +2313,7 @@ sh_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
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break;
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case bfd_mach_sh4:
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case bfd_mach_sh4a:
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set_gdbarch_register_name (gdbarch, sh_sh4_register_name);
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set_gdbarch_register_type (gdbarch, sh_sh4_register_type);
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set_gdbarch_fp0_regnum (gdbarch, 25);
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@ -2234,6 +2326,16 @@ sh_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
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set_gdbarch_push_dummy_call (gdbarch, sh_push_dummy_call_fpu);
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break;
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case bfd_mach_sh4_nofpu:
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case bfd_mach_sh4a_nofpu:
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set_gdbarch_register_name (gdbarch, sh_sh4_nofpu_register_name);
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break;
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case bfd_mach_sh4al_dsp:
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set_gdbarch_register_name (gdbarch, sh_sh4al_dsp_register_name);
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set_gdbarch_register_sim_regno (gdbarch, sh_dsp_register_sim_regno);
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break;
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default:
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set_gdbarch_register_name (gdbarch, sh_generic_register_name);
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break;
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