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gas/
2009-10-20 H.J. Lu <hongjiu.lu@intel.com> PR gas/10775 * doc/c-i386.texi: Mention movabs. gas/testsuite/ 2009-10-20 H.J. Lu <hongjiu.lu@intel.com> PR gas/10775 * gas/i386/immed64.d: Updated. * gas/i386/l1om.d: Likewise. * gas/i386/x86-64-disp-intel.d: Likewise. * gas/i386/x86-64-disp.d: Likewise. * gas/i386/x86_64.d: Likewise. opcodes/ 2009-10-20 H.J. Lu <hongjiu.lu@intel.com> PR gas/10775 * i386-dis.c: Document LB, LS and LV macros. (dis386): Use mov%LB, mov%LS and mov%LV on mov instruction with the 64-bit displacement or immediate operand. (putop): Handle LB, LS and LV macros.
This commit is contained in:
H.J. Lu
parent
9d1807c37c
commit
4b06377fcc
@ -1,3 +1,8 @@
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2009-10-20 H.J. Lu <hongjiu.lu@intel.com>
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PR gas/10775
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* doc/c-i386.texi: Mention movabs.
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2009-10-19 H.J. Lu <hongjiu.lu@intel.com>
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* doc/c-i386.texi: Don't mention the 8 extra control registers
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@ -309,6 +309,9 @@ this by prefixing memory operands (@emph{not} the instruction mnemonics) with
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Intel @samp{mov al, byte ptr @var{foo}} is @samp{movb @var{foo}, %al} in AT&T
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syntax.
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In 64-bit code, @samp{movabs} can be used to encode the @samp{mov}
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instruction with the 64-bit displacement or immediate operand.
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@cindex return instructions, i386
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@cindex i386 jump, call, return
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@cindex return instructions, x86-64
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@ -1,3 +1,12 @@
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2009-10-20 H.J. Lu <hongjiu.lu@intel.com>
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PR gas/10775
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* gas/i386/immed64.d: Updated.
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* gas/i386/l1om.d: Likewise.
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* gas/i386/x86-64-disp-intel.d: Likewise.
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* gas/i386/x86-64-disp.d: Likewise.
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* gas/i386/x86_64.d: Likewise.
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2009-10-19 Doug Evans <dje@sebabeach.org>
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* gas/xc16x/shlrol.s: Specify constant shift amount.
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@ -21,9 +21,9 @@ Disassembly of section \.text:
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[ ]*[0-9a-fA-F]+:[ ]+b8 04 00 00 00[ ]+movl? +\$0x4,%eax
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[ ]*[0-9a-fA-F]+:[ ]+b8 08 00 00 00[ ]+movl? +\$0x8,%eax
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[ ]*[0-9a-fA-F]+:[ ]+b8 00 00 00 00[ ]+movl? +\$0x0,%eax
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[ ]*[0-9a-fA-F]+:[ ]+48 b8 04 00 00 00 00 00 00 00[ ]+movq? +\$0x4,%rax
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[ ]*[0-9a-fA-F]+:[ ]+48 b8 08 00 00 00 00 00 00 00[ ]+movq? +\$0x8,%rax
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[ ]*[0-9a-fA-F]+:[ ]+48 b8 00 00 00 00 00 00 00 00[ ]+movq? +\$0x0,%rax
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[ ]*[0-9a-fA-F]+:[ ]+48 b8 04 00 00 00 00 00 00 00[ ]+movabsq? +\$0x4,%rax
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[ ]*[0-9a-fA-F]+:[ ]+48 b8 08 00 00 00 00 00 00 00[ ]+movabsq? +\$0x8,%rax
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[ ]*[0-9a-fA-F]+:[ ]+48 b8 00 00 00 00 00 00 00 00[ ]+movabsq? +\$0x0,%rax
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[ ]*[0-9a-fA-F]+:[ ]+04 04[ ]+addb? +\$0x4,%al
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[ ]*[0-9a-fA-F]+:[ ]+04 08[ ]+addb? +\$0x8,%al
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[ ]*[0-9a-fA-F]+:[ ]+04 00[ ]+addb? +\$0x0,%al
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@ -47,8 +47,8 @@ Disassembly of section .text:
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[ ]*[a-f0-9]+: 41 b4 11 mov \$0x11,%r12b
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[ ]*[a-f0-9]+: b8 44 33 22 11 mov \$0x11223344,%eax
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[ ]*[a-f0-9]+: 41 b8 44 33 22 11 mov \$0x11223344,%r8d
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[ ]*[a-f0-9]+: 48 b8 88 77 66 55 44 33 22 11 mov \$0x1122334455667788,%rax
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[ ]*[a-f0-9]+: 49 b8 88 77 66 55 44 33 22 11 mov \$0x1122334455667788,%r8
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[ ]*[a-f0-9]+: 48 b8 88 77 66 55 44 33 22 11 movabs \$0x1122334455667788,%rax
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[ ]*[a-f0-9]+: 49 b8 88 77 66 55 44 33 22 11 movabs \$0x1122334455667788,%r8
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[ ]*[a-f0-9]+: 03 00 add \(%rax\),%eax
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[ ]*[a-f0-9]+: 41 03 00 add \(%r8\),%eax
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[ ]*[a-f0-9]+: 45 03 00 add \(%r8\),%r8d
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@ -94,12 +94,12 @@ Disassembly of section .text:
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[ ]*[a-f0-9]+: 83 80 22 22 22 22 33 addl \$0x33,0x22222222\(%rax\)
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[ ]*[a-f0-9]+: 41 83 04 e8 33 addl \$0x33,\(%r8,%rbp,8\)
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[ ]*[a-f0-9]+: 83 04 25 22 22 22 22 33 addl \$0x33,0x22222222
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[ ]*[a-f0-9]+: a0 11 22 33 44 55 66 77 88 mov 0x8877665544332211,%al
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[ ]*[a-f0-9]+: a1 11 22 33 44 55 66 77 88 mov 0x8877665544332211,%eax
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[ ]*[a-f0-9]+: a2 11 22 33 44 55 66 77 88 mov %al,0x8877665544332211
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[ ]*[a-f0-9]+: a3 11 22 33 44 55 66 77 88 mov %eax,0x8877665544332211
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[ ]*[a-f0-9]+: 48 a1 11 22 33 44 55 66 77 88 mov 0x8877665544332211,%rax
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[ ]*[a-f0-9]+: 48 a3 11 22 33 44 55 66 77 88 mov %rax,0x8877665544332211
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[ ]*[a-f0-9]+: a0 11 22 33 44 55 66 77 88 movabs 0x8877665544332211,%al
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[ ]*[a-f0-9]+: a1 11 22 33 44 55 66 77 88 movabs 0x8877665544332211,%eax
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[ ]*[a-f0-9]+: a2 11 22 33 44 55 66 77 88 movabs %al,0x8877665544332211
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[ ]*[a-f0-9]+: a3 11 22 33 44 55 66 77 88 movabs %eax,0x8877665544332211
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[ ]*[a-f0-9]+: 48 a1 11 22 33 44 55 66 77 88 movabs 0x8877665544332211,%rax
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[ ]*[a-f0-9]+: 48 a3 11 22 33 44 55 66 77 88 movabs %rax,0x8877665544332211
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[ ]*[a-f0-9]+: 48 99 cqto
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[ ]*[a-f0-9]+: 48 98 cltq
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[ ]*[a-f0-9]+: 48 63 c0 movslq %eax,%rax
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@ -111,7 +111,7 @@ Disassembly of section .text:
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[ ]*[a-f0-9]+: 66 b8 00 00 mov \$0x0,%ax
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[ ]*[a-f0-9]+: b8 00 00 00 00 mov \$0x0,%eax
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[ ]*[a-f0-9]+: 48 c7 c0 00 00 00 00 mov \$0x0,%rax
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[ ]*[a-f0-9]+: a1 00 00 00 00 00 00 00 00 mov 0x0,%eax
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[ ]*[a-f0-9]+: a1 00 00 00 00 00 00 00 00 movabs 0x0,%eax
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[ ]*[a-f0-9]+: 8b 04 25 00 00 00 00 mov 0x0,%eax
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[ ]*[a-f0-9]+: 8b 80 00 00 00 00 mov 0x0\(%rax\),%eax
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[ ]*[a-f0-9]+: 8b 05 00 00 00 00 mov 0x0\(%rip\),%eax # 1d5 <bar\+0x2e>
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@ -119,28 +119,28 @@ Disassembly of section .text:
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[ ]*[a-f0-9]+: 66 b8 00 00 mov \$0x0,%ax
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[ ]*[a-f0-9]+: b8 00 00 00 00 mov \$0x0,%eax
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[ ]*[a-f0-9]+: 48 c7 c0 00 00 00 00 mov \$0x0,%rax
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[ ]*[a-f0-9]+: a1 00 00 00 00 00 00 00 00 mov 0x0,%eax
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[ ]*[a-f0-9]+: a1 00 00 00 00 00 00 00 00 movabs 0x0,%eax
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[ ]*[a-f0-9]+: 8b 04 25 00 00 00 00 mov 0x0,%eax
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[ ]*[a-f0-9]+: 8b 80 00 00 00 00 mov 0x0\(%rax\),%eax
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[ ]*[a-f0-9]+: 8b 05 00 00 00 00 mov 0x0\(%rip\),%eax # 203 <foo>
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0+203 <foo>:
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[ ]*[a-f0-9]+: a0 11 22 33 44 55 66 77 88 mov 0x8877665544332211,%al
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[ ]*[a-f0-9]+: 66 a1 11 22 33 44 55 66 77 88 mov 0x8877665544332211,%ax
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[ ]*[a-f0-9]+: a1 11 22 33 44 55 66 77 88 mov 0x8877665544332211,%eax
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[ ]*[a-f0-9]+: 48 a1 11 22 33 44 55 66 77 88 mov 0x8877665544332211,%rax
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[ ]*[a-f0-9]+: a2 11 22 33 44 55 66 77 88 mov %al,0x8877665544332211
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[ ]*[a-f0-9]+: 66 a3 11 22 33 44 55 66 77 88 mov %ax,0x8877665544332211
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[ ]*[a-f0-9]+: a3 11 22 33 44 55 66 77 88 mov %eax,0x8877665544332211
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[ ]*[a-f0-9]+: 48 a3 11 22 33 44 55 66 77 88 mov %rax,0x8877665544332211
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[ ]*[a-f0-9]+: a0 11 22 33 44 55 66 77 88 mov 0x8877665544332211,%al
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[ ]*[a-f0-9]+: 66 a1 11 22 33 44 55 66 77 88 mov 0x8877665544332211,%ax
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[ ]*[a-f0-9]+: a1 11 22 33 44 55 66 77 88 mov 0x8877665544332211,%eax
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[ ]*[a-f0-9]+: 48 a1 11 22 33 44 55 66 77 88 mov 0x8877665544332211,%rax
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[ ]*[a-f0-9]+: a2 11 22 33 44 55 66 77 88 mov %al,0x8877665544332211
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[ ]*[a-f0-9]+: 66 a3 11 22 33 44 55 66 77 88 mov %ax,0x8877665544332211
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[ ]*[a-f0-9]+: a3 11 22 33 44 55 66 77 88 mov %eax,0x8877665544332211
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[ ]*[a-f0-9]+: 48 a3 11 22 33 44 55 66 77 88 mov %rax,0x8877665544332211
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[ ]*[a-f0-9]+: a0 11 22 33 44 55 66 77 88 movabs 0x8877665544332211,%al
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[ ]*[a-f0-9]+: 66 a1 11 22 33 44 55 66 77 88 movabs 0x8877665544332211,%ax
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[ ]*[a-f0-9]+: a1 11 22 33 44 55 66 77 88 movabs 0x8877665544332211,%eax
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[ ]*[a-f0-9]+: 48 a1 11 22 33 44 55 66 77 88 movabs 0x8877665544332211,%rax
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[ ]*[a-f0-9]+: a2 11 22 33 44 55 66 77 88 movabs %al,0x8877665544332211
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[ ]*[a-f0-9]+: 66 a3 11 22 33 44 55 66 77 88 movabs %ax,0x8877665544332211
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[ ]*[a-f0-9]+: a3 11 22 33 44 55 66 77 88 movabs %eax,0x8877665544332211
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[ ]*[a-f0-9]+: 48 a3 11 22 33 44 55 66 77 88 movabs %rax,0x8877665544332211
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[ ]*[a-f0-9]+: a0 11 22 33 44 55 66 77 88 movabs 0x8877665544332211,%al
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[ ]*[a-f0-9]+: 66 a1 11 22 33 44 55 66 77 88 movabs 0x8877665544332211,%ax
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[ ]*[a-f0-9]+: a1 11 22 33 44 55 66 77 88 movabs 0x8877665544332211,%eax
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[ ]*[a-f0-9]+: 48 a1 11 22 33 44 55 66 77 88 movabs 0x8877665544332211,%rax
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[ ]*[a-f0-9]+: a2 11 22 33 44 55 66 77 88 movabs %al,0x8877665544332211
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[ ]*[a-f0-9]+: 66 a3 11 22 33 44 55 66 77 88 movabs %ax,0x8877665544332211
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[ ]*[a-f0-9]+: a3 11 22 33 44 55 66 77 88 movabs %eax,0x8877665544332211
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[ ]*[a-f0-9]+: 48 a3 11 22 33 44 55 66 77 88 movabs %rax,0x8877665544332211
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[ ]*[a-f0-9]+: 8a 04 25 11 22 33 ff mov 0xffffffffff332211,%al
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[ ]*[a-f0-9]+: 66 8b 04 25 11 22 33 ff mov 0xffffffffff332211,%ax
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[ ]*[a-f0-9]+: 8b 04 25 11 22 33 ff mov 0xffffffffff332211,%eax
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@ -16,7 +16,7 @@ Disassembly of section .text:
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[ ]*[a-f0-9]+: 8b 04 25 00 00 00 80 mov eax,DWORD PTR ds:0xffffffff80000000
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[ ]*[a-f0-9]+: 8b 04 25 00 00 00 80 mov eax,DWORD PTR ds:0xffffffff80000000
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[ ]*[a-f0-9]+: 8b 04 25 ff ff ff 7f mov eax,DWORD PTR ds:0x7fffffff
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[ ]*[a-f0-9]+: a1 00 00 00 80 00 00 00 00 mov eax,ds:0x80000000
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[ ]*[a-f0-9]+: a1 00 00 00 80 00 00 00 00 movabs eax,ds:0x80000000
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[ ]*[a-f0-9]+: b8 f0 00 e0 0e mov eax,0xee000f0
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[ ]*[a-f0-9]+: 89 98 f0 00 e0 0e mov DWORD PTR \[rax\+0xee000f0\],ebx
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[ ]*[a-f0-9]+: 89 98 f0 00 e0 0e mov DWORD PTR \[rax\+0xee000f0\],ebx
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@ -26,15 +26,15 @@ Disassembly of section .text:
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[ ]*[a-f0-9]+: 65 89 1c 25 f0 00 e0 0e mov DWORD PTR gs:0xee000f0,ebx
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[ ]*[a-f0-9]+: 89 04 25 f0 00 e0 0e mov DWORD PTR ds:0xee000f0,eax
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[ ]*[a-f0-9]+: 65 89 04 25 f0 00 e0 0e mov DWORD PTR gs:0xee000f0,eax
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[ ]*[a-f0-9]+: a3 f0 00 e0 fe 00 00 00 00 mov ds:0xfee000f0,eax
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[ ]*[a-f0-9]+: 65 a3 f0 00 e0 fe 00 00 00 00 mov gs:0xfee000f0,eax
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[ ]*[a-f0-9]+: a3 f0 00 e0 fe 00 00 00 00 movabs ds:0xfee000f0,eax
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[ ]*[a-f0-9]+: 65 a3 f0 00 e0 fe 00 00 00 00 movabs gs:0xfee000f0,eax
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[ ]*[a-f0-9]+: 65 8b 1c 25 f0 00 e0 0e mov ebx,DWORD PTR gs:0xee000f0
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[ ]*[a-f0-9]+: 8b 1c 25 f0 00 e0 0e mov ebx,DWORD PTR ds:0xee000f0
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[ ]*[a-f0-9]+: 8b 1c 25 f0 00 e0 0e mov ebx,DWORD PTR ds:0xee000f0
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[ ]*[a-f0-9]+: 65 8b 04 25 f0 00 e0 0e mov eax,DWORD PTR gs:0xee000f0
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[ ]*[a-f0-9]+: 8b 04 25 f0 00 e0 0e mov eax,DWORD PTR ds:0xee000f0
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[ ]*[a-f0-9]+: 8b 04 25 f0 00 e0 0e mov eax,DWORD PTR ds:0xee000f0
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[ ]*[a-f0-9]+: 65 a1 f0 00 e0 fe 00 00 00 00 mov eax,gs:0xfee000f0
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[ ]*[a-f0-9]+: a1 f0 00 e0 fe 00 00 00 00 mov eax,ds:0xfee000f0
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[ ]*[a-f0-9]+: a1 f0 00 e0 fe 00 00 00 00 mov eax,ds:0xfee000f0
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[ ]*[a-f0-9]+: 65 a1 f0 00 e0 fe 00 00 00 00 movabs eax,gs:0xfee000f0
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[ ]*[a-f0-9]+: a1 f0 00 e0 fe 00 00 00 00 movabs eax,ds:0xfee000f0
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[ ]*[a-f0-9]+: a1 f0 00 e0 fe 00 00 00 00 movabs eax,ds:0xfee000f0
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#pass
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@ -15,7 +15,7 @@ Disassembly of section .text:
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[ ]*[a-f0-9]+: 8b 04 25 00 00 00 80 mov 0xffffffff80000000,%eax
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[ ]*[a-f0-9]+: 8b 04 25 00 00 00 80 mov 0xffffffff80000000,%eax
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[ ]*[a-f0-9]+: 8b 04 25 ff ff ff 7f mov 0x7fffffff,%eax
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[ ]*[a-f0-9]+: a1 00 00 00 80 00 00 00 00 mov 0x80000000,%eax
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[ ]*[a-f0-9]+: a1 00 00 00 80 00 00 00 00 movabs 0x80000000,%eax
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[ ]*[a-f0-9]+: b8 f0 00 e0 0e mov \$0xee000f0,%eax
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[ ]*[a-f0-9]+: 89 98 f0 00 e0 0e mov %ebx,0xee000f0\(%rax\)
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[ ]*[a-f0-9]+: 89 98 f0 00 e0 0e mov %ebx,0xee000f0\(%rax\)
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@ -25,15 +25,15 @@ Disassembly of section .text:
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[ ]*[a-f0-9]+: 65 89 1c 25 f0 00 e0 0e mov %ebx,%gs:0xee000f0
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[ ]*[a-f0-9]+: 89 04 25 f0 00 e0 0e mov %eax,0xee000f0
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[ ]*[a-f0-9]+: 65 89 04 25 f0 00 e0 0e mov %eax,%gs:0xee000f0
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[ ]*[a-f0-9]+: a3 f0 00 e0 fe 00 00 00 00 mov %eax,0xfee000f0
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[ ]*[a-f0-9]+: 65 a3 f0 00 e0 fe 00 00 00 00 mov %eax,%gs:0xfee000f0
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[ ]*[a-f0-9]+: a3 f0 00 e0 fe 00 00 00 00 movabs %eax,0xfee000f0
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[ ]*[a-f0-9]+: 65 a3 f0 00 e0 fe 00 00 00 00 movabs %eax,%gs:0xfee000f0
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[ ]*[a-f0-9]+: 65 8b 1c 25 f0 00 e0 0e mov %gs:0xee000f0,%ebx
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[ ]*[a-f0-9]+: 8b 1c 25 f0 00 e0 0e mov 0xee000f0,%ebx
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[ ]*[a-f0-9]+: 8b 1c 25 f0 00 e0 0e mov 0xee000f0,%ebx
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[ ]*[a-f0-9]+: 65 8b 04 25 f0 00 e0 0e mov %gs:0xee000f0,%eax
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[ ]*[a-f0-9]+: 8b 04 25 f0 00 e0 0e mov 0xee000f0,%eax
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[ ]*[a-f0-9]+: 8b 04 25 f0 00 e0 0e mov 0xee000f0,%eax
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[ ]*[a-f0-9]+: 65 a1 f0 00 e0 fe 00 00 00 00 mov %gs:0xfee000f0,%eax
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[ ]*[a-f0-9]+: a1 f0 00 e0 fe 00 00 00 00 mov 0xfee000f0,%eax
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[ ]*[a-f0-9]+: a1 f0 00 e0 fe 00 00 00 00 mov 0xfee000f0,%eax
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[ ]*[a-f0-9]+: 65 a1 f0 00 e0 fe 00 00 00 00 movabs %gs:0xfee000f0,%eax
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[ ]*[a-f0-9]+: a1 f0 00 e0 fe 00 00 00 00 movabs 0xfee000f0,%eax
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[ ]*[a-f0-9]+: a1 f0 00 e0 fe 00 00 00 00 movabs 0xfee000f0,%eax
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#pass
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@ -45,8 +45,8 @@ Disassembly of section .text:
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[ ]*[a-f0-9]+: 41 b4 11 mov \$0x11,%r12b
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[ ]*[a-f0-9]+: b8 44 33 22 11 mov \$0x11223344,%eax
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[ ]*[a-f0-9]+: 41 b8 44 33 22 11 mov \$0x11223344,%r8d
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[ ]*[a-f0-9]+: 48 b8 88 77 66 55 44 33 22 11 mov \$0x1122334455667788,%rax
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[ ]*[a-f0-9]+: 49 b8 88 77 66 55 44 33 22 11 mov \$0x1122334455667788,%r8
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[ ]*[a-f0-9]+: 48 b8 88 77 66 55 44 33 22 11 movabs \$0x1122334455667788,%rax
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[ ]*[a-f0-9]+: 49 b8 88 77 66 55 44 33 22 11 movabs \$0x1122334455667788,%r8
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[ ]*[a-f0-9]+: 03 00 add \(%rax\),%eax
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[ ]*[a-f0-9]+: 41 03 00 add \(%r8\),%eax
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[ ]*[a-f0-9]+: 45 03 00 add \(%r8\),%r8d
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@ -92,12 +92,12 @@ Disassembly of section .text:
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[ ]*[a-f0-9]+: 83 80 22 22 22 22 33 addl \$0x33,0x22222222\(%rax\)
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[ ]*[a-f0-9]+: 41 83 04 e8 33 addl \$0x33,\(%r8,%rbp,8\)
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[ ]*[a-f0-9]+: 83 04 25 22 22 22 22 33 addl \$0x33,0x22222222
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[ ]*[a-f0-9]+: a0 11 22 33 44 55 66 77 88 mov 0x8877665544332211,%al
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[ ]*[a-f0-9]+: a1 11 22 33 44 55 66 77 88 mov 0x8877665544332211,%eax
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[ ]*[a-f0-9]+: a2 11 22 33 44 55 66 77 88 mov %al,0x8877665544332211
|
||||
[ ]*[a-f0-9]+: a3 11 22 33 44 55 66 77 88 mov %eax,0x8877665544332211
|
||||
[ ]*[a-f0-9]+: 48 a1 11 22 33 44 55 66 77 88 mov 0x8877665544332211,%rax
|
||||
[ ]*[a-f0-9]+: 48 a3 11 22 33 44 55 66 77 88 mov %rax,0x8877665544332211
|
||||
[ ]*[a-f0-9]+: a0 11 22 33 44 55 66 77 88 movabs 0x8877665544332211,%al
|
||||
[ ]*[a-f0-9]+: a1 11 22 33 44 55 66 77 88 movabs 0x8877665544332211,%eax
|
||||
[ ]*[a-f0-9]+: a2 11 22 33 44 55 66 77 88 movabs %al,0x8877665544332211
|
||||
[ ]*[a-f0-9]+: a3 11 22 33 44 55 66 77 88 movabs %eax,0x8877665544332211
|
||||
[ ]*[a-f0-9]+: 48 a1 11 22 33 44 55 66 77 88 movabs 0x8877665544332211,%rax
|
||||
[ ]*[a-f0-9]+: 48 a3 11 22 33 44 55 66 77 88 movabs %rax,0x8877665544332211
|
||||
[ ]*[a-f0-9]+: 48 99 cqto
|
||||
[ ]*[a-f0-9]+: 48 98 cltq
|
||||
[ ]*[a-f0-9]+: 48 63 c0 movslq %eax,%rax
|
||||
@ -109,7 +109,7 @@ Disassembly of section .text:
|
||||
[ ]*[a-f0-9]+: 66 b8 00 00 mov \$0x0,%ax
|
||||
[ ]*[a-f0-9]+: b8 00 00 00 00 mov \$0x0,%eax
|
||||
[ ]*[a-f0-9]+: 48 c7 c0 00 00 00 00 mov \$0x0,%rax
|
||||
[ ]*[a-f0-9]+: a1 00 00 00 00 00 00 00 00 mov 0x0,%eax
|
||||
[ ]*[a-f0-9]+: a1 00 00 00 00 00 00 00 00 movabs 0x0,%eax
|
||||
[ ]*[a-f0-9]+: 8b 04 25 00 00 00 00 mov 0x0,%eax
|
||||
[ ]*[a-f0-9]+: 8b 80 00 00 00 00 mov 0x0\(%rax\),%eax
|
||||
[ ]*[a-f0-9]+: 8b 05 00 00 00 00 mov 0x0\(%rip\),%eax # 1d5 <bar\+0x2e>
|
||||
@ -117,28 +117,28 @@ Disassembly of section .text:
|
||||
[ ]*[a-f0-9]+: 66 b8 00 00 mov \$0x0,%ax
|
||||
[ ]*[a-f0-9]+: b8 00 00 00 00 mov \$0x0,%eax
|
||||
[ ]*[a-f0-9]+: 48 c7 c0 00 00 00 00 mov \$0x0,%rax
|
||||
[ ]*[a-f0-9]+: a1 00 00 00 00 00 00 00 00 mov 0x0,%eax
|
||||
[ ]*[a-f0-9]+: a1 00 00 00 00 00 00 00 00 movabs 0x0,%eax
|
||||
[ ]*[a-f0-9]+: 8b 04 25 00 00 00 00 mov 0x0,%eax
|
||||
[ ]*[a-f0-9]+: 8b 80 00 00 00 00 mov 0x0\(%rax\),%eax
|
||||
[ ]*[a-f0-9]+: 8b 05 00 00 00 00 mov 0x0\(%rip\),%eax # 203 <foo>
|
||||
|
||||
0+203 <foo>:
|
||||
[ ]*[a-f0-9]+: a0 11 22 33 44 55 66 77 88 mov 0x8877665544332211,%al
|
||||
[ ]*[a-f0-9]+: 66 a1 11 22 33 44 55 66 77 88 mov 0x8877665544332211,%ax
|
||||
[ ]*[a-f0-9]+: a1 11 22 33 44 55 66 77 88 mov 0x8877665544332211,%eax
|
||||
[ ]*[a-f0-9]+: 48 a1 11 22 33 44 55 66 77 88 mov 0x8877665544332211,%rax
|
||||
[ ]*[a-f0-9]+: a2 11 22 33 44 55 66 77 88 mov %al,0x8877665544332211
|
||||
[ ]*[a-f0-9]+: 66 a3 11 22 33 44 55 66 77 88 mov %ax,0x8877665544332211
|
||||
[ ]*[a-f0-9]+: a3 11 22 33 44 55 66 77 88 mov %eax,0x8877665544332211
|
||||
[ ]*[a-f0-9]+: 48 a3 11 22 33 44 55 66 77 88 mov %rax,0x8877665544332211
|
||||
[ ]*[a-f0-9]+: a0 11 22 33 44 55 66 77 88 mov 0x8877665544332211,%al
|
||||
[ ]*[a-f0-9]+: 66 a1 11 22 33 44 55 66 77 88 mov 0x8877665544332211,%ax
|
||||
[ ]*[a-f0-9]+: a1 11 22 33 44 55 66 77 88 mov 0x8877665544332211,%eax
|
||||
[ ]*[a-f0-9]+: 48 a1 11 22 33 44 55 66 77 88 mov 0x8877665544332211,%rax
|
||||
[ ]*[a-f0-9]+: a2 11 22 33 44 55 66 77 88 mov %al,0x8877665544332211
|
||||
[ ]*[a-f0-9]+: 66 a3 11 22 33 44 55 66 77 88 mov %ax,0x8877665544332211
|
||||
[ ]*[a-f0-9]+: a3 11 22 33 44 55 66 77 88 mov %eax,0x8877665544332211
|
||||
[ ]*[a-f0-9]+: 48 a3 11 22 33 44 55 66 77 88 mov %rax,0x8877665544332211
|
||||
[ ]*[a-f0-9]+: a0 11 22 33 44 55 66 77 88 movabs 0x8877665544332211,%al
|
||||
[ ]*[a-f0-9]+: 66 a1 11 22 33 44 55 66 77 88 movabs 0x8877665544332211,%ax
|
||||
[ ]*[a-f0-9]+: a1 11 22 33 44 55 66 77 88 movabs 0x8877665544332211,%eax
|
||||
[ ]*[a-f0-9]+: 48 a1 11 22 33 44 55 66 77 88 movabs 0x8877665544332211,%rax
|
||||
[ ]*[a-f0-9]+: a2 11 22 33 44 55 66 77 88 movabs %al,0x8877665544332211
|
||||
[ ]*[a-f0-9]+: 66 a3 11 22 33 44 55 66 77 88 movabs %ax,0x8877665544332211
|
||||
[ ]*[a-f0-9]+: a3 11 22 33 44 55 66 77 88 movabs %eax,0x8877665544332211
|
||||
[ ]*[a-f0-9]+: 48 a3 11 22 33 44 55 66 77 88 movabs %rax,0x8877665544332211
|
||||
[ ]*[a-f0-9]+: a0 11 22 33 44 55 66 77 88 movabs 0x8877665544332211,%al
|
||||
[ ]*[a-f0-9]+: 66 a1 11 22 33 44 55 66 77 88 movabs 0x8877665544332211,%ax
|
||||
[ ]*[a-f0-9]+: a1 11 22 33 44 55 66 77 88 movabs 0x8877665544332211,%eax
|
||||
[ ]*[a-f0-9]+: 48 a1 11 22 33 44 55 66 77 88 movabs 0x8877665544332211,%rax
|
||||
[ ]*[a-f0-9]+: a2 11 22 33 44 55 66 77 88 movabs %al,0x8877665544332211
|
||||
[ ]*[a-f0-9]+: 66 a3 11 22 33 44 55 66 77 88 movabs %ax,0x8877665544332211
|
||||
[ ]*[a-f0-9]+: a3 11 22 33 44 55 66 77 88 movabs %eax,0x8877665544332211
|
||||
[ ]*[a-f0-9]+: 48 a3 11 22 33 44 55 66 77 88 movabs %rax,0x8877665544332211
|
||||
[ ]*[a-f0-9]+: 8a 04 25 11 22 33 ff mov 0xffffffffff332211,%al
|
||||
[ ]*[a-f0-9]+: 66 8b 04 25 11 22 33 ff mov 0xffffffffff332211,%ax
|
||||
[ ]*[a-f0-9]+: 8b 04 25 11 22 33 ff mov 0xffffffffff332211,%eax
|
||||
|
||||
@ -1,3 +1,11 @@
|
||||
2009-10-20 H.J. Lu <hongjiu.lu@intel.com>
|
||||
|
||||
PR gas/10775
|
||||
* i386-dis.c: Document LB, LS and LV macros.
|
||||
(dis386): Use mov%LB, mov%LS and mov%LV on mov instruction
|
||||
with the 64-bit displacement or immediate operand.
|
||||
(putop): Handle LB, LS and LV macros.
|
||||
|
||||
2009-10-18 Doug Evans <dje@sebabeach.org>
|
||||
|
||||
* lm32-opinst.c: Regenerate.
|
||||
|
||||
@ -1334,9 +1334,12 @@ struct dis386 {
|
||||
2 upper case letter macros:
|
||||
"XY" => print 'x' or 'y' if no register operands or suffix_always
|
||||
is true.
|
||||
'XW' => print 's', 'd' depending on the VEX.W bit (for FMA)
|
||||
'LQ' => print 'l' ('d' in Intel mode) or 'q' for memory operand
|
||||
"XW" => print 's', 'd' depending on the VEX.W bit (for FMA)
|
||||
"LQ" => print 'l' ('d' in Intel mode) or 'q' for memory operand
|
||||
or suffix_always is true
|
||||
"LB" => print "abs" in 64bit mode and behave as 'B' otherwise
|
||||
"LS" => print "abs" in 64bit mode and behave as 'S' otherwise
|
||||
"LV" => print "abs" for 64bit operand and behave as 'S' otherwise
|
||||
|
||||
Many of the above letters print nothing in Intel mode. See "putop"
|
||||
for the details.
|
||||
@ -1526,10 +1529,10 @@ static const struct dis386 dis386[] = {
|
||||
{ "sahf", { XX } },
|
||||
{ "lahf", { XX } },
|
||||
/* a0 */
|
||||
{ "movB", { AL, Ob } },
|
||||
{ "movS", { eAX, Ov } },
|
||||
{ "movB", { Ob, AL } },
|
||||
{ "movS", { Ov, eAX } },
|
||||
{ "mov%LB", { AL, Ob } },
|
||||
{ "mov%LS", { eAX, Ov } },
|
||||
{ "mov%LB", { Ob, AL } },
|
||||
{ "mov%LS", { Ov, eAX } },
|
||||
{ "movs{b|}", { Ybr, Xb } },
|
||||
{ "movs{R|}", { Yvr, Xv } },
|
||||
{ "cmps{b|}", { Xb, Yb } },
|
||||
@ -1553,14 +1556,14 @@ static const struct dis386 dis386[] = {
|
||||
{ "movB", { RMDH, Ib } },
|
||||
{ "movB", { RMBH, Ib } },
|
||||
/* b8 */
|
||||
{ "movS", { RMeAX, Iv64 } },
|
||||
{ "movS", { RMeCX, Iv64 } },
|
||||
{ "movS", { RMeDX, Iv64 } },
|
||||
{ "movS", { RMeBX, Iv64 } },
|
||||
{ "movS", { RMeSP, Iv64 } },
|
||||
{ "movS", { RMeBP, Iv64 } },
|
||||
{ "movS", { RMeSI, Iv64 } },
|
||||
{ "movS", { RMeDI, Iv64 } },
|
||||
{ "mov%LV", { RMeAX, Iv64 } },
|
||||
{ "mov%LV", { RMeCX, Iv64 } },
|
||||
{ "mov%LV", { RMeDX, Iv64 } },
|
||||
{ "mov%LV", { RMeBX, Iv64 } },
|
||||
{ "mov%LV", { RMeSP, Iv64 } },
|
||||
{ "mov%LV", { RMeBP, Iv64 } },
|
||||
{ "mov%LV", { RMeSI, Iv64 } },
|
||||
{ "mov%LV", { RMeDI, Iv64 } },
|
||||
/* c0 */
|
||||
{ REG_TABLE (REG_C0) },
|
||||
{ REG_TABLE (REG_C1) },
|
||||
@ -10267,10 +10270,34 @@ putop (const char *in_template, int sizeflag)
|
||||
*obufp++ = 'b';
|
||||
break;
|
||||
case 'B':
|
||||
if (intel_syntax)
|
||||
break;
|
||||
if (sizeflag & SUFFIX_ALWAYS)
|
||||
*obufp++ = 'b';
|
||||
if (l == 0 && len == 1)
|
||||
{
|
||||
case_B:
|
||||
if (intel_syntax)
|
||||
break;
|
||||
if (sizeflag & SUFFIX_ALWAYS)
|
||||
*obufp++ = 'b';
|
||||
}
|
||||
else
|
||||
{
|
||||
if (l != 1
|
||||
|| len != 2
|
||||
|| last[0] != 'L')
|
||||
{
|
||||
SAVE_LAST (*p);
|
||||
break;
|
||||
}
|
||||
|
||||
if (address_mode == mode_64bit
|
||||
&& !(prefixes & PREFIX_ADDR))
|
||||
{
|
||||
*obufp++ = 'a';
|
||||
*obufp++ = 'b';
|
||||
*obufp++ = 's';
|
||||
}
|
||||
|
||||
goto case_B;
|
||||
}
|
||||
break;
|
||||
case 'C':
|
||||
if (intel_syntax && !alt)
|
||||
@ -10506,31 +10533,76 @@ case_Q:
|
||||
used_prefixes |= (prefixes & PREFIX_DATA);
|
||||
break;
|
||||
case 'V':
|
||||
if (intel_syntax)
|
||||
break;
|
||||
if (address_mode == mode_64bit && (sizeflag & DFLAG))
|
||||
if (l == 0 && len == 1)
|
||||
{
|
||||
if (sizeflag & SUFFIX_ALWAYS)
|
||||
*obufp++ = 'q';
|
||||
break;
|
||||
if (intel_syntax)
|
||||
break;
|
||||
if (address_mode == mode_64bit && (sizeflag & DFLAG))
|
||||
{
|
||||
if (sizeflag & SUFFIX_ALWAYS)
|
||||
*obufp++ = 'q';
|
||||
break;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
if (l != 1
|
||||
|| len != 2
|
||||
|| last[0] != 'L')
|
||||
{
|
||||
SAVE_LAST (*p);
|
||||
break;
|
||||
}
|
||||
|
||||
if (rex & REX_W)
|
||||
{
|
||||
*obufp++ = 'a';
|
||||
*obufp++ = 'b';
|
||||
*obufp++ = 's';
|
||||
}
|
||||
}
|
||||
/* Fall through. */
|
||||
goto case_S;
|
||||
case 'S':
|
||||
if (intel_syntax)
|
||||
break;
|
||||
if (sizeflag & SUFFIX_ALWAYS)
|
||||
if (l == 0 && len == 1)
|
||||
{
|
||||
if (rex & REX_W)
|
||||
*obufp++ = 'q';
|
||||
else
|
||||
case_S:
|
||||
if (intel_syntax)
|
||||
break;
|
||||
if (sizeflag & SUFFIX_ALWAYS)
|
||||
{
|
||||
if (sizeflag & DFLAG)
|
||||
*obufp++ = 'l';
|
||||
if (rex & REX_W)
|
||||
*obufp++ = 'q';
|
||||
else
|
||||
*obufp++ = 'w';
|
||||
used_prefixes |= (prefixes & PREFIX_DATA);
|
||||
{
|
||||
if (sizeflag & DFLAG)
|
||||
*obufp++ = 'l';
|
||||
else
|
||||
*obufp++ = 'w';
|
||||
used_prefixes |= (prefixes & PREFIX_DATA);
|
||||
}
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
if (l != 1
|
||||
|| len != 2
|
||||
|| last[0] != 'L')
|
||||
{
|
||||
SAVE_LAST (*p);
|
||||
break;
|
||||
}
|
||||
|
||||
if (address_mode == mode_64bit
|
||||
&& !(prefixes & PREFIX_ADDR))
|
||||
{
|
||||
*obufp++ = 'a';
|
||||
*obufp++ = 'b';
|
||||
*obufp++ = 's';
|
||||
}
|
||||
|
||||
goto case_S;
|
||||
}
|
||||
break;
|
||||
case 'X':
|
||||
if (l != 0 || len != 1)
|
||||
|
||||
Loading…
Reference in New Issue
Block a user