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gencode.c: Kill, Kill, Kill....
Remove last remenats of old gencode simulator.
This commit is contained in:
Andrew Cagney
parent
57791952b6
commit
554eb429e4
@ -1,74 +0,0 @@
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This directory contains two very different simulators:
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o gencode (old)
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Gencode.c outputs a single monolithic file that is
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#included by interp.c
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o igen (new)
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The *.igen files are used as inputs to ../igen/igen.
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A number of separate, fairly modula files, are created.
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The new simulator has a number of advantages:
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o builtin support for multi-simming (single simulator
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image supporting a number of different instruction
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set architectures).
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o Easier maintenance. The input files are not confused
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by an intermixing with the generator code.
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gencode continues to exist so that old architectures can be emulated.
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*.igen should be used when adding new architectures or adding
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instructions to an existing ISA.
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Known bugs?
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In mips.igen, the semantics for many of the instructions were created
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using code generated by gencode. Those semantic segments could be
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greatly simplified.
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----
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Old README.Cygnus ...
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> README.Cygnus
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-------------------------------------------------------------------------------
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The following are the main reasons for constructing the simulator as a
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generator:
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1) Avoid large fixed decode source file, with lots of #ifs controlling
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the compilation. i.e. keep the source cleaner, smaller and easier
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to parse.
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2) Allow optimum code to be created, without run-time checks on
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instruction types. Ensure that the simulator engine only includes
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code for the architecture being targetted. e.g. This avoids
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run-time checks on ISA conformance, aswell as increasing
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throughput.
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3) Allow updates to the instruction sets to be added quickly. Having a
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table means that the information is together, and is easier to
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manipulate. Having the table generate the engine, rather than the
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run-time parse the table gives higher performance at simulation
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time.
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4) Keep all the similar simulation code together. i.e. have a single
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place where, for example, the addition code is held. This ensures that
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updates to the simulation are not spread over a large flat source
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file maintained by the developer.
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-------------------------------------------------------------------------------
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To keep the simulator simple (and to avoid the slight chance of
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mis-matched files) the manifests describing an engine, and the
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simulator engine itself, are held in the same source file.
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This means that the engine must be included twice, with the first pass
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controlled by the SIM_MANIFESTS definition.
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-------------------------------------------------------------------------------
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> EOF README.Cygnus
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@ -11,25 +11,6 @@ SIM_AC_OPTION_ALIGNMENT(NONSTRICT_ALIGNMENT)
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SIM_AC_OPTION_HOSTENDIAN
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SIM_AC_OPTION_WARNINGS
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# Ensure a reasonable default simulator is constructed: (DEPRECATED)
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case "${target}" in
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# start-sanitize-tx19
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mips*tx19*) SIMCONF="-mips1 -mcpu=r1900 -mno-fp --warnings";;
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# end-sanitize-tx19
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# start-sanitize-tx49
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mips*tx49*) SIMCONF="-mips3 --warnings -mcpu=r4900";;
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# end-sanitize-tx49
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# start-sanitize-r5900
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mips64r59*-*-*) SIMCONF="-mips3 --warnings -mcpu=r5900";;
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# end-sanitize-r5900
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mips64vr41*) SIMCOMF="-mips0 -mcpu=r4100 -mgp64 --warnings" ;;
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mips64*-*-*) SIMCONF="-mips0 --warnings";;
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mips16*-*-*) SIMCONF="-mips0 --warnings";;
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mips*-*-*) SIMCONF="-mips2 --warnings";;
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*) SIMCONF="-mips0 --warnings";;
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esac
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AC_SUBST(SIMCONF)
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# DEPRECATED
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#
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# Instead of defining a `subtarget' macro, code should be checking
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@ -135,107 +116,78 @@ SIM_AC_OPTION_SMP($mips_smp)
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#
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# Select the IGEN architecture
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#
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sim_use_gen=IGEN
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sim_gen=IGEN
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sim_igen_machine="-M mipsIV"
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sim_m16_machine="-M mips16"
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sim_igen_filter="32,64,f"
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sim_m16_filter="16"
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case "${target}" in
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# start-sanitize-tx19
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mips*tx19*) sim_default_gen=M16
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sim_use_gen=M16
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mips*tx19*) sim_gen=M16
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sim_igen_machine="-M tx19"
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sim_m16_machine="-M tx19"
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sim_igen_filter="32"
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sim_m16_filter="16"
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;;
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# end-sanitize-tx19
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mips*tx39*) sim_default_gen=IGEN
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sim_use_gen=IGEN
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mips*tx39*) sim_gen=IGEN
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sim_igen_filter="32,f"
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sim_igen_machine="-M r3900"
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;;
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# start-sanitize-r5900
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mips64r59*-*-*) sim_default_gen=IGEN
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sim_use_gen=IGEN
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mips64r59*-*-*) sim_gen=IGEN
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sim_igen_machine="-M r5900"
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;;
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# end-sanitize-r5900
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# start-sanitize-vr4320
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mips64vr4320-*-*) sim_default_gen=IGEN
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sim_use_gen=IGEN
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mips64vr4320-*-*) sim_gen=IGEN
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sim_igen_machine="-M mipsIV,vr4320 -G gen-multi-sim=vr4320"
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;;
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# end-sanitize-vr4320
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mips64vr43*-*-*) sim_default_gen=IGEN
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sim_use_gen=IGEN
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mips64vr43*-*-*) sim_gen=IGEN
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sim_igen_machine="-M mipsIV"
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# start-sanitize-vr4320
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sim_igen_machine="-M mipsIV,vr4320 -G gen-multi-sim=mipsIV"
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# end-sanitize-vr4320
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;;
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# start-sanitize-cygnus
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mips64vr54*-*-*) sim_default_gen=IGEN
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sim_use_gen=IGEN
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mips64vr54*-*-*) sim_gen=IGEN
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sim_igen_machine="-M vr5000,vr5400 -G gen-multi-sim=vr5400"
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;;
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# end-sanitize-cygnus
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mips64vr5*-*-*) sim_default_gen=IGEN
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sim_use_gen=IGEN
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mips64vr5*-*-*) sim_gen=IGEN
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sim_igen_machine="-M vr5000"
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# start-sanitize-cygnus
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sim_igen_machine="-M vr5000,vr5400 -G gen-multi-sim=vr5000"
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;;
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# end-sanitize-cygnus
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mips64vr41*) sim_default_gen=M16
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sim_use_gen=M16
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mips64vr41*) sim_gen=M16
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sim_igen_machine="-M vr4100,mips16"
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sim_m16_machine="-M vr4100,mips16"
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sim_igen_filter="32,64,f"
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sim_m16_filter="16"
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;;
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mips64*-*-*) sim_default_gen=IGEN
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sim_igen_filter="32,64,f"
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sim_use_gen=IGEN
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mips64*-*-*) sim_igen_filter="32,64,f"
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sim_gen=IGEN
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;;
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mips16*-*-*) sim_default_gen=M16
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mips16*-*-*) sim_gen=M16
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sim_igen_filter="32,64,f"
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sim_m16_filter="16"
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sim_use_gen=NO
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;;
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mips*lsi*) sim_default_gen=M16
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sim_use_gen=M16
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mips*lsi*) sim_gen=M16
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sim_igen_machine="-M mipsIII,mips16"
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sim_m16_machine="-M mips16,mipsIII"
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sim_igen_filter="32,f"
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sim_m16_filter="16"
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;;
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mips*-*-*) sim_default_gen=IGEN
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mips*-*-*) sim_gen=IGEN
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sim_igen_filter="32,f"
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sim_use_gen=IGEN
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;;
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esac
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sim_igen_flags="-F ${sim_igen_filter} ${sim_igen_machine} ${sim_igen_smp}"
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sim_m16_flags=" -F ${sim_m16_filter} ${sim_m16_machine} ${sim_igen_smp}"
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AC_SUBST(sim_igen_flags)
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AC_SUBST(sim_m16_flags)
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#
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# Enable igen
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#
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AC_ARG_ENABLE(sim-igen,
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[ --enable-sim-igen=opts Enable IGEN simulator],
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[case "${enableval}" in
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yes) sim_gen="${sim_default_gen}";;
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no) sim_gen=NO;;
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16) sim_gen=M16;;
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*) AC_MSG_ERROR("Unknown value $enableval passed to --enable-sim-igen"); sim_gen="";;
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esac
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if test x"$silent" != x"yes" && test x"$sim_gen" != x""; then
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echo "Setting sim_gen = $sim_gen" 6>&1
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fi],[sim_gen="${sim_use_gen}"])dnl
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AC_SUBST(sim_gen)
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4858
sim/mips/gencode.c
4858
sim/mips/gencode.c
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