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opcodes/

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* ppc-opc.c <RSQ, RTQ>: Use PPC_OPERAND_GPR.

gas/testsuite/
	* gas/ppc/power4.s <lq, stq>: Add more tests.
	* gas/ppc/power4.d: Likewise.
This commit is contained in:
Peter Bergner 2012-08-15 21:25:21 +00:00
parent 9f6a6cc022
commit 588925d065
5 changed files with 26 additions and 4 deletions
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5
gas/testsuite/ChangeLog
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@ -1,3 +1,8 @@
2012-08-15 Peter Bergner <bergner@vnet.ibm.com>
* gas/ppc/power4.s <lq, stq>: Add more tests.
* gas/ppc/power4.d: Likewise.
2012-08-15 Peter Bergner <bergner@vnet.ibm.com>
* gas/ppc/common.d ("nop", "xnop"): Add tests.

8
gas/testsuite/gas/ppc/power4.d
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@ -10,7 +10,7 @@ start address 0x0+
Sections:
Idx Name +Size +VMA +LMA +File off +Algn
+0 \.text +0+c4 +0+ +0+ +.*
+0 \.text +0+dc +0+ +0+ +.*
+CONTENTS, ALLOC, LOAD, RELOC, READONLY, CODE
+1 \.data +0+10 +0+ +0+ +.*
+CONTENTS, ALLOC, LOAD, DATA
@ -102,3 +102,9 @@ Disassembly of section \.text:
+b8: 7c 01 17 ec dcbz r1,r2
+bc: 7c 23 27 ec dcbzl r3,r4
+c0: 7c 05 37 ec dcbz r5,r6
+c4: e0 40 00 10 lq r2,16\(0\)
+c8: e0 05 00 10 lq r0,16\(r5\)
+cc: e0 45 00 10 lq r2,16\(r5\)
+d0: f8 40 00 12 stq r2,16\(0\)
+d4: f8 05 00 12 stq r0,16\(r5\)
+d8: f8 45 00 12 stq r2,16\(r5\)

7
gas/testsuite/gas/ppc/power4.s
View File

@ -72,6 +72,13 @@ dsym1:
dcbzl 3, 4
dcbz 5, 6
lq 2,16(0)
lq 0,16(5)
lq 2,16(5)
stq 2,16(0)
stq 0,16(5)
stq 2,16(5)
.section ".data"
usym0: .llong 0xcafebabe
usym1:

4
opcodes/ChangeLog
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@ -1,3 +1,7 @@
2012-08-15 Peter Bergner <bergner@vnet.ibm.com>
* ppc-opc.c <RSQ, RTQ>: Use PPC_OPERAND_GPR.
2012-08-15 Peter Bergner <bergner@vnet.ibm.com>
* ppc-opc.c <xnop, yield, mdoio, mdoom>: New extended mnemonics.

6
opcodes/ppc-opc.c
View File

@ -512,11 +512,11 @@ const struct powerpc_operand powerpc_operands[] =
#define RD RS
{ 0x1f, 21, NULL, NULL, PPC_OPERAND_GPR },
/* The RS and RT fields of the DS form stq instruction, which have
special value restrictions. */
/* The RS and RT fields of the DS form stq and DQ form lq instructions,
which have special value restrictions. */
#define RSQ RS + 1
#define RTQ RSQ
{ 0x1e, 21, NULL, NULL, PPC_OPERAND_GPR_0 },
{ 0x1e, 21, NULL, NULL, PPC_OPERAND_GPR },
/* The RS field of the tlbwe instruction, which is optional. */
#define RSO RSQ + 1