bfd:

* elf-bfd.h (LEAST_KNOWN_OBJ_ATTRIBUTE): Decrease to 2.
	* elf32-tic6x.c (elf32_tic6x_obj_attrs_arg_type,
	elf32_tic6x_merge_arch_attributes, elf32_tic6x_merge_attributes,
	elf32_tic6x_merge_private_bfd_data): New.
	(bfd_elf32_bfd_merge_private_bfd_data,
	elf_backend_obj_attrs_arg_type, elf_backend_obj_attrs_section,
	elf_backend_obj_attrs_section_type, elf_backend_obj_attrs_vendor):
	Define.
	* elf32-tic6x.h (elf32_tic6x_merge_arch_attributes): Declare.

binutils:
	* readelf.c (display_tic6x_attribute, process_tic6x_specific):
	New.
	(process_arch_specific): Call process_tic6x_specific for
	EM_TI_C6000.

gas:
	* config/tc-tic6x.c: Include elf/tic6x.h.
	(tic6x_arch_attribute, tic6x_seen_insns): New.
	(tic6x_arch_table, tic6x_arches): Add attribute values.
	(tic6x_use_arch): Handle attribute settings.
	(tic6x_attributes_set_explicitly, s_tic6x_c6xabi_attribute,
	tic6x_attribute_table, tic6x_attributes,
	tic6x_convert_symbolic_attribute): New.
	(md_pseudo_table): Add c6xabi_attribute.
	(md_assemble): Set tic6x_seen_insns and tic6x_arch_attribute.
	(tic6x_set_attribute_int, tic6x_set_attributes): New.
	(tic6x_end): Call tic6x_set_attributes.
	* config/tc-tic6x.h (CONVERT_SYMBOLIC_ATTRIBUTE): Define.
	(tic6x_convert_symbolic_attribute): Declare.

gas/testsuite:
	* gas/elf/elf.exp: Set target_machine for tic6x-*-*.
	* gas/elf/section2.e-tic6x, gas/tic6x/attr-arch-directive-1.d,
	gas/tic6x/attr-arch-directive-1.s,
	gas/tic6x/attr-arch-directive-2.d,
	gas/tic6x/attr-arch-directive-2.s,
	gas/tic6x/attr-arch-directive-3.d,
	gas/tic6x/attr-arch-directive-3.s,
	gas/tic6x/attr-arch-directive-4.d,
	gas/tic6x/attr-arch-directive-4.s,
	gas/tic6x/attr-arch-directive-5.d,
	gas/tic6x/attr-arch-directive-5.s,
	gas/tic6x/attr-arch-opts-c62x.d, gas/tic6x/attr-arch-opts-c64x+.d,
	gas/tic6x/attr-arch-opts-c64x.d, gas/tic6x/attr-arch-opts-c674x.d,
	gas/tic6x/attr-arch-opts-c67x+.d, gas/tic6x/attr-arch-opts-c67x.d,
	gas/tic6x/attr-arch-opts-none-1.d,
	gas/tic6x/attr-arch-opts-none-2.d,
	gas/tic6x/attr-arch-opts-override-1.d,
	gas/tic6x/attr-arch-opts-override-2.d, gas/tic6x/empty.s: New.

include/elf:
	* tic6x-attrs.h: New.
	* tic6x.h: Include elf/tic6x-attrs.h for attribute table.
	(C6XABI_Tag_CPU_arch_none, C6XABI_Tag_CPU_arch_C62X,
	C6XABI_Tag_CPU_arch_C67X, C6XABI_Tag_CPU_arch_C67XP,
	C6XABI_Tag_CPU_arch_C64X, C6XABI_Tag_CPU_arch_C64XP,
	C6XABI_Tag_CPU_arch_C674X): Define.

ld:
	* emulparams/elf32_tic6x_le.sh (ATTRS_SECTIONS): Define.

ld/testsuite:
	* ld-elf/orphan3.d: Allow section names starting '_'.
	* ld-tic6x/attr-arch-c62x-c62x.d, ld-tic6x/attr-arch-c62x-c64x+.d,
	ld-tic6x/attr-arch-c62x-c64x.d, ld-tic6x/attr-arch-c62x-c674x.d,
	ld-tic6x/attr-arch-c62x-c67x+.d, ld-tic6x/attr-arch-c62x-c67x.d,
	ld-tic6x/attr-arch-c62x.s, ld-tic6x/attr-arch-c64x+-c62x.d,
	ld-tic6x/attr-arch-c64x+-c64x+.d, ld-tic6x/attr-arch-c64x+-c64x.d,
	ld-tic6x/attr-arch-c64x+-c674x.d,
	ld-tic6x/attr-arch-c64x+-c67x+.d, ld-tic6x/attr-arch-c64x+-c67x.d,
	ld-tic6x/attr-arch-c64x+.s, ld-tic6x/attr-arch-c64x-c62x.d,
	ld-tic6x/attr-arch-c64x-c64x+.d, ld-tic6x/attr-arch-c64x-c64x.d,
	ld-tic6x/attr-arch-c64x-c674x.d, ld-tic6x/attr-arch-c64x-c67x+.d,
	ld-tic6x/attr-arch-c64x-c67x.d, ld-tic6x/attr-arch-c64x.s,
	ld-tic6x/attr-arch-c674x-c62x.d, ld-tic6x/attr-arch-c674x-c64x+.d,
	ld-tic6x/attr-arch-c674x-c64x.d, ld-tic6x/attr-arch-c674x-c674x.d,
	ld-tic6x/attr-arch-c674x-c67x+.d, ld-tic6x/attr-arch-c674x-c67x.d,
	ld-tic6x/attr-arch-c674x.s, ld-tic6x/attr-arch-c67x+-c62x.d,
	ld-tic6x/attr-arch-c67x+-c64x+.d, ld-tic6x/attr-arch-c67x+-c64x.d,
	ld-tic6x/attr-arch-c67x+-c674x.d,
	ld-tic6x/attr-arch-c67x+-c67x+.d, ld-tic6x/attr-arch-c67x+-c67x.d,
	ld-tic6x/attr-arch-c67x+.s, ld-tic6x/attr-arch-c67x-c62x.d,
	ld-tic6x/attr-arch-c67x-c64x+.d, ld-tic6x/attr-arch-c67x-c64x.d,
	ld-tic6x/attr-arch-c67x-c674x.d, ld-tic6x/attr-arch-c67x-c67x+.d,
	ld-tic6x/attr-arch-c67x-c67x.d, ld-tic6x/attr-arch-c67x.s: New.

bfd/ChangeLog

@@ -1,3 +1,15 @@
+2010-06-15  Joseph Myers  <joseph@codesourcery.com>
+
+	* elf-bfd.h (LEAST_KNOWN_OBJ_ATTRIBUTE): Decrease to 2.
+	* elf32-tic6x.c (elf32_tic6x_obj_attrs_arg_type,
+	elf32_tic6x_merge_arch_attributes, elf32_tic6x_merge_attributes,
+	elf32_tic6x_merge_private_bfd_data): New.
+	(bfd_elf32_bfd_merge_private_bfd_data,
+	elf_backend_obj_attrs_arg_type, elf_backend_obj_attrs_section,
+	elf_backend_obj_attrs_section_type, elf_backend_obj_attrs_vendor):
+	Define.
+	* elf32-tic6x.h (elf32_tic6x_merge_arch_attributes): Declare.
+
 2010-06-15  Joseph Myers  <joseph@codesourcery.com>
 
 	* elf-bfd.h (LEAST_KNOWN_OBJ_ATTRIBUTE): Define.

bfd/elf-bfd.h

@@ -1417,7 +1417,7 @@ struct bfd_elf_section_data
    for any target.  Some code assumes that the value 0 is not used and
    the field for that attribute can instead be used as a marker to
    indicate that attributes have been initialized.  */
-#define LEAST_KNOWN_OBJ_ATTRIBUTE 4
+#define LEAST_KNOWN_OBJ_ATTRIBUTE 2
 
 /* The maximum number of known object attributes for any target.  */
 #define NUM_KNOWN_OBJ_ATTRIBUTES 71

bfd/elf32-tic6x.c

@@ -1664,6 +1664,89 @@ elf32_tic6x_relocate_section (bfd *output_bfd,
   return ok;
 }
 
+static int
+elf32_tic6x_obj_attrs_arg_type (int tag)
+{
+  if (tag == Tag_compatibility)
+    return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_STR_VAL;
+  else
+    /* Correct for known attributes, arbitrary for others.  */
+    return ATTR_TYPE_FLAG_INT_VAL;
+}
+
+/* Merge the Tag_C6XABI_Tag_CPU_arch attribute values ARCH1 and ARCH2
+   and return the merged value.  At present, all merges succeed, so no
+   return value for errors is defined.  */
+
+int
+elf32_tic6x_merge_arch_attributes (int arch1, int arch2)
+{
+  int min_arch, max_arch;
+
+  min_arch = (arch1 < arch2 ? arch1 : arch2);
+  max_arch = (arch1 > arch2 ? arch1 : arch2);
+
+  /* In most cases, the numerically greatest value is the correct
+     merged value, but merging C64 and C67 results in C674X.  */
+  if ((min_arch == C6XABI_Tag_CPU_arch_C67X
+       || min_arch == C6XABI_Tag_CPU_arch_C67XP)
+      && (max_arch == C6XABI_Tag_CPU_arch_C64X
+	  || max_arch == C6XABI_Tag_CPU_arch_C64XP))
+    return C6XABI_Tag_CPU_arch_C674X;
+
+  return max_arch;
+}
+
+/* Merge attributes from IBFD and OBFD, returning TRUE if the merge
+   succeeded, FALSE otherwise.  */
+
+static bfd_boolean
+elf32_tic6x_merge_attributes (bfd *ibfd, bfd *obfd)
+{
+  obj_attribute *in_attr;
+  obj_attribute *out_attr;
+
+  if (!elf_known_obj_attributes_proc (obfd)[0].i)
+    {
+      /* This is the first object.  Copy the attributes.  */
+      _bfd_elf_copy_obj_attributes (ibfd, obfd);
+
+      out_attr = elf_known_obj_attributes_proc (obfd);
+
+      /* Use the Tag_null value to indicate the attributes have been
+	 initialized.  */
+      out_attr[0].i = 1;
+
+      return TRUE;
+    }
+
+  in_attr = elf_known_obj_attributes_proc (ibfd);
+  out_attr = elf_known_obj_attributes_proc (obfd);
+
+  /* No specification yet for handling of unknown attributes, so just
+     ignore them and handle known ones.  */
+  out_attr[Tag_C6XABI_Tag_CPU_arch].i
+    = elf32_tic6x_merge_arch_attributes (in_attr[Tag_C6XABI_Tag_CPU_arch].i,
+					 out_attr[Tag_C6XABI_Tag_CPU_arch].i);
+
+  /* Merge Tag_compatibility attributes and any common GNU ones.  */
+  _bfd_elf_merge_object_attributes (ibfd, obfd);
+
+  return TRUE;
+}
+
+static bfd_boolean
+elf32_tic6x_merge_private_bfd_data (bfd *ibfd, bfd *obfd)
+{
+  if (!_bfd_generic_verify_endian_match (ibfd, obfd))
+    return FALSE;
+
+  if (!elf32_tic6x_merge_attributes (ibfd, obfd))
+    return FALSE;
+
+  return TRUE;
+}
+
 
 #define TARGET_LITTLE_SYM	bfd_elf32_tic6x_le_vec
 #define TARGET_LITTLE_NAME	"elf32-tic6x-le"
@@ -1674,12 +1757,17 @@ elf32_tic6x_relocate_section (bfd *output_bfd,
 #define ELF_MAXPAGESIZE		1
 #define bfd_elf32_bfd_reloc_type_lookup elf32_tic6x_reloc_type_lookup
 #define bfd_elf32_bfd_reloc_name_lookup elf32_tic6x_reloc_name_lookup
+#define bfd_elf32_bfd_merge_private_bfd_data	elf32_tic6x_merge_private_bfd_data
 #define bfd_elf32_mkobject		elf32_tic6x_mkobject
 #define bfd_elf32_new_section_hook	elf32_tic6x_new_section_hook
 #define elf_backend_can_gc_sections	1
 #define elf_backend_default_use_rela_p	1
 #define elf_backend_may_use_rel_p	1
 #define elf_backend_may_use_rela_p	1
+#define elf_backend_obj_attrs_arg_type	elf32_tic6x_obj_attrs_arg_type
+#define elf_backend_obj_attrs_section	"__TI_build_attributes"
+#define elf_backend_obj_attrs_section_type	SHT_C6000_ATTRIBUTES
+#define elf_backend_obj_attrs_vendor	"c6xabi"
 #define elf_backend_rela_normal		1
 #define elf_backend_relocate_section	elf32_tic6x_relocate_section
 #define elf_info_to_howto		elf32_tic6x_info_to_howto

bfd/elf32-tic6x.h

@@ -19,6 +19,8 @@
    Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
    MA 02110-1301, USA.  */
 
+extern int elf32_tic6x_merge_arch_attributes (int, int);
+
 /* This function is provided for use from the assembler.  */
 
 extern void elf32_tic6x_set_use_rela_p (bfd *, bfd_boolean);

binutils/ChangeLog

@@ -1,3 +1,10 @@
+2010-06-15  Joseph Myers  <joseph@codesourcery.com>
+
+	* readelf.c (display_tic6x_attribute, process_tic6x_specific):
+	New.
+	(process_arch_specific): Call process_tic6x_specific for
+	EM_TI_C6000.
+
 2010-06-11  H.J. Lu  <hongjiu.lu@intel.com>
 
 	* readelf.c (dump_ia64_vms_dynamic_fixups): Cast to unsigned long

binutils/readelf.c

@@ -10641,6 +10641,73 @@ display_mips_gnu_attribute (unsigned char * p, int tag)
   return p;
 }
 
+static unsigned char *
+display_tic6x_attribute (unsigned char * p)
+{
+  int tag;
+  unsigned int len;
+  int val;
+
+  tag = read_uleb128 (p, &len);
+  p += len;
+
+  switch (tag)
+    {
+    case Tag_C6XABI_Tag_CPU_arch:
+      val = read_uleb128 (p, &len);
+      p += len;
+      printf ("  Tag_C6XABI_Tag_CPU_arch: ");
+
+      switch (val)
+	{
+	case C6XABI_Tag_CPU_arch_none:
+	  printf (_("None\n"));
+	  break;
+	case C6XABI_Tag_CPU_arch_C62X:
+	  printf ("C62x\n");
+	  break;
+	case C6XABI_Tag_CPU_arch_C67X:
+	  printf ("C67x\n");
+	  break;
+	case C6XABI_Tag_CPU_arch_C67XP:
+	  printf ("C67x+\n");
+	  break;
+	case C6XABI_Tag_CPU_arch_C64X:
+	  printf ("C64x\n");
+	  break;
+	case C6XABI_Tag_CPU_arch_C64XP:
+	  printf ("C64x+\n");
+	  break;
+	case C6XABI_Tag_CPU_arch_C674X:
+	  printf ("C674x\n");
+	  break;
+	default:
+	  printf ("??? (%d)\n", val);
+	  break;
+	}
+      return p;
+
+    case 32:
+      /* Tag_compatibility - treated as generic by binutils for now
+	 although not currently specified for C6X.  */
+      val = read_uleb128 (p, &len);
+      p += len;
+      printf (_("flag = %d, vendor = %s\n"), val, p);
+      p += strlen ((char *) p) + 1;
+      return p;
+    }
+
+  printf ("  Tag_unknown_%d: ", tag);
+
+  /* No general documentation of handling unknown attributes, treat as
+     ULEB128 for now.  */
+  val = read_uleb128 (p, &len);
+  p += len;
+  printf ("%d (0x%x)\n", val, val);
+
+  return p;
+}
+
 static int
 process_attributes (FILE * file,
 		    const char * public_name,
@@ -10797,6 +10864,13 @@ process_power_specific (FILE * file)
 			     display_power_gnu_attribute);
 }
 
+static int
+process_tic6x_specific (FILE * file)
+{
+  return process_attributes (file, "c6xabi", SHT_C6000_ATTRIBUTES,
+			     display_tic6x_attribute, NULL);
+}
+
 /* DATA points to the contents of a MIPS GOT that starts at VMA PLTGOT.
    Print the Address, Access and Initial fields of an entry at VMA ADDR
    and return the VMA of the next entry.  */
@@ -11867,6 +11941,9 @@ process_arch_specific (FILE * file)
     case EM_PPC:
       return process_power_specific (file);
       break;
+    case EM_TI_C6000:
+      return process_tic6x_specific (file);
+      break;
     default:
       break;
     }

gas/ChangeLog

@@ -1,3 +1,19 @@
+2010-06-15  Joseph Myers  <joseph@codesourcery.com>
+
+	* config/tc-tic6x.c: Include elf/tic6x.h.
+	(tic6x_arch_attribute, tic6x_seen_insns): New.
+	(tic6x_arch_table, tic6x_arches): Add attribute values.
+	(tic6x_use_arch): Handle attribute settings.
+	(tic6x_attributes_set_explicitly, s_tic6x_c6xabi_attribute,
+	tic6x_attribute_table, tic6x_attributes,
+	tic6x_convert_symbolic_attribute): New.
+	(md_pseudo_table): Add c6xabi_attribute.
+	(md_assemble): Set tic6x_seen_insns and tic6x_arch_attribute.
+	(tic6x_set_attribute_int, tic6x_set_attributes): New.
+	(tic6x_end): Call tic6x_set_attributes.
+	* config/tc-tic6x.h (CONVERT_SYMBOLIC_ATTRIBUTE): Define.
+	(tic6x_convert_symbolic_attribute): Declare.
+
 2010-06-14  Alan Modra  <amodra@gmail.com>
 
 	* config/tc-ppc.c (md_assemble): Emit APUinfo section for

gas/config/tc-tic6x.c

@@ -24,6 +24,7 @@
 #include "safe-ctype.h"
 #include "subsegs.h"
 #include "opcode/tic6x.h"
+#include "elf/tic6x.h"
 #include "elf32-tic6x.h"
 
 /* Truncate and sign-extend at 32 bits, so that building on a 64-bit
@@ -81,6 +82,15 @@ static unsigned short tic6x_arch_enable = (TIC6X_INSN_C62X
    (architecture, as modified by other options).  */
 static unsigned short tic6x_features;
 
+/* The architecture attribute value, or C6XABI_Tag_CPU_arch_none if
+   not yet set.  */
+static int tic6x_arch_attribute = C6XABI_Tag_CPU_arch_none;
+
+/* Whether any instructions at all have been seen.  Once any
+   instructions have been seen, architecture attributes merge into the
+   previous attribute value rather than replacing it.  */
+static bfd_boolean tic6x_seen_insns = FALSE;
+
 /* The number of registers in each register file supported by the
    current architecture.  */
 static unsigned int tic6x_num_registers;
@@ -105,21 +115,26 @@ static bfd_boolean tic6x_generate_rela = TRUE;
 typedef struct
 {
   const char *arch;
+  int attr;
   unsigned short features;
 } tic6x_arch_table;
 static const tic6x_arch_table tic6x_arches[] =
   {
-    { "c62x", TIC6X_INSN_C62X },
-    { "c64x", TIC6X_INSN_C62X | TIC6X_INSN_C64X },
-    { "c64x+", TIC6X_INSN_C62X | TIC6X_INSN_C64X | TIC6X_INSN_C64XP },
-    { "c67x", TIC6X_INSN_C62X | TIC6X_INSN_C67X },
-    { "c67x+", TIC6X_INSN_C62X | TIC6X_INSN_C67X | TIC6X_INSN_C67XP },
-    { "c674x", (TIC6X_INSN_C62X
-		| TIC6X_INSN_C64X
-		| TIC6X_INSN_C64XP
-		| TIC6X_INSN_C67X
-		| TIC6X_INSN_C67XP
-		| TIC6X_INSN_C674X) }
+    { "c62x", C6XABI_Tag_CPU_arch_C62X, TIC6X_INSN_C62X },
+    { "c64x", C6XABI_Tag_CPU_arch_C64X, TIC6X_INSN_C62X | TIC6X_INSN_C64X },
+    { "c64x+", C6XABI_Tag_CPU_arch_C64XP, (TIC6X_INSN_C62X
+					   | TIC6X_INSN_C64X
+					   | TIC6X_INSN_C64XP) },
+    { "c67x", C6XABI_Tag_CPU_arch_C67X, TIC6X_INSN_C62X | TIC6X_INSN_C67X },
+    { "c67x+", C6XABI_Tag_CPU_arch_C67XP, (TIC6X_INSN_C62X
+					   | TIC6X_INSN_C67X
+					   | TIC6X_INSN_C67XP) },
+    { "c674x", C6XABI_Tag_CPU_arch_C674X, (TIC6X_INSN_C62X
+					   | TIC6X_INSN_C64X
+					   | TIC6X_INSN_C64XP
+					   | TIC6X_INSN_C67X
+					   | TIC6X_INSN_C67XP
+					   | TIC6X_INSN_C674X) }
   };
 
 /* Update the selected architecture based on ARCH, giving an error if
@@ -135,6 +150,12 @@ tic6x_use_arch (const char *arch)
     if (strcmp (arch, tic6x_arches[i].arch) == 0)
       {
 	tic6x_arch_enable = tic6x_arches[i].features;
+	if (tic6x_seen_insns)
+	  tic6x_arch_attribute
+	    = elf32_tic6x_merge_arch_attributes (tic6x_arch_attribute,
+						 tic6x_arches[i].attr);
+	else
+	  tic6x_arch_attribute = tic6x_arches[i].attr;
 	return;
       }
 
@@ -295,10 +316,53 @@ s_tic6x_nocmp (int ignored ATTRIBUTE_UNUSED)
   demand_empty_rest_of_line ();
 }
 
+/* Track for each attribute whether it has been set explicitly (and so
+   should not have a default value set by the assembler).  */
+static bfd_boolean tic6x_attributes_set_explicitly[NUM_KNOWN_OBJ_ATTRIBUTES];
+
+/* Parse a .c6xabi_attribute directive.  */
+
+static void
+s_tic6x_c6xabi_attribute (int ignored ATTRIBUTE_UNUSED)
+{
+  int tag = s_vendor_attribute (OBJ_ATTR_PROC);
+
+  if (tag < NUM_KNOWN_OBJ_ATTRIBUTES)
+    tic6x_attributes_set_explicitly[tag] = TRUE;
+}
+
+typedef struct
+{
+  const char *name;
+  int tag;
+} tic6x_attribute_table;
+
+static const tic6x_attribute_table tic6x_attributes[] =
+  {
+#define TAG(tag, value) { #tag, tag }
+#include "elf/tic6x-attrs.h"
+#undef TAG
+  };
+
+/* Convert an attribute name to a number.  */
+
+int
+tic6x_convert_symbolic_attribute (const char *name)
+{
+  unsigned int i;
+
+  for (i = 0; i < ARRAY_SIZE (tic6x_attributes); i++)
+    if (strcmp (name, tic6x_attributes[i].name) == 0)
+      return tic6x_attributes[i].tag;
+
+  return -1;
+}
+
 const pseudo_typeS md_pseudo_table[] =
   {
     { "arch", s_tic6x_arch, 0 },
     { "atomic", s_tic6x_atomic, 0 },
+    { "c6xabi_attribute", s_tic6x_c6xabi_attribute, 0 },
     { "noatomic", s_tic6x_noatomic, 0 },
     { "nocmp", s_tic6x_nocmp, 0 },
     { "word", cons, 4 },
@@ -2587,6 +2651,16 @@ md_assemble (char *str)
   if (p == str)
     abort ();
 
+  /* Now an instruction has been seen, architecture attributes from
+     .arch directives merge with rather than overriding the previous
+     value.  */
+  tic6x_seen_insns = TRUE;
+  /* If no .arch directives or -march options have been seen, we are
+     assessing instruction validity based on the C674X default, so set
+     the attribute accordingly.  */
+  if (tic6x_arch_attribute == C6XABI_Tag_CPU_arch_none)
+    tic6x_arch_attribute = C6XABI_Tag_CPU_arch_C674X;
+
   /* Reset global settings for parallel bars and predicates now to
      avoid extra errors if there are problems with this opcode.  */
   this_line_parallel = tic6x_line_parallel;
@@ -3760,6 +3834,29 @@ tic6x_frag_init (fragS *fragp)
   fragp->tc_frag_data.can_cross_fp_boundary = FALSE;
 }
 
+/* Set an attribute if it has not already been set by the user.  */
+
+static void
+tic6x_set_attribute_int (int tag, int value)
+{
+  if (tag < 1
+      || tag >= NUM_KNOWN_OBJ_ATTRIBUTES)
+    abort ();
+  if (!tic6x_attributes_set_explicitly[tag])
+    bfd_elf_add_proc_attr_int (stdoutput, tag, value);
+}
+
+/* Set object attributes deduced from the input file and command line
+   rather than given explicitly.  */
+static void
+tic6x_set_attributes (void)
+{
+  if (tic6x_arch_attribute == C6XABI_Tag_CPU_arch_none)
+    tic6x_arch_attribute = C6XABI_Tag_CPU_arch_C674X;
+
+  tic6x_set_attribute_int (Tag_C6XABI_Tag_CPU_arch, tic6x_arch_attribute);
+}
+
 /* Do machine-dependent manipulations of the frag chains after all
    input has been read and before the machine-independent sizing and
    relaxing.  */
@@ -3767,6 +3864,9 @@ tic6x_frag_init (fragS *fragp)
 void
 tic6x_end (void)
 {
+  /* Set object attributes at this point if not explicitly set.  */
+  tic6x_set_attributes ();
+
   /* Meeting alignment requirements may require inserting NOPs in
      parallel in execute packets earlier in the segment.  Future
      16-bit instruction generation involves whole-segment optimization

gas/config/tc-tic6x.h

@@ -119,6 +119,10 @@ extern void tic6x_cons_align (int n);
   } while (0)
 extern bfd_boolean tic6x_do_align (int n, char *fill, int len, int max);
 
+#define CONVERT_SYMBOLIC_ATTRIBUTE(name)	\
+  tic6x_convert_symbolic_attribute (name)
+extern int tic6x_convert_symbolic_attribute (const char *);
+
 #define md_end() tic6x_end ();
 extern void tic6x_end (void);
 

gas/testsuite/ChangeLog

@@ -1,3 +1,24 @@
+2010-06-15  Joseph Myers  <joseph@codesourcery.com>
+
+	* gas/elf/elf.exp: Set target_machine for tic6x-*-*.
+	* gas/elf/section2.e-tic6x, gas/tic6x/attr-arch-directive-1.d,
+	gas/tic6x/attr-arch-directive-1.s,
+	gas/tic6x/attr-arch-directive-2.d,
+	gas/tic6x/attr-arch-directive-2.s,
+	gas/tic6x/attr-arch-directive-3.d,
+	gas/tic6x/attr-arch-directive-3.s,
+	gas/tic6x/attr-arch-directive-4.d,
+	gas/tic6x/attr-arch-directive-4.s,
+	gas/tic6x/attr-arch-directive-5.d,
+	gas/tic6x/attr-arch-directive-5.s,
+	gas/tic6x/attr-arch-opts-c62x.d, gas/tic6x/attr-arch-opts-c64x+.d,
+	gas/tic6x/attr-arch-opts-c64x.d, gas/tic6x/attr-arch-opts-c674x.d,
+	gas/tic6x/attr-arch-opts-c67x+.d, gas/tic6x/attr-arch-opts-c67x.d,
+	gas/tic6x/attr-arch-opts-none-1.d,
+	gas/tic6x/attr-arch-opts-none-2.d,
+	gas/tic6x/attr-arch-opts-override-1.d,
+	gas/tic6x/attr-arch-opts-override-2.d, gas/tic6x/empty.s: New.
+
 2010-06-14  Sebastian Andrzej Siewior  <bigeasy@linutronix.de>
 
 	* gas/ppc/e500.s: Add eieio, mbar and lwsync

gas/testsuite/gas/elf/elf.exp

@@ -59,6 +59,9 @@ if { ([istarget "*-*-*elf*"]
     if {[istarget "score-*-*"]} then {
 	set target_machine -score
     }
+    if {[istarget "tic6x-*-*"]} then {
+	set target_machine -tic6x
+    }
     if {[istarget "xtensa*-*-*"]} then {
 	set target_machine -xtensa
     }

gas/testsuite/gas/elf/section2.e-tic6x

@@ -0,0 +1,9 @@
+
+Symbol table '.symtab' contains 6 entries:
+   Num:    Value[ 	]* Size Type    Bind   Vis      Ndx Name
+     0: 0+0     0 NOTYPE  LOCAL  DEFAULT  UND 
+     1: 0+0     0 SECTION LOCAL  DEFAULT    1 
+     2: 0+0     0 SECTION LOCAL  DEFAULT    2 
+     3: 0+0     0 SECTION LOCAL  DEFAULT    3 
+     4: 0+0     0 SECTION LOCAL  DEFAULT    4 
+     5: 0+0     0 SECTION LOCAL  DEFAULT    5 

gas/testsuite/gas/tic6x/attr-arch-directive-1.d

@@ -0,0 +1,8 @@
+#readelf: -A
+#name: C6X arch attributes, directives 1
+#as: -march=c64x
+#source: attr-arch-directive-1.s
+
+Attribute Section: c6xabi
+File Attributes
+  Tag_C6XABI_Tag_CPU_arch: C62x

gas/testsuite/gas/tic6x/attr-arch-directive-1.s

@@ -0,0 +1,3 @@
+# .arch directives override previous attributes before instructions are seen.
+.arch c67x
+.arch c62x

gas/testsuite/gas/tic6x/attr-arch-directive-2.d

@@ -0,0 +1,8 @@
+#readelf: -A
+#name: C6X arch attributes, directives 2
+#as: -march=c64x
+#source: attr-arch-directive-2.s
+
+Attribute Section: c6xabi
+File Attributes
+  Tag_C6XABI_Tag_CPU_arch: C64x\+

gas/testsuite/gas/tic6x/attr-arch-directive-2.s

@@ -0,0 +1,9 @@
+# .arch directives override previous attributes before instructions
+# are seen, but not after.
+.text
+.globl f
+f:
+.arch c67x
+.arch c62x
+	nop
+.arch c64x+

gas/testsuite/gas/tic6x/attr-arch-directive-3.d

@@ -0,0 +1,8 @@
+#readelf: -A
+#name: C6X arch attributes, directives 3
+#as: -march=c62x
+#source: attr-arch-directive-3.s
+
+Attribute Section: c6xabi
+File Attributes
+  Tag_C6XABI_Tag_CPU_arch: C674x

gas/testsuite/gas/tic6x/attr-arch-directive-3.s

@@ -0,0 +1,7 @@
+# .arch directives merge attributes after instructions are seen.
+.text
+.globl f
+f:
+	nop
+.arch c67x
+.arch c64x+

gas/testsuite/gas/tic6x/attr-arch-directive-4.d

@@ -0,0 +1,8 @@
+#readelf: -A
+#name: C6X arch attributes, directives 4
+#as:
+#source: attr-arch-directive-4.s
+
+Attribute Section: c6xabi
+File Attributes
+  Tag_C6XABI_Tag_CPU_arch: C62x

gas/testsuite/gas/tic6x/attr-arch-directive-4.s

@@ -0,0 +1,3 @@
+# .c6xabi_attribute directives override other architecture information.
+.c6xabi_attribute 2, 1
+.arch c674x

gas/testsuite/gas/tic6x/attr-arch-directive-5.d

@@ -0,0 +1,8 @@
+#readelf: -A
+#name: C6X arch attributes, directives 5
+#as:
+#source: attr-arch-directive-5.s
+
+Attribute Section: c6xabi
+File Attributes
+  Tag_C6XABI_Tag_CPU_arch: C62x

gas/testsuite/gas/tic6x/attr-arch-directive-5.s

@@ -0,0 +1,3 @@
+# .c6xabi_attribute directives override other architecture information.
+.arch c674x
+.c6xabi_attribute Tag_C6XABI_Tag_CPU_arch, 1

gas/testsuite/gas/tic6x/attr-arch-opts-c62x.d

@@ -0,0 +1,8 @@
+#readelf: -A
+#name: C6X arch attributes, -march=c62x
+#as: -march=c62x
+#source: dummy.s
+
+Attribute Section: c6xabi
+File Attributes
+  Tag_C6XABI_Tag_CPU_arch: C62x

gas/testsuite/gas/tic6x/attr-arch-opts-c64x+.d

@@ -0,0 +1,8 @@
+#readelf: -A
+#name: C6X arch attributes, -march=c64x+
+#as: -march=c64x+
+#source: dummy.s
+
+Attribute Section: c6xabi
+File Attributes
+  Tag_C6XABI_Tag_CPU_arch: C64x\+

gas/testsuite/gas/tic6x/attr-arch-opts-c64x.d

@@ -0,0 +1,8 @@
+#readelf: -A
+#name: C6X arch attributes, -march=c64x
+#as: -march=c64x
+#source: dummy.s
+
+Attribute Section: c6xabi
+File Attributes
+  Tag_C6XABI_Tag_CPU_arch: C64x

gas/testsuite/gas/tic6x/attr-arch-opts-c674x.d

@@ -0,0 +1,8 @@
+#readelf: -A
+#name: C6X arch attributes, -march=c674x
+#as: -march=c674x
+#source: dummy.s
+
+Attribute Section: c6xabi
+File Attributes
+  Tag_C6XABI_Tag_CPU_arch: C674x

gas/testsuite/gas/tic6x/attr-arch-opts-c67x+.d

@@ -0,0 +1,8 @@
+#readelf: -A
+#name: C6X arch attributes, -march=c67x+
+#as: -march=c67x+
+#source: dummy.s
+
+Attribute Section: c6xabi
+File Attributes
+  Tag_C6XABI_Tag_CPU_arch: C67x\+

gas/testsuite/gas/tic6x/attr-arch-opts-c67x.d

@@ -0,0 +1,8 @@
+#readelf: -A
+#name: C6X arch attributes, -march=c67x
+#as: -march=c67x
+#source: dummy.s
+
+Attribute Section: c6xabi
+File Attributes
+  Tag_C6XABI_Tag_CPU_arch: C67x

gas/testsuite/gas/tic6x/attr-arch-opts-none-1.d

@@ -0,0 +1,8 @@
+#readelf: -A
+#name: C6X arch attributes, no options 1
+#as:
+#source: dummy.s
+
+Attribute Section: c6xabi
+File Attributes
+  Tag_C6XABI_Tag_CPU_arch: C674x

gas/testsuite/gas/tic6x/attr-arch-opts-none-2.d

@@ -0,0 +1,8 @@
+#readelf: -A
+#name: C6X arch attributes, no options 2
+#as:
+#source: empty.s
+
+Attribute Section: c6xabi
+File Attributes
+  Tag_C6XABI_Tag_CPU_arch: C674x

gas/testsuite/gas/tic6x/attr-arch-opts-override-1.d

@@ -0,0 +1,8 @@
+#readelf: -A
+#name: C6X arch attributes, -march=c674x -march=c62x
+#as: -march=c674x -march=c62x
+#source: dummy.s
+
+Attribute Section: c6xabi
+File Attributes
+  Tag_C6XABI_Tag_CPU_arch: C62x

gas/testsuite/gas/tic6x/attr-arch-opts-override-2.d

@@ -0,0 +1,8 @@
+#readelf: -A
+#name: C6X arch attributes, -march=c62x -march=c674x
+#as: -march=c62x -march=c674x
+#source: dummy.s
+
+Attribute Section: c6xabi
+File Attributes
+  Tag_C6XABI_Tag_CPU_arch: C674x

gas/testsuite/gas/tic6x/empty.s

@@ -0,0 +1 @@
+# Dummy input file with no instructions at all.

include/elf/ChangeLog

@@ -1,3 +1,12 @@
+2010-06-15  Joseph Myers  <joseph@codesourcery.com>
+
+	* tic6x-attrs.h: New.
+	* tic6x.h: Include elf/tic6x-attrs.h for attribute table.
+	(C6XABI_Tag_CPU_arch_none, C6XABI_Tag_CPU_arch_C62X,
+	C6XABI_Tag_CPU_arch_C67X, C6XABI_Tag_CPU_arch_C67XP,
+	C6XABI_Tag_CPU_arch_C64X, C6XABI_Tag_CPU_arch_C64XP,
+	C6XABI_Tag_CPU_arch_C674X): Define.
+
 2010-06-11  Tristan Gingold  <gingold@adacore.com>
 
 	* ia64.h (EF_IA_64_VMS_COMCOD, EF_IA_64_VMS_COMCOD_SUCCESS)

include/elf/tic6x-attrs.h

@@ -0,0 +1,25 @@
+/* TI C6X ELF attributes.
+   Copyright 2010
+   Free Software Foundation, Inc.
+
+   This file is part of BFD, the Binary File Descriptor library.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 3 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
+   MA 02110-1301, USA.  */
+
+/* Define the TAG macro before including this file; it takes a tag
+   name and value.  */
+
+TAG(Tag_C6XABI_Tag_CPU_arch, 2)

include/elf/tic6x.h

@@ -125,4 +125,26 @@ END_RELOC_NUMBERS (R_TIC6X_max)
 /* Segment cannot be further relocated.  */
 #define PHA_READONLY		0x2
 
+/* Build attributes.  */
+enum
+  {
+#define TAG(tag, value) tag = value,
+#include "elf/tic6x-attrs.h"
+#undef TAG
+    Tag_C6XABI_last
+  };
+
+/* Values for Tag_C6XABI_Tag_CPU_arch.  GNU-specific names pending any
+   ABI defining official names associated with the values.  */
+enum
+  {
+    C6XABI_Tag_CPU_arch_none = 0,
+    C6XABI_Tag_CPU_arch_C62X = 1,
+    C6XABI_Tag_CPU_arch_C67X = 3,
+    C6XABI_Tag_CPU_arch_C67XP = 4,
+    C6XABI_Tag_CPU_arch_C64X = 6,
+    C6XABI_Tag_CPU_arch_C64XP = 7,
+    C6XABI_Tag_CPU_arch_C674X = 8
+  };
+
 #endif /* _ELF_TIC6X_H */

ld/ChangeLog

@@ -1,3 +1,7 @@
+2010-06-15  Joseph Myers  <joseph@codesourcery.com>
+
+	* emulparams/elf32_tic6x_le.sh (ATTRS_SECTIONS): Define.
+
 2010-06-09  Dave Korn  <dave.korn.cygwin@gmail.com>
 
 	PR ld/11603

ld/emulparams/elf32_tic6x_le.sh

@@ -37,3 +37,4 @@ OTHER_BSS_SECTIONS="
     . +=  0x100000;
     _STACK_START = .;
   }"
+ATTRS_SECTIONS='__TI_build_attributes 0 : { KEEP (*(__TI_build_attributes)) KEEP (*(.gnu.attributes)) }'

ld/testsuite/ChangeLog

@@ -1,3 +1,29 @@
+2010-06-15  Joseph Myers  <joseph@codesourcery.com>
+
+	* ld-elf/orphan3.d: Allow section names starting '_'.
+	* ld-tic6x/attr-arch-c62x-c62x.d, ld-tic6x/attr-arch-c62x-c64x+.d,
+	ld-tic6x/attr-arch-c62x-c64x.d, ld-tic6x/attr-arch-c62x-c674x.d,
+	ld-tic6x/attr-arch-c62x-c67x+.d, ld-tic6x/attr-arch-c62x-c67x.d,
+	ld-tic6x/attr-arch-c62x.s, ld-tic6x/attr-arch-c64x+-c62x.d,
+	ld-tic6x/attr-arch-c64x+-c64x+.d, ld-tic6x/attr-arch-c64x+-c64x.d,
+	ld-tic6x/attr-arch-c64x+-c674x.d,
+	ld-tic6x/attr-arch-c64x+-c67x+.d, ld-tic6x/attr-arch-c64x+-c67x.d,
+	ld-tic6x/attr-arch-c64x+.s, ld-tic6x/attr-arch-c64x-c62x.d,
+	ld-tic6x/attr-arch-c64x-c64x+.d, ld-tic6x/attr-arch-c64x-c64x.d,
+	ld-tic6x/attr-arch-c64x-c674x.d, ld-tic6x/attr-arch-c64x-c67x+.d,
+	ld-tic6x/attr-arch-c64x-c67x.d, ld-tic6x/attr-arch-c64x.s,
+	ld-tic6x/attr-arch-c674x-c62x.d, ld-tic6x/attr-arch-c674x-c64x+.d,
+	ld-tic6x/attr-arch-c674x-c64x.d, ld-tic6x/attr-arch-c674x-c674x.d,
+	ld-tic6x/attr-arch-c674x-c67x+.d, ld-tic6x/attr-arch-c674x-c67x.d,
+	ld-tic6x/attr-arch-c674x.s, ld-tic6x/attr-arch-c67x+-c62x.d,
+	ld-tic6x/attr-arch-c67x+-c64x+.d, ld-tic6x/attr-arch-c67x+-c64x.d,
+	ld-tic6x/attr-arch-c67x+-c674x.d,
+	ld-tic6x/attr-arch-c67x+-c67x+.d, ld-tic6x/attr-arch-c67x+-c67x.d,
+	ld-tic6x/attr-arch-c67x+.s, ld-tic6x/attr-arch-c67x-c62x.d,
+	ld-tic6x/attr-arch-c67x-c64x+.d, ld-tic6x/attr-arch-c67x-c64x.d,
+	ld-tic6x/attr-arch-c67x-c674x.d, ld-tic6x/attr-arch-c67x-c67x+.d,
+	ld-tic6x/attr-arch-c67x-c67x.d, ld-tic6x/attr-arch-c67x.s: New.
+
 2010-06-07  Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
 
 	* ld-arm/arm-call.d: Handle change in lsls/movs disassembly.

ld/testsuite/ld-elf/orphan3.d

@@ -17,5 +17,5 @@
   \[[ 0-9]+\] \.foo +NOBITS +[0-9a-f]+ +[0-9a-f]+ +0+20 +0+ +A +0 +0 +[0-9]+
 #...
   \[[ 0-9]+\] \.foo +PROGBITS +0+ +[0-9a-f]+ +0+20 +0+ +0 +0 +[0-9]+
-  \[[ 0-9]+\] \.[^f].*
+  \[[ 0-9]+\] [._][^f].*
 #pass

ld/testsuite/ld-tic6x/attr-arch-c62x-c62x.d

@@ -0,0 +1,10 @@
+#name: C6X arch attribute merging, c62x c62x
+#as: -mlittle-endian
+#ld: -r -melf32_tic6x_le
+#source: attr-arch-c62x.s
+#source: attr-arch-c62x.s
+#readelf: -A
+
+Attribute Section: c6xabi
+File Attributes
+  Tag_C6XABI_Tag_CPU_arch: C62x

ld/testsuite/ld-tic6x/attr-arch-c62x-c64x+.d

@@ -0,0 +1,10 @@
+#name: C6X arch attribute merging, c62x c64x+
+#as: -mlittle-endian
+#ld: -r -melf32_tic6x_le
+#source: attr-arch-c62x.s
+#source: attr-arch-c64x+.s
+#readelf: -A
+
+Attribute Section: c6xabi
+File Attributes
+  Tag_C6XABI_Tag_CPU_arch: C64x\+

ld/testsuite/ld-tic6x/attr-arch-c62x-c64x.d

@@ -0,0 +1,10 @@
+#name: C6X arch attribute merging, c62x c64x
+#as: -mlittle-endian
+#ld: -r -melf32_tic6x_le
+#source: attr-arch-c62x.s
+#source: attr-arch-c64x.s
+#readelf: -A
+
+Attribute Section: c6xabi
+File Attributes
+  Tag_C6XABI_Tag_CPU_arch: C64x

ld/testsuite/ld-tic6x/attr-arch-c62x-c674x.d

@@ -0,0 +1,10 @@
+#name: C6X arch attribute merging, c62x c674x
+#as: -mlittle-endian
+#ld: -r -melf32_tic6x_le
+#source: attr-arch-c62x.s
+#source: attr-arch-c674x.s
+#readelf: -A
+
+Attribute Section: c6xabi
+File Attributes
+  Tag_C6XABI_Tag_CPU_arch: C674x

ld/testsuite/ld-tic6x/attr-arch-c62x-c67x+.d

@@ -0,0 +1,10 @@
+#name: C6X arch attribute merging, c62x c67x+
+#as: -mlittle-endian
+#ld: -r -melf32_tic6x_le
+#source: attr-arch-c62x.s
+#source: attr-arch-c67x+.s
+#readelf: -A
+
+Attribute Section: c6xabi
+File Attributes
+  Tag_C6XABI_Tag_CPU_arch: C67x\+

ld/testsuite/ld-tic6x/attr-arch-c62x-c67x.d

@@ -0,0 +1,10 @@
+#name: C6X arch attribute merging, c62x c67x
+#as: -mlittle-endian
+#ld: -r -melf32_tic6x_le
+#source: attr-arch-c62x.s
+#source: attr-arch-c67x.s
+#readelf: -A
+
+Attribute Section: c6xabi
+File Attributes
+  Tag_C6XABI_Tag_CPU_arch: C67x

ld/testsuite/ld-tic6x/attr-arch-c62x.s

@@ -0,0 +1 @@
+.arch c62x

ld/testsuite/ld-tic6x/attr-arch-c64x+-c62x.d

@@ -0,0 +1,10 @@
+#name: C6X arch attribute merging, c64x+ c62x
+#as: -mlittle-endian
+#ld: -r -melf32_tic6x_le
+#source: attr-arch-c64x+.s
+#source: attr-arch-c62x.s
+#readelf: -A
+
+Attribute Section: c6xabi
+File Attributes
+  Tag_C6XABI_Tag_CPU_arch: C64x\+

ld/testsuite/ld-tic6x/attr-arch-c64x+-c64x+.d

@@ -0,0 +1,10 @@
+#name: C6X arch attribute merging, c64x+ c64x+
+#as: -mlittle-endian
+#ld: -r -melf32_tic6x_le
+#source: attr-arch-c64x+.s
+#source: attr-arch-c64x+.s
+#readelf: -A
+
+Attribute Section: c6xabi
+File Attributes
+  Tag_C6XABI_Tag_CPU_arch: C64x\+

ld/testsuite/ld-tic6x/attr-arch-c64x+-c64x.d

@@ -0,0 +1,10 @@
+#name: C6X arch attribute merging, c64x+ c64x
+#as: -mlittle-endian
+#ld: -r -melf32_tic6x_le
+#source: attr-arch-c64x+.s
+#source: attr-arch-c64x.s
+#readelf: -A
+
+Attribute Section: c6xabi
+File Attributes
+  Tag_C6XABI_Tag_CPU_arch: C64x\+

ld/testsuite/ld-tic6x/attr-arch-c64x+-c674x.d

@@ -0,0 +1,10 @@
+#name: C6X arch attribute merging, c64x+ c674x
+#as: -mlittle-endian
+#ld: -r -melf32_tic6x_le
+#source: attr-arch-c64x+.s
+#source: attr-arch-c674x.s
+#readelf: -A
+
+Attribute Section: c6xabi
+File Attributes
+  Tag_C6XABI_Tag_CPU_arch: C674x

ld/testsuite/ld-tic6x/attr-arch-c64x+-c67x+.d

@@ -0,0 +1,10 @@
+#name: C6X arch attribute merging, c64x+ c67x+
+#as: -mlittle-endian
+#ld: -r -melf32_tic6x_le
+#source: attr-arch-c64x+.s
+#source: attr-arch-c67x+.s
+#readelf: -A
+
+Attribute Section: c6xabi
+File Attributes
+  Tag_C6XABI_Tag_CPU_arch: C674x

ld/testsuite/ld-tic6x/attr-arch-c64x+-c67x.d

@@ -0,0 +1,10 @@
+#name: C6X arch attribute merging, c64x+ c67x
+#as: -mlittle-endian
+#ld: -r -melf32_tic6x_le
+#source: attr-arch-c64x+.s
+#source: attr-arch-c67x.s
+#readelf: -A
+
+Attribute Section: c6xabi
+File Attributes
+  Tag_C6XABI_Tag_CPU_arch: C674x

ld/testsuite/ld-tic6x/attr-arch-c64x+.s

@@ -0,0 +1 @@
+.arch c64x+

ld/testsuite/ld-tic6x/attr-arch-c64x-c62x.d

@@ -0,0 +1,10 @@
+#name: C6X arch attribute merging, c64x c62x
+#as: -mlittle-endian
+#ld: -r -melf32_tic6x_le
+#source: attr-arch-c64x.s
+#source: attr-arch-c62x.s
+#readelf: -A
+
+Attribute Section: c6xabi
+File Attributes
+  Tag_C6XABI_Tag_CPU_arch: C64x

ld/testsuite/ld-tic6x/attr-arch-c64x-c64x+.d

@@ -0,0 +1,10 @@
+#name: C6X arch attribute merging, c64x c64x+
+#as: -mlittle-endian
+#ld: -r -melf32_tic6x_le
+#source: attr-arch-c64x.s
+#source: attr-arch-c64x+.s
+#readelf: -A
+
+Attribute Section: c6xabi
+File Attributes
+  Tag_C6XABI_Tag_CPU_arch: C64x\+

ld/testsuite/ld-tic6x/attr-arch-c64x-c64x.d

@@ -0,0 +1,10 @@
+#name: C6X arch attribute merging, c64x c64x
+#as: -mlittle-endian
+#ld: -r -melf32_tic6x_le
+#source: attr-arch-c64x.s
+#source: attr-arch-c64x.s
+#readelf: -A
+
+Attribute Section: c6xabi
+File Attributes
+  Tag_C6XABI_Tag_CPU_arch: C64x

ld/testsuite/ld-tic6x/attr-arch-c64x-c674x.d

@@ -0,0 +1,10 @@
+#name: C6X arch attribute merging, c64x c674x
+#as: -mlittle-endian
+#ld: -r -melf32_tic6x_le
+#source: attr-arch-c64x.s
+#source: attr-arch-c674x.s
+#readelf: -A
+
+Attribute Section: c6xabi
+File Attributes
+  Tag_C6XABI_Tag_CPU_arch: C674x

ld/testsuite/ld-tic6x/attr-arch-c64x-c67x+.d

@@ -0,0 +1,10 @@
+#name: C6X arch attribute merging, c64x c67x+
+#as: -mlittle-endian
+#ld: -r -melf32_tic6x_le
+#source: attr-arch-c64x.s
+#source: attr-arch-c67x+.s
+#readelf: -A
+
+Attribute Section: c6xabi
+File Attributes
+  Tag_C6XABI_Tag_CPU_arch: C674x

ld/testsuite/ld-tic6x/attr-arch-c64x-c67x.d

@@ -0,0 +1,10 @@
+#name: C6X arch attribute merging, c64x c67x
+#as: -mlittle-endian
+#ld: -r -melf32_tic6x_le
+#source: attr-arch-c64x.s
+#source: attr-arch-c67x.s
+#readelf: -A
+
+Attribute Section: c6xabi
+File Attributes
+  Tag_C6XABI_Tag_CPU_arch: C674x

ld/testsuite/ld-tic6x/attr-arch-c64x.s

@@ -0,0 +1 @@
+.arch c64x

ld/testsuite/ld-tic6x/attr-arch-c674x-c62x.d

@@ -0,0 +1,10 @@
+#name: C6X arch attribute merging, c674x c62x
+#as: -mlittle-endian
+#ld: -r -melf32_tic6x_le
+#source: attr-arch-c674x.s
+#source: attr-arch-c62x.s
+#readelf: -A
+
+Attribute Section: c6xabi
+File Attributes
+  Tag_C6XABI_Tag_CPU_arch: C674x

ld/testsuite/ld-tic6x/attr-arch-c674x-c64x+.d

@@ -0,0 +1,10 @@
+#name: C6X arch attribute merging, c674x c64x+
+#as: -mlittle-endian
+#ld: -r -melf32_tic6x_le
+#source: attr-arch-c674x.s
+#source: attr-arch-c64x+.s
+#readelf: -A
+
+Attribute Section: c6xabi
+File Attributes
+  Tag_C6XABI_Tag_CPU_arch: C674x

ld/testsuite/ld-tic6x/attr-arch-c674x-c64x.d

@@ -0,0 +1,10 @@
+#name: C6X arch attribute merging, c674x c64x
+#as: -mlittle-endian
+#ld: -r -melf32_tic6x_le
+#source: attr-arch-c674x.s
+#source: attr-arch-c64x.s
+#readelf: -A
+
+Attribute Section: c6xabi
+File Attributes
+  Tag_C6XABI_Tag_CPU_arch: C674x

ld/testsuite/ld-tic6x/attr-arch-c674x-c674x.d

@@ -0,0 +1,10 @@
+#name: C6X arch attribute merging, c674x c674x
+#as: -mlittle-endian
+#ld: -r -melf32_tic6x_le
+#source: attr-arch-c674x.s
+#source: attr-arch-c674x.s
+#readelf: -A
+
+Attribute Section: c6xabi
+File Attributes
+  Tag_C6XABI_Tag_CPU_arch: C674x

ld/testsuite/ld-tic6x/attr-arch-c674x-c67x+.d

@@ -0,0 +1,10 @@
+#name: C6X arch attribute merging, c674x c67x+
+#as: -mlittle-endian
+#ld: -r -melf32_tic6x_le
+#source: attr-arch-c674x.s
+#source: attr-arch-c67x+.s
+#readelf: -A
+
+Attribute Section: c6xabi
+File Attributes
+  Tag_C6XABI_Tag_CPU_arch: C674x

ld/testsuite/ld-tic6x/attr-arch-c674x-c67x.d

@@ -0,0 +1,10 @@
+#name: C6X arch attribute merging, c674x c67x
+#as: -mlittle-endian
+#ld: -r -melf32_tic6x_le
+#source: attr-arch-c674x.s
+#source: attr-arch-c67x.s
+#readelf: -A
+
+Attribute Section: c6xabi
+File Attributes
+  Tag_C6XABI_Tag_CPU_arch: C674x

ld/testsuite/ld-tic6x/attr-arch-c674x.s

@@ -0,0 +1 @@
+.arch c674x

ld/testsuite/ld-tic6x/attr-arch-c67x+-c62x.d

@@ -0,0 +1,10 @@
+#name: C6X arch attribute merging, c67x+ c62x
+#as: -mlittle-endian
+#ld: -r -melf32_tic6x_le
+#source: attr-arch-c67x+.s
+#source: attr-arch-c62x.s
+#readelf: -A
+
+Attribute Section: c6xabi
+File Attributes
+  Tag_C6XABI_Tag_CPU_arch: C67x\+

ld/testsuite/ld-tic6x/attr-arch-c67x+-c64x+.d

@@ -0,0 +1,10 @@
+#name: C6X arch attribute merging, c67x+ c64x+
+#as: -mlittle-endian
+#ld: -r -melf32_tic6x_le
+#source: attr-arch-c67x+.s
+#source: attr-arch-c64x+.s
+#readelf: -A
+
+Attribute Section: c6xabi
+File Attributes
+  Tag_C6XABI_Tag_CPU_arch: C674x

ld/testsuite/ld-tic6x/attr-arch-c67x+-c64x.d

@@ -0,0 +1,10 @@
+#name: C6X arch attribute merging, c67x+ c64x
+#as: -mlittle-endian
+#ld: -r -melf32_tic6x_le
+#source: attr-arch-c67x+.s
+#source: attr-arch-c64x.s
+#readelf: -A
+
+Attribute Section: c6xabi
+File Attributes
+  Tag_C6XABI_Tag_CPU_arch: C674x

ld/testsuite/ld-tic6x/attr-arch-c67x+-c674x.d

@@ -0,0 +1,10 @@
+#name: C6X arch attribute merging, c67x+ c674x
+#as: -mlittle-endian
+#ld: -r -melf32_tic6x_le
+#source: attr-arch-c67x+.s
+#source: attr-arch-c674x.s
+#readelf: -A
+
+Attribute Section: c6xabi
+File Attributes
+  Tag_C6XABI_Tag_CPU_arch: C674x

ld/testsuite/ld-tic6x/attr-arch-c67x+-c67x+.d

@@ -0,0 +1,10 @@
+#name: C6X arch attribute merging, c67x+ c67x+
+#as: -mlittle-endian
+#ld: -r -melf32_tic6x_le
+#source: attr-arch-c67x+.s
+#source: attr-arch-c67x+.s
+#readelf: -A
+
+Attribute Section: c6xabi
+File Attributes
+  Tag_C6XABI_Tag_CPU_arch: C67x\+

ld/testsuite/ld-tic6x/attr-arch-c67x+-c67x.d

@@ -0,0 +1,10 @@
+#name: C6X arch attribute merging, c67x+ c67x
+#as: -mlittle-endian
+#ld: -r -melf32_tic6x_le
+#source: attr-arch-c67x+.s
+#source: attr-arch-c67x.s
+#readelf: -A
+
+Attribute Section: c6xabi
+File Attributes
+  Tag_C6XABI_Tag_CPU_arch: C67x\+

ld/testsuite/ld-tic6x/attr-arch-c67x+.s

@@ -0,0 +1 @@
+.arch c67x+

ld/testsuite/ld-tic6x/attr-arch-c67x-c62x.d

@@ -0,0 +1,10 @@
+#name: C6X arch attribute merging, c67x c62x
+#as: -mlittle-endian
+#ld: -r -melf32_tic6x_le
+#source: attr-arch-c67x.s
+#source: attr-arch-c62x.s
+#readelf: -A
+
+Attribute Section: c6xabi
+File Attributes
+  Tag_C6XABI_Tag_CPU_arch: C67x

ld/testsuite/ld-tic6x/attr-arch-c67x-c64x+.d

@@ -0,0 +1,10 @@
+#name: C6X arch attribute merging, c67x c64x+
+#as: -mlittle-endian
+#ld: -r -melf32_tic6x_le
+#source: attr-arch-c67x.s
+#source: attr-arch-c64x+.s
+#readelf: -A
+
+Attribute Section: c6xabi
+File Attributes
+  Tag_C6XABI_Tag_CPU_arch: C674x

ld/testsuite/ld-tic6x/attr-arch-c67x-c64x.d

@@ -0,0 +1,10 @@
+#name: C6X arch attribute merging, c67x c64x
+#as: -mlittle-endian
+#ld: -r -melf32_tic6x_le
+#source: attr-arch-c67x.s
+#source: attr-arch-c64x.s
+#readelf: -A
+
+Attribute Section: c6xabi
+File Attributes
+  Tag_C6XABI_Tag_CPU_arch: C674x

ld/testsuite/ld-tic6x/attr-arch-c67x-c674x.d

@@ -0,0 +1,10 @@
+#name: C6X arch attribute merging, c67x c674x
+#as: -mlittle-endian
+#ld: -r -melf32_tic6x_le
+#source: attr-arch-c67x.s
+#source: attr-arch-c674x.s
+#readelf: -A
+
+Attribute Section: c6xabi
+File Attributes
+  Tag_C6XABI_Tag_CPU_arch: C674x

ld/testsuite/ld-tic6x/attr-arch-c67x-c67x+.d

@@ -0,0 +1,10 @@
+#name: C6X arch attribute merging, c67x c67x+
+#as: -mlittle-endian
+#ld: -r -melf32_tic6x_le
+#source: attr-arch-c67x.s
+#source: attr-arch-c67x+.s
+#readelf: -A
+
+Attribute Section: c6xabi
+File Attributes
+  Tag_C6XABI_Tag_CPU_arch: C67x\+

ld/testsuite/ld-tic6x/attr-arch-c67x-c67x.d

@@ -0,0 +1,10 @@
+#name: C6X arch attribute merging, c67x c67x
+#as: -mlittle-endian
+#ld: -r -melf32_tic6x_le
+#source: attr-arch-c67x.s
+#source: attr-arch-c67x.s
+#readelf: -A
+
+Attribute Section: c6xabi
+File Attributes
+  Tag_C6XABI_Tag_CPU_arch: C67x

ld/testsuite/ld-tic6x/attr-arch-c67x.s

@@ -0,0 +1 @@
+.arch c67x