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MIPS/opcodes: Also set disassembler's ASE flags from ELF structures
Respect any ASE flags recorded in ELF file structures for the purpose of selecting instructions to be disassembled, preventing code from being hex-dumped even though having been clearly indicated as valid at the assembly time. Use date from the MIPS ABI flags structure if present, and otherwise there may be an MDMX ASE flag set in the ELF file header. For backwards compatibility only set extra flags and do not clear any, preserving all previously set by the architecture selected to be disassembled for. include/ * elf/mips.h (Elf_Internal_ABIFlags_v0): Also declare struct typedef as `elf_internal_abiflags_v0'. bfd/ * bfd-in.h (elf_internal_abiflags_v0): New struct declaration. (bfd_mips_elf_get_abiflags): New prototype. * elfxx-mips.c (bfd_mips_elf_get_abiflags): New function. * bfd-in2.h: Regenerate. opcodes/ * mips-dis.c (mips_convert_abiflags_ases): New function. (set_default_mips_dis_options): Also infer ASE flags from ELF file structures. binutils/ * testsuite/binutils-all/mips/mips-ase-1.d: New test. * testsuite/binutils-all/mips/mips-ase-2.d: New test. * testsuite/binutils-all/mips/mips-ase-3.d: New test. * testsuite/binutils-all/mips/mips-ase-1.s: New test source. * testsuite/binutils-all/mips/mips-ase-2.s: New test source. * testsuite/binutils-all/mips/mips.exp: Run the new tests.
This commit is contained in:
Maciej W. Rozycki
parent
8184783a40
commit
5e7fc731f8
@ -1,3 +1,10 @@
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2016-12-14 Maciej W. Rozycki <macro@imgtec.com>
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* bfd-in.h (elf_internal_abiflags_v0): New struct declaration.
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(bfd_mips_elf_get_abiflags): New prototype.
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* elfxx-mips.c (bfd_mips_elf_get_abiflags): New function.
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* bfd-in2.h: Regenerate.
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2016-12-14 Yury Norov <ynorov@caviumnetworks.com>
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* bfd/elfnn-aarch64.c: fix TLS relaxations for ilp32 where
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@ -1045,3 +1045,7 @@ extern bfd_boolean v850_elf_create_sections
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extern bfd_boolean v850_elf_set_note
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(bfd *, unsigned int, unsigned int);
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/* MIPS ABI flags data access. For the disassembler. */
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struct elf_internal_abiflags_v0;
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extern struct elf_internal_abiflags_v0 *bfd_mips_elf_get_abiflags (bfd *);
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@ -1052,6 +1052,10 @@ extern bfd_boolean v850_elf_create_sections
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extern bfd_boolean v850_elf_set_note
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(bfd *, unsigned int, unsigned int);
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/* MIPS ABI flags data access. For the disassembler. */
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struct elf_internal_abiflags_v0;
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extern struct elf_internal_abiflags_v0 *bfd_mips_elf_get_abiflags (bfd *);
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/* Extracted from init.c. */
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void bfd_init (void);
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@ -16327,6 +16327,16 @@ _bfd_mips_elf_get_synthetic_symtab (bfd *abfd,
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return n;
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}
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/* Return the ABI flags associated with ABFD if available. */
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Elf_Internal_ABIFlags_v0 *
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bfd_mips_elf_get_abiflags (bfd *abfd)
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{
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struct mips_elf_obj_tdata *tdata = mips_elf_tdata (abfd);
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return tdata->abiflags_valid ? &tdata->abiflags : NULL;
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}
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void
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_bfd_mips_post_process_headers (bfd *abfd, struct bfd_link_info *link_info)
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{
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@ -1,3 +1,12 @@
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2016-12-14 Maciej W. Rozycki <macro@imgtec.com>
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* testsuite/binutils-all/mips/mips-ase-1.d: New test.
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* testsuite/binutils-all/mips/mips-ase-2.d: New test.
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* testsuite/binutils-all/mips/mips-ase-3.d: New test.
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* testsuite/binutils-all/mips/mips-ase-1.s: New test source.
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* testsuite/binutils-all/mips/mips-ase-2.s: New test source.
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* testsuite/binutils-all/mips/mips.exp: Run the new tests.
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2016-12-13 Jiong Wang <jiong.wang@arm.com>
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* readelf.c (is_32bit_abs_reloc): Recognize R_AARCH64_P32_ABS32.
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29
binutils/testsuite/binutils-all/mips/mips-ase-1.d
Normal file
29
binutils/testsuite/binutils-all/mips/mips-ase-1.d
Normal file
@ -0,0 +1,29 @@
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#PROG: objcopy
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#objdump: -dp --prefix-addresses --show-raw-insn
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#name: MIPS ELF file ASE information interpretation for disassembly 1
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#as: -32
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# Verify that in the absence of its ASE flag MDMX code is not disassembled
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# with MIPS64r2, where MDMX presence is not implied.
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.*: +file format .*mips.*
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!private flags = .*mdmx.*
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MIPS ABI Flags Version: 0
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ISA: MIPS64r2
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GPR size: 32
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CPR1 size: 64
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CPR2 size: 0
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FP ABI: Hard float \(32-bit CPU, 64-bit FPU\)
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ISA Extension: None
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ASEs:
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None
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FLAGS 1: .*
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FLAGS 2: .*
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Disassembly of section \.text:
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[0-9a-f]+ <[^>]*> 7aa2080b 0x7aa2080b
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[0-9a-f]+ <[^>]*> 46c520c0 add\.ps \$f3,\$f4,\$f5
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[0-9a-f]+ <[^>]*> 46c83998 addr\.ps \$f6,\$f7,\$f8
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\.\.\.
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12
binutils/testsuite/binutils-all/mips/mips-ase-1.s
Normal file
12
binutils/testsuite/binutils-all/mips/mips-ase-1.s
Normal file
@ -0,0 +1,12 @@
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.module mips64r2
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.module fp=64
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.set mdmx
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.set mips3d
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foo:
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add.qh $v0, $v1, $v2
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add.ps $f3, $f4, $f5
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addr.ps $f6, $f7, $f8
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# Force some (non-delay-slot) zero bytes, to make 'objdump' print ...
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.align 4, 0
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.space 16
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29
binutils/testsuite/binutils-all/mips/mips-ase-2.d
Normal file
29
binutils/testsuite/binutils-all/mips/mips-ase-2.d
Normal file
@ -0,0 +1,29 @@
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#PROG: objcopy
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#objdump: -dp --prefix-addresses --show-raw-insn
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#name: MIPS ELF file ASE information interpretation for disassembly 2
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#as: -32
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# Verify that in the presence of its ASE flag MDMX code is disassembled
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# with MIPS64r2, where MDMX presence is not implied.
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.*: +file format .*mips.*
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private flags = .[8-f]......: .*mdmx.*
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MIPS ABI Flags Version: 0
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ISA: MIPS64r2
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GPR size: 32
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CPR1 size: 64
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CPR2 size: 0
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FP ABI: Hard float \(32-bit CPU, 64-bit FPU\)
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ISA Extension: None
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ASEs:
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MDMX ASE
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FLAGS 1: .*
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FLAGS 2: .*
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Disassembly of section \.text:
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[0-9a-f]+ <[^>]*> 7aa2080b add\.qh \$v0,\$v1,\$v2
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[0-9a-f]+ <[^>]*> 46c520c0 add\.ps \$f3,\$f4,\$f5
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[0-9a-f]+ <[^>]*> 46c83998 addr\.ps \$f6,\$f7,\$f8
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\.\.\.
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12
binutils/testsuite/binutils-all/mips/mips-ase-2.s
Normal file
12
binutils/testsuite/binutils-all/mips/mips-ase-2.s
Normal file
@ -0,0 +1,12 @@
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.module mips64r2
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.module fp=64
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.module mdmx
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.set mips3d
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foo:
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add.qh $v0, $v1, $v2
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add.ps $f3, $f4, $f5
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addr.ps $f6, $f7, $f8
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# Force some (non-delay-slot) zero bytes, to make 'objdump' print ...
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.align 4, 0
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.space 16
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18
binutils/testsuite/binutils-all/mips/mips-ase-3.d
Normal file
18
binutils/testsuite/binutils-all/mips/mips-ase-3.d
Normal file
@ -0,0 +1,18 @@
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#PROG: objcopy
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#objdump: -dp --prefix-addresses --show-raw-insn
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#name: MIPS ELF file ASE information interpretation for disassembly 3
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#as: -32
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#objcopy: -R .MIPS.abiflags
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#source: mips-ase-2.s
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# Verify that in the presence of its ASE flag MDMX code is disassembled
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# with MIPS64r2, where MDMX presence is not implied.
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.*: +file format .*mips.*
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private flags = .[8-f]......: .*mdmx.*
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Disassembly of section \.text:
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[0-9a-f]+ <[^>]*> 7aa2080b add\.qh \$v0,\$v1,\$v2
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[0-9a-f]+ <[^>]*> 46c520c0 add\.ps \$f3,\$f4,\$f5
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[0-9a-f]+ <[^>]*> 46c83998 addr\.ps \$f6,\$f7,\$f8
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\.\.\.
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@ -20,6 +20,9 @@ if ![istarget mips*-*-*] {
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}
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if [is_elf_format] {
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run_dump_test "mips-ase-1"
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run_dump_test "mips-ase-2"
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run_dump_test "mips-ase-3"
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run_dump_test "mixed-mips16"
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run_dump_test "mixed-micromips"
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run_dump_test "mixed-mips16-micromips"
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@ -1,3 +1,8 @@
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2016-12-14 Maciej W. Rozycki <macro@imgtec.com>
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* elf/mips.h (Elf_Internal_ABIFlags_v0): Also declare struct
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typedef as `elf_internal_abiflags_v0'.
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2016-12-13 Renlin Li <renlin.li@arm.com>
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* opcode/aarch64.h (aarch64_operand_class): Remove
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@ -1101,7 +1101,7 @@ typedef struct
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unsigned char flags2[4];
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} Elf_External_ABIFlags_v0;
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typedef struct
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typedef struct elf_internal_abiflags_v0
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{
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/* Version of flags structure. */
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unsigned short version;
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@ -1,3 +1,9 @@
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2016-12-14 Maciej W. Rozycki <macro@imgtec.com>
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* mips-dis.c (mips_convert_abiflags_ases): New function.
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(set_default_mips_dis_options): Also infer ASE flags from ELF
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file structures.
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2016-12-14 Maciej W. Rozycki <macro@imgtec.com>
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* mips-dis.c (set_default_mips_dis_options): Reorder ELF file
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@ -764,6 +764,40 @@ is_micromips (Elf_Internal_Ehdr *header)
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return 0;
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}
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/* Convert ASE flags from .MIPS.abiflags to internal values. */
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static unsigned long
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mips_convert_abiflags_ases (unsigned long afl_ases)
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{
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unsigned long opcode_ases = 0;
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if (afl_ases & AFL_ASE_DSP)
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opcode_ases |= ASE_DSP;
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if (afl_ases & AFL_ASE_DSPR2)
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opcode_ases |= ASE_DSPR2;
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if (afl_ases & AFL_ASE_EVA)
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opcode_ases |= ASE_EVA;
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if (afl_ases & AFL_ASE_MCU)
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opcode_ases |= ASE_MCU;
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if (afl_ases & AFL_ASE_MDMX)
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opcode_ases |= ASE_MDMX;
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if (afl_ases & AFL_ASE_MIPS3D)
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opcode_ases |= ASE_MIPS3D;
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if (afl_ases & AFL_ASE_MT)
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opcode_ases |= ASE_MT;
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if (afl_ases & AFL_ASE_SMARTMIPS)
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opcode_ases |= ASE_SMARTMIPS;
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if (afl_ases & AFL_ASE_VIRT)
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opcode_ases |= ASE_VIRT;
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if (afl_ases & AFL_ASE_MSA)
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opcode_ases |= ASE_MSA;
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if (afl_ases & AFL_ASE_XPA)
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opcode_ases |= ASE_XPA;
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if (afl_ases & AFL_ASE_DSPR3)
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opcode_ases |= ASE_DSPR3;
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return opcode_ases;
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}
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static void
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set_default_mips_dis_options (struct disassemble_info *info)
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{
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@ -810,14 +844,20 @@ set_default_mips_dis_options (struct disassemble_info *info)
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/* Update settings according to the ELF file header flags. */
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if (info->flavour == bfd_target_elf_flavour && info->section != NULL)
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{
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Elf_Internal_Ehdr *header;
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struct bfd *abfd = info->section->owner;
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Elf_Internal_Ehdr *header = elf_elfheader (abfd);
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Elf_Internal_ABIFlags_v0 *abiflags = bfd_mips_elf_get_abiflags (abfd);
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header = elf_elfheader (info->section->owner);
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/* If an ELF "newabi" binary, use the n32/(n)64 GPR names. */
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if (is_newabi (header))
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mips_gpr_names = mips_gpr_names_newabi;
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/* If a microMIPS binary, then don't use MIPS16 bindings. */
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micromips_ase = is_micromips (header);
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/* OR in any extra ASE flags set in ELF file structures. */
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if (abiflags)
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mips_ase |= mips_convert_abiflags_ases (abiflags->ases);
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else if (header->e_flags & EF_MIPS_ARCH_ASE_MDMX)
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mips_ase |= ASE_MDMX;
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}
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}
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