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* gas/cris/pic-err-1.s, gas/cris/rd-pic-1.s, gas/cris/rd-pic-1.d:
New tests.
This commit is contained in:
parent
7704145c73
commit
5ef6758f8a
@ -1,5 +1,8 @@
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2001-03-23 Hans-Peter Nilsson <hp@axis.com>
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* gas/cris/pic-err-1.s, gas/cris/rd-pic-1.s, gas/cris/rd-pic-1.d:
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New tests.
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* gas/cris/branch-warn-1.s, gas/cris/branch-warn-2.s,
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gas/cris/branch-warn-3.s: Tweak for fixed FIXME:s.
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20
gas/testsuite/gas/cris/pic-err-1.s
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20
gas/testsuite/gas/cris/pic-err-1.s
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; Check that invalid PIC reloc and instruction size combinations are
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; recognized. Note that sizes of byte operands are not error-checked for
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; not being in 16-bit range, so no error is recognized for a 16-bit operand.
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; { dg-do assemble { target cris-*-* } }
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; { dg-options "--pic --no-underscore --em=criself" }
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.syntax no_register_prefix
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.text
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start:
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move.b extsym:GOTPLT16,r4 ; { dg-error "PIC relocation size does not match" "" { xfail *-*-* } }
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move.b extsym12:GOTPLT,r5 ; { dg-error "PIC relocation size does not match" }
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move.w extsym2:GOTPLT,r5 ; { dg-error "PIC relocation size does not match" }
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move.d extsym3:GOTPLT16,r6 ; { dg-error "PIC relocation size does not match" }
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move extsym4:GOTPLT16,srp ; { dg-error "PIC relocation size does not match" }
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move.b extsym5:GOT16,r4 ; { dg-error "PIC relocation size does not match" "" { xfail *-*-* } }
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move.b extsym15:GOT,r7 ; { dg-error "PIC relocation size does not match" }
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move.w extsym6:GOT,r5 ; { dg-error "PIC relocation size does not match" }
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move.d extsym7:GOT16,r6 ; { dg-error "PIC relocation size does not match" }
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move extsym8:GOT16,srp ; { dg-error "PIC relocation size does not match" }
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58
gas/testsuite/gas/cris/rd-pic-1.d
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58
gas/testsuite/gas/cris/rd-pic-1.d
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@ -0,0 +1,58 @@
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#objdump: -dr
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#as: --em=criself --pic
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#name: PIC relocs.
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.*: file format .*-cris
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Disassembly of section \.text:
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00000000 <start>:
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[ ]+0:[ ]+af1e 0000 0000[ ]+sub\.d 0 <start>,r1
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[ ]+2:[ ]+R_CRIS_32_GOTREL \.text
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[ ]+6:[ ]+6f3d 0000 0000 6aaa[ ]+move\.d \[r3\+0 <start>\],r10
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[ ]+8:[ ]+R_CRIS_32_GOT extsym
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[ ]+e:[ ]+2f9e 0000 0000[ ]+add\.d 0 <start>,r9
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[ ]+10:[ ]+R_CRIS_32_GOTREL extsym2
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[ ]+14:[ ]+6f8e 0000 0000[ ]+move\.d 0 <start>,r8
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[ ]+16:[ ]+R_CRIS_32_PLT_PCREL extsym5
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[ ]+1a:[ ]+6f8e 0000 0000[ ]+move\.d 0 <start>,r8
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[ ]+1c:[ ]+R_CRIS_32_PLT_GOTREL[ ]+extsym9
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[ ]+20:[ ]+6f3d 0000 0000 6aaa[ ]+move\.d \[r3\+0 <start>\],r10
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[ ]+22:[ ]+R_CRIS_32_GOTPLT extsym
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[ ]+28:[ ]+5fdd 0000 6aaa[ ]+move\.d \[r13\+0\],r10
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[ ]+2a:[ ]+R_CRIS_16_GOT extsym13
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[ ]+2e:[ ]+5fae 0000[ ]+move\.w 0x0,r10
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[ ]+30:[ ]+R_CRIS_16_GOTPLT extsym14
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[ ]+32:[ ]+6f3d 0000 0000 aa4a[ ]+sub\.d \[r3\+0 <start>\],r4,r10
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[ ]+34:[ ]+R_CRIS_32_GOT extsym3
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[ ]+3a:[ ]+af9e 0000 0000[ ]+sub\.d 0 <start>,r9
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[ ]+3c:[ ]+R_CRIS_32_GOTREL extsym4\+0x2a
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[ ]+40:[ ]+af3e 0000 0000[ ]+sub\.d 0 <start>,r3
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[ ]+42:[ ]+R_CRIS_32_GOTREL extsym4\+0xffffffa0
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[ ]+46:[ ]+6fad 0000 0000 287a[ ]+add\.d \[r10\+0 <start>\],r7,r8
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[ ]+48:[ ]+R_CRIS_32_GOT extsym3\+0x38
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[ ]+4e:[ ]+6f5d 0000 0000 611a[ ]+move\.d \[r5\+0 <start>\],r1
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[ ]+50:[ ]+R_CRIS_32_GOT extsym6\+0xa
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[ ]+56:[ ]+6fad 0000 0000 284a[ ]+add\.d \[r10\+0 <start>\],r4,r8
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[ ]+58:[ ]+R_CRIS_32_GOT extsym3\+0xfffffdd0
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[ ]+5e:[ ]+6f5d 0000 0000 6cca[ ]+move\.d \[r5\+0 <start>\],r12
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[ ]+60:[ ]+R_CRIS_32_GOT extsym6\+0xffffff92
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[ ]+66:[ ]+6f5d 0000 0000 69ce[ ]+move\.d \[r9=r5\+0 <start>\],r12
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[ ]+68:[ ]+R_CRIS_32_GOT extsym6\+0xffffff24
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[ ]+6e:[ ]+6f3d 0000 0000 67de[ ]+move\.d \[r7=r3\+0 <start>\],r13
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[ ]+70:[ ]+R_CRIS_32_GOTREL extsym10\+0xfffffeb6
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[ ]+76:[ ]+6f5e 0000 0000[ ]+move\.d 0 <start>,r5
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[ ]+78:[ ]+R_CRIS_32_PLT_PCREL extsym7\+0x4
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[ ]+7c:[ ]+6f9e 0000 0000[ ]+move\.d 0 <start>,r9
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[ ]+7e:[ ]+R_CRIS_32_PLT_PCREL extsym7\+0xffffffd8
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[ ]+82:[ ]+6f5e 0000 0000[ ]+move\.d 0 <start>,r5
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[ ]+84:[ ]+R_CRIS_32_PLT_GOTREL extsym11\+0x10
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[ ]+88:[ ]+6f9e 0000 0000[ ]+move\.d 0 <start>,r9
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[ ]+8a:[ ]+R_CRIS_32_PLT_GOTREL extsym12\+0xffffffc4
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[ ]+8e:[ ]+5fcd 0000 a89a[ ]+sub\.d \[r12\+0\],r9,r8
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[ ]+90:[ ]+R_CRIS_16_GOT extsym3\+0xffffff64
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[ ]+94:[ ]+5fbd 0000 699a[ ]+move\.d \[r11\+0\],r9
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[ ]+96:[ ]+R_CRIS_16_GOTPLT extsym14\+0xffffff00
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[ ]+9a:[ ]+6fad 0000 0000 287a[ ]+add\.d \[r10\+0 <start>\],r7,r8
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[ ]+9c:[ ]+R_CRIS_32_GOTPLT extsym3\+0x38
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[ ]+\.\.\.
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32
gas/testsuite/gas/cris/rd-pic-1.s
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32
gas/testsuite/gas/cris/rd-pic-1.s
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; Check that PIC operands get their right relocation type.
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; First some expected uses, similar to what GCC will emit.
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.text
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start:
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sub.d .:GOTOFF,r1
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move.d [r3+extsym:GOT],r10
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add.d extsym2:GOTOFF,r9
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move.d extsym5:PLT,r8
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move.d extsym9:PLTG,r8
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move.d [r3+extsym:GOTPLT],r10
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move.d [r13+extsym13:GOT16],r10
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move.w extsym14:GOTPLT16,r10
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; Other for GAS valid operands (some with questionable PIC semantics).
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sub.d [r3+extsym3:GOT],r4,r10
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sub.d extsym4:GOTOFF+42,r9
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sub.d extsym4:GOTOFF-96,r3
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add.d [r10+extsym3:GOT+56],r7,r8
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move.d [r5+extsym6:GOT+10],r1
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add.d [r10+extsym3:GOT-560],r4,r8
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move.d [r5+extsym6:GOT-110],r12
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move.d [r9=r5+extsym6:GOT-220],r12
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move.d [r7=r3+extsym10:GOTOFF-330],r13
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move.d extsym7:PLT+4,r5
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move.d extsym7:PLT-40,r9
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move.d extsym11:PLTG+16,r5
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move.d extsym12:PLTG-60,r9
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sub.d [r12+extsym3:GOT16-156],r9,r8
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move.d [r11+extsym14:GOTPLT16-256],r9
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add.d [r10+extsym3:GOTPLT+56],r7,r8
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