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* remote-e7000.c (HARD_BREAKPOINTS): Reenable.

Browse Source 
(BC_BREAKPOINTS): Disable.
	* sh-tdep.c (print_insn): Cope with big and little endian machines.
	* sh/sh.mt: Use libsim.a
	* sh/tm-sh.h (TARGET_BYTE_ORDER_SELECTABLE): New
	(BREAKPOINT): Changed to be byteorder independent.
This commit is contained in:
Steve Chamberlain 1994-11-24 05:59:34 +00:00
parent d2fd61a812
commit 5f2f280941
4 changed files with 65 additions and 58 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

9
gdb/ChangeLog
View File

@ -1,3 +1,12 @@
Wed Nov 23 21:43:03 1994 Steve Chamberlain (sac@jonny.cygnus.com)
* remote-e7000.c (HARD_BREAKPOINTS): Reenable.
(BC_BREAKPOINTS): Disable.
* sh-tdep.c (print_insn): Cope with big and little endian machines.
* sh/sh.mt: Use libsim.a
* sh/tm-sh.h (TARGET_BYTE_ORDER_SELECTABLE): New
(BREAKPOINT): Changed to be byteorder independent.
Tue Nov 22 19:13:39 1994 Stan Shebs (shebs@andros.cygnus.com) Tue Nov 22 19:13:39 1994 Stan Shebs (shebs@andros.cygnus.com)
Maintenance commands to report time and space usage. Maintenance commands to report time and space usage.

8
gdb/config/sh/sh.mt
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@ -1,11 +1,5 @@
# Target: Hitachi Super-H ICE and simulator # Target: Hitachi Super-H ICE and simulator
TDEPFILES= sh-tdep.o remote-sim.o interp.o table.o remote-e7000.o ser-e7kpc.o TDEPFILES= sh-tdep.o remote-sim.o ../sim/sh/libsim.a remote-e7000.o ser-e7kpc.o
over: all over: all
interp.o:
cp ../sim/sh/interp.o .
table.o:
cp ../sim/sh/table.o .
TM_FILE= tm-sh.h TM_FILE= tm-sh.h

7
gdb/config/sh/tm-sh.h
View File

@ -25,7 +25,7 @@ Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
/* Define the bit, byte, and word ordering of the machine. */ /* Define the bit, byte, and word ordering of the machine. */
#define TARGET_BYTE_ORDER BIG_ENDIAN #define TARGET_BYTE_ORDER_SELECTABLE
/* Offset from address of function to start of its code. /* Offset from address of function to start of its code.
@ -58,9 +58,8 @@ extern CORE_ADDR sh_skip_prologue ();
/* Illegal instruction - used by the simulator for breakpoint /* Illegal instruction - used by the simulator for breakpoint
detection */ detection */
#define BREAKPOINT {0xc3, 0xff} /* 0xc3ff is trapa #ff */ #define BREAKPOINT {0xc3, 0xc3} /* 0xc3c3 is trapa #c3, and it works in big
#undef BREAKPOINT and little endian modes */
#define BREAKPOINT {0x00, 0x1b} /* SLEEP */
#define REMOTE_BREAKPOINT { 0xc3, 0x20} #define REMOTE_BREAKPOINT { 0xc3, 0x20}
/* If your kernel resets the pc after the trap happens you may need to /* If your kernel resets the pc after the trap happens you may need to

99
gdb/sh-tdep.c
View File

@ -32,6 +32,8 @@ Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
#include "dis-asm.h" #include "dis-asm.h"
#include "../opcodes/sh-opc.h" #include "../opcodes/sh-opc.h"
/* Prologue looks like /* Prologue looks like
[mov.l <regs>,@-r15]... [mov.l <regs>,@-r15]...
[sts.l pr,@-r15] [sts.l pr,@-r15]
@ -60,10 +62,10 @@ sh_skip_prologue (start_pc)
while (IS_STS (w) while (IS_STS (w)
|| IS_PUSH (w) || IS_PUSH (w)
|| IS_MOV_SP_FP (w) || IS_MOV_SP_FP (w)
|| IS_MOV_R3(w) || IS_MOV_R3 (w)
|| IS_ADD_R3SP(w) || IS_ADD_R3SP (w)
|| IS_ADD_SP(w) || IS_ADD_SP (w)
|| IS_SHLL_R3(w)) || IS_SHLL_R3 (w))
{ {
start_pc += 2; start_pc += 2;
w = read_memory_integer (start_pc, 2); w = read_memory_integer (start_pc, 2);
@ -83,9 +85,11 @@ print_insn (memaddr, stream)
GDB_INIT_DISASSEMBLE_INFO (info, stream); GDB_INIT_DISASSEMBLE_INFO (info, stream);
return print_insn_sh (memaddr, &info); if (TARGET_BYTE_ORDER == BIG_ENDIAN)
return print_insn_sh (memaddr, &info);
else
return print_insn_shl (memaddr, &info);
} }
/* Given a GDB frame, determine the address of the calling function's frame. /* Given a GDB frame, determine the address of the calling function's frame.
This will be used to create a new GDB frame struct, and then This will be used to create a new GDB frame struct, and then
INIT_EXTRA_FRAME_INFO and INIT_FRAME_PC will be called for the new frame. INIT_EXTRA_FRAME_INFO and INIT_FRAME_PC will be called for the new frame.
@ -161,20 +165,20 @@ frame_find_saved_regs (fi, fsr)
} }
else if (IS_MOV_R3 (insn)) else if (IS_MOV_R3 (insn))
{ {
r3_val = (char)(insn & 0xff); r3_val = (char) (insn & 0xff);
pc+=2; pc += 2;
insn = read_memory_integer (pc, 2); insn = read_memory_integer (pc, 2);
} }
else if (IS_SHLL_R3 (insn)) else if (IS_SHLL_R3 (insn))
{ {
r3_val <<=1; r3_val <<= 1;
pc+=2; pc += 2;
insn = read_memory_integer (pc, 2); insn = read_memory_integer (pc, 2);
} }
else if (IS_ADD_R3SP (insn)) else if (IS_ADD_R3SP (insn))
{ {
depth += -r3_val; depth += -r3_val;
pc+=2; pc += 2;
insn = read_memory_integer (pc, 2); insn = read_memory_integer (pc, 2);
} }
else if (IS_ADD_SP (insn)) else if (IS_ADD_SP (insn))
@ -221,17 +225,18 @@ frame_find_saved_regs (fi, fsr)
{ {
fi->return_pc = read_register (PR_REGNUM) + 4; fi->return_pc = read_register (PR_REGNUM) + 4;
} }
else { else
{
if (fsr->regs[PR_REGNUM]) if (fsr->regs[PR_REGNUM])
{ {
fi->return_pc = read_memory_integer (fsr->regs[PR_REGNUM], 4) + 4; fi->return_pc = read_memory_integer (fsr->regs[PR_REGNUM], 4) + 4;
} }
else else
{ {
fi->return_pc = read_register (PR_REGNUM) + 4; fi->return_pc = read_register (PR_REGNUM) + 4;
} }
} }
} }
/* initialize the extra info saved in a FRAME */ /* initialize the extra info saved in a FRAME */
@ -269,7 +274,7 @@ pop_frame ()
} }
} }
write_register (PC_REGNUM, fi->return_pc); write_register (PC_REGNUM, frame->return_pc);
write_register (SP_REGNUM, fp + 4); write_register (SP_REGNUM, fp + 4);
flush_cached_frames (); flush_cached_frames ();
} }
@ -281,31 +286,31 @@ show_regs (args, from_tty)
char *args; char *args;
int from_tty; int from_tty;
{ {
printf_filtered("PC=%08x SR=%08x PR=%08x MACH=%08x MACHL=%08x\n", printf_filtered ("PC=%08x SR=%08x PR=%08x MACH=%08x MACHL=%08x\n",
read_register(PC_REGNUM), read_register (PC_REGNUM),
read_register(SR_REGNUM), read_register (SR_REGNUM),
read_register(PR_REGNUM), read_register (PR_REGNUM),
read_register(MACH_REGNUM), read_register (MACH_REGNUM),
read_register(MACL_REGNUM)); read_register (MACL_REGNUM));
printf_filtered("R0-R7 %08x %08x %08x %08x %08x %08x %08x %08x\n", printf_filtered ("R0-R7 %08x %08x %08x %08x %08x %08x %08x %08x\n",
read_register(0), read_register (0),
read_register(1), read_register (1),
read_register(2), read_register (2),
read_register(3), read_register (3),
read_register(4), read_register (4),
read_register(5), read_register (5),
read_register(6), read_register (6),
read_register(7)); read_register (7));
printf_filtered("R8-R15 %08x %08x %08x %08x %08x %08x %08x %08x\n", printf_filtered ("R8-R15 %08x %08x %08x %08x %08x %08x %08x %08x\n",
read_register(8), read_register (8),
read_register(9), read_register (9),
read_register(10), read_register (10),
read_register(11), read_register (11),
read_register(12), read_register (12),
read_register(13), read_register (13),
read_register(14), read_register (14),
read_register(15)); read_register (15));
} }
@ -320,5 +325,5 @@ _initialize_sh_tdep ()
"Set simulated memory size of simulator target.", &setlist), "Set simulated memory size of simulator target.", &setlist),
&showlist); &showlist);
add_com("regs", class_vars, show_regs, "Print all registers"); add_com ("regs", class_vars, show_regs, "Print all registers");
} }