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* mt-tdep.c (enum mt_gdb_regnums): Add MT_COPRO_PSEUDOREG_ARRAY,
MT_COPRO_PSEUDOREG_DIM_1, MT_COPRO_PSEUDOREG_DIM_2, MT_COPRO_PSEUDOREG_REGS members. Adjust MT_NUM_PSEUDO_REGS. (mt_register_name): Lazily synthesize name for coprocessor pseudo array registers. (mt_copro_register_type): New. Broken out of ... (mt_register_type): ... here. Use it. Deal with coprocessor pseudo array. (mt_select_coprocessor): New. (mt_pseudo_register_read, mt_pseudo_register_write): Deal with coprocessor pseudo array.
This commit is contained in:
Nathan Sidwell
parent
f365de7342
commit
60e81fccbb
@ -1,3 +1,17 @@
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2006-01-16 Nathan Sidwell <nathan@codesourcery.com>
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* mt-tdep.c (enum mt_gdb_regnums): Add MT_COPRO_PSEUDOREG_ARRAY,
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MT_COPRO_PSEUDOREG_DIM_1, MT_COPRO_PSEUDOREG_DIM_2,
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MT_COPRO_PSEUDOREG_REGS members. Adjust MT_NUM_PSEUDO_REGS.
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(mt_register_name): Lazily synthesize name for coprocessor pseudo
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array registers.
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(mt_copro_register_type): New. Broken out of ...
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(mt_register_type): ... here. Use it. Deal with coprocessor
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pseudo array.
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(mt_select_coprocessor): New.
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(mt_pseudo_register_read, mt_pseudo_register_write): Deal with
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coprocessor pseudo array.
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2006-01-16 Andrew Stubbs <andrew.stubbs@st.com>
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* breakpoint.c (insert_breakpoints): Check that a thread exists
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195
gdb/mt-tdep.c
195
gdb/mt-tdep.c
@ -116,9 +116,16 @@ enum mt_gdb_regnums
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/* Pseudo-registers. */
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MT_COPRO_PSEUDOREG_REGNUM = MT_NUM_REGS,
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MT_MAC_PSEUDOREG_REGNUM,
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MT_COPRO_PSEUDOREG_ARRAY,
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MT_COPRO_PSEUDOREG_DIM_1 = 2,
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MT_COPRO_PSEUDOREG_DIM_2 = 8,
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MT_COPRO_PSEUDOREG_REGS = 32,
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/* Two pseudo-regs ('coprocessor' and 'mac'). */
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MT_NUM_PSEUDO_REGS = 2
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MT_NUM_PSEUDO_REGS = 2 + (MT_COPRO_PSEUDOREG_REGS
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* MT_COPRO_PSEUDOREG_DIM_1
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* MT_COPRO_PSEUDOREG_DIM_2)
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};
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/* Return name of register number specified by REGNUM. */
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@ -140,9 +147,89 @@ mt_register_name (int regnum)
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/* Pseudo-registers. */
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"coprocessor", "MAC"
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};
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static const char *array_names[MT_COPRO_PSEUDOREG_REGS
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* MT_COPRO_PSEUDOREG_DIM_1
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* MT_COPRO_PSEUDOREG_DIM_2];
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gdb_assert (regnum >= 0 && regnum < ARRAY_SIZE (register_names));
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if (regnum < 0)
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return "";
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if (regnum < ARRAY_SIZE (register_names))
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return register_names[regnum];
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if (array_names[regnum - MT_COPRO_PSEUDOREG_ARRAY])
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return array_names[regnum - MT_COPRO_PSEUDOREG_ARRAY];
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{
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char *name;
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const char *stub;
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unsigned dim_1;
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unsigned dim_2;
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unsigned index;
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regnum -= MT_COPRO_PSEUDOREG_ARRAY;
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index = regnum % MT_COPRO_PSEUDOREG_REGS;
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dim_2 = (regnum / MT_COPRO_PSEUDOREG_REGS) % MT_COPRO_PSEUDOREG_DIM_2;
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dim_1 = ((regnum / MT_COPRO_PSEUDOREG_REGS / MT_COPRO_PSEUDOREG_DIM_2)
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% MT_COPRO_PSEUDOREG_DIM_1);
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if (index == MT_COPRO_PSEUDOREG_REGS - 1)
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stub = register_names[MT_MAC_PSEUDOREG_REGNUM];
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else if (index > MT_QCHANNEL_REGNUM - MT_CPR0_REGNUM)
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stub = "";
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else
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stub = register_names[index + MT_CPR0_REGNUM];
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if (!*stub)
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{
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array_names[regnum] = stub;
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return stub;
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}
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name = xmalloc (30);
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sprintf (name, "copro_%d_%d_%s", dim_1, dim_2, stub);
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array_names[regnum] = name;
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return name;
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}
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}
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/* Return the type of a coprocessor register. */
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static struct type *
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mt_copro_register_type (struct gdbarch *arch, int regnum)
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{
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switch (regnum)
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{
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case MT_INT_ENABLE_REGNUM:
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case MT_ICHANNEL_REGNUM:
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case MT_QCHANNEL_REGNUM:
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case MT_ISCRAMB_REGNUM:
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case MT_QSCRAMB_REGNUM:
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return builtin_type_int32;
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case MT_BYPA_REGNUM:
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case MT_BYPB_REGNUM:
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case MT_BYPC_REGNUM:
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case MT_Z1_REGNUM:
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case MT_Z2_REGNUM:
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case MT_OUT_REGNUM:
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return builtin_type_int16;
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case MT_EXMAC_REGNUM:
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case MT_MAC_REGNUM:
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return builtin_type_uint32;
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case MT_CONTEXT_REGNUM:
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return builtin_type_long_long;
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case MT_FLAG_REGNUM:
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return builtin_type_unsigned_char;
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default:
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if (regnum >= MT_CPR0_REGNUM && regnum <= MT_CPR15_REGNUM)
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return builtin_type_int16;
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else if (regnum == MT_CPR0_REGNUM + MT_COPRO_PSEUDOREG_REGS - 1)
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{
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if (gdbarch_bfd_arch_info (arch)->mach == bfd_mach_mrisc2
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|| gdbarch_bfd_arch_info (arch)->mach == bfd_mach_ms2)
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return builtin_type_uint64;
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else
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return builtin_type_uint32;
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}
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else
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return builtin_type_uint32;
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}
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}
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/* Given ARCH and a register number specified by REGNUM, return the
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@ -176,40 +263,25 @@ mt_register_type (struct gdbarch *arch, int regnum)
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case MT_SP_REGNUM:
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case MT_FP_REGNUM:
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return void_ptr;
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case MT_INT_ENABLE_REGNUM:
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case MT_ICHANNEL_REGNUM:
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case MT_QCHANNEL_REGNUM:
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case MT_ISCRAMB_REGNUM:
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case MT_QSCRAMB_REGNUM:
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return builtin_type_int32;
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case MT_EXMAC_REGNUM:
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case MT_MAC_REGNUM:
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return builtin_type_uint32;
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case MT_BYPA_REGNUM:
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case MT_BYPB_REGNUM:
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case MT_BYPC_REGNUM:
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case MT_Z1_REGNUM:
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case MT_Z2_REGNUM:
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case MT_OUT_REGNUM:
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return builtin_type_int16;
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case MT_CONTEXT_REGNUM:
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return builtin_type_long_long;
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case MT_COPRO_REGNUM:
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case MT_COPRO_PSEUDOREG_REGNUM:
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return copro_type;
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case MT_MAC_PSEUDOREG_REGNUM:
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if (gdbarch_bfd_arch_info (arch)->mach == bfd_mach_mrisc2
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|| gdbarch_bfd_arch_info (arch)->mach == bfd_mach_ms2)
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return builtin_type_uint64;
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else
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return builtin_type_uint32;
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case MT_FLAG_REGNUM:
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return builtin_type_unsigned_char;
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return mt_copro_register_type (arch,
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MT_CPR0_REGNUM
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+ MT_COPRO_PSEUDOREG_REGS - 1);
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default:
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if (regnum >= MT_R0_REGNUM && regnum <= MT_R15_REGNUM)
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return builtin_type_int32;
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else if (regnum >= MT_CPR0_REGNUM && regnum <= MT_CPR15_REGNUM)
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return builtin_type_int16;
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else if (regnum < MT_COPRO_PSEUDOREG_ARRAY)
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return mt_copro_register_type (arch, regnum);
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else
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{
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regnum -= MT_COPRO_PSEUDOREG_ARRAY;
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regnum %= MT_COPRO_PSEUDOREG_REGS;
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regnum += MT_CPR0_REGNUM;
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return mt_copro_register_type (arch, regnum);
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}
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}
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}
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internal_error (__FILE__, __LINE__,
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@ -379,14 +451,53 @@ mt_breakpoint_from_pc (CORE_ADDR *bp_addr, int *bp_size)
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return ms1_breakpoint;
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}
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/* Select the correct coprocessor register bank. Return the pseudo
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regnum we really want to read. */
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static int
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mt_select_coprocessor (struct gdbarch *gdbarch,
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struct regcache *regcache, int regno)
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{
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unsigned index, base;
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gdb_byte copro[4];
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/* Get the copro pseudo regnum. */
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regcache_raw_read (regcache, MT_COPRO_REGNUM, copro);
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base = (extract_signed_integer (&copro[0], 2) * MT_COPRO_PSEUDOREG_DIM_2
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+ extract_signed_integer (&copro[2], 2));
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regno -= MT_COPRO_PSEUDOREG_ARRAY;
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index = regno % MT_COPRO_PSEUDOREG_REGS;
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regno /= MT_COPRO_PSEUDOREG_REGS;
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if (base != regno)
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{
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/* Select the correct coprocessor register bank. Invalidate the
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coprocessor register cache. */
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unsigned ix;
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store_signed_integer (&copro[0], 2, regno / MT_COPRO_PSEUDOREG_DIM_2);
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store_signed_integer (&copro[2], 2, regno % MT_COPRO_PSEUDOREG_DIM_2);
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regcache_raw_write (regcache, MT_COPRO_REGNUM, copro);
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/* We must flush the cache, as it is now invalid. */
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for (ix = MT_NUM_CPU_REGS; ix != MT_NUM_REGS; ix++)
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set_register_cached (ix, 0);
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}
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return index;
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}
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/* Fetch the pseudo registers:
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There are two pseudo-registers:
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There are two regular pseudo-registers:
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1) The 'coprocessor' pseudo-register (which mirrors the
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"real" coprocessor register sent by the target), and
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2) The 'MAC' pseudo-register (which represents the union
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of the original 32 bit target MAC register and the new
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8-bit extended-MAC register). */
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8-bit extended-MAC register).
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Additionally there is an array of coprocessor registers which track
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the coprocessor registers for each coprocessor. */
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static void
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mt_pseudo_register_read (struct gdbarch *gdbarch,
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@ -416,8 +527,15 @@ mt_pseudo_register_read (struct gdbarch *gdbarch,
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regcache_raw_read (regcache, MT_MAC_REGNUM, buf);
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break;
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default:
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internal_error (__FILE__, __LINE__,
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_("mt_pseudo_register_read: bad reg # (%d)"), regno);
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{
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unsigned index = mt_select_coprocessor (gdbarch, regcache, regno);
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if (index == MT_COPRO_PSEUDOREG_REGS - 1)
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mt_pseudo_register_read (gdbarch, regcache,
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MT_COPRO_PSEUDOREG_REGNUM, buf);
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else if (index < MT_NUM_REGS - MT_CPR0_REGNUM)
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regcache_raw_read (regcache, index + MT_CPR0_REGNUM, buf);
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}
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break;
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}
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}
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@ -463,8 +581,15 @@ mt_pseudo_register_write (struct gdbarch *gdbarch,
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regcache_raw_write (regcache, MT_MAC_REGNUM, buf);
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break;
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default:
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internal_error (__FILE__, __LINE__,
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_("mt_pseudo_register_write: bad reg # (%d)"), regno);
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{
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unsigned index = mt_select_coprocessor (gdbarch, regcache, regno);
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if (index == MT_COPRO_PSEUDOREG_REGS - 1)
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mt_pseudo_register_write (gdbarch, regcache,
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MT_COPRO_PSEUDOREG_REGNUM, buf);
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else if (index < MT_NUM_REGS - MT_CPR0_REGNUM)
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regcache_raw_write (regcache, index + MT_CPR0_REGNUM, buf);
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}
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break;
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}
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}
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