mirror of
https://github.com/darlinghq/darling-gdb.git
synced 2024-11-27 14:00:30 +00:00
For v850eq start up with US bit set.
Let sim_analyze_program determine the architecture. Fix various sanitizations.
This commit is contained in:
Andrew Cagney
parent
9c82b2b805
commit
658303f7d4
@ -40,33 +40,8 @@ Things-to-lose:
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Do-last:
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# NOTE: keep-v850eq keeps all of keep-v850e as well.
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v850e_files="interp.c simops.c v850_sim.h"
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if ( echo $* | grep keep\-v850e > /dev/null ) ; then
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for i in $v850e_files ; do
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if test -r $i && (grep sanitize-v850e $i > /dev/null) ; then
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if [ -n "${verbose}" ] ; then
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echo Keeping v850e stuff in $i
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fi
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fi
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done
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else
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for i in $v850e_files ; do
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if test -r $i && (grep sanitize-v850e $i > /dev/null) ; then
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if [ -n "${verbose}" ] ; then
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echo Removing traces of \"v850e\" from $i...
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fi
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cp $i new
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sed '/start\-sanitize\-v850e/,/end-\sanitize\-v850e/d' < $i > new
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if [ -n "${safe}" -a ! -f .Recover/$i ] ; then
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if [ -n "${verbose}" ] ; then
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echo Caching $i in .Recover...
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fi
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mv $i .Recover
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fi
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mv new $i
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fi
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done
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fi
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if ( echo $* | grep keep\-v850eq > /dev/null ) ; then
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for i in $v850e_files ; do
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if test -r $i && (grep sanitize-v850eq $i > /dev/null) ; then
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@ -93,5 +68,31 @@ else
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fi
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done
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fi
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if ( echo $* | grep keep\-v850e > /dev/null ) ; then
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for i in $v850e_files ; do
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if test -r $i && (grep sanitize-v850e $i > /dev/null) ; then
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if [ -n "${verbose}" ] ; then
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echo Keeping v850e stuff in $i
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fi
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fi
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done
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else
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for i in $v850e_files ; do
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if test -r $i && (grep sanitize-v850e $i > /dev/null) ; then
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if [ -n "${verbose}" ] ; then
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echo Removing traces of \"v850e\" from $i...
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fi
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cp $i new
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sed '/start\-sanitize\-v850e/,/end-\sanitize\-v850e/d' < $i > new
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if [ -n "${safe}" -a ! -f .Recover/$i ] ; then
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if [ -n "${verbose}" ] ; then
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echo Caching $i in .Recover...
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fi
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mv $i .Recover
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fi
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mv new $i
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fi
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done
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fi
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# End of file.
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@ -1,3 +1,32 @@
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Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
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start-sanitize-v850eq
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* interp.c (sim_create_inferior): For v850eq set US bit by
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default.
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end-sanitize-v850eq
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start-sanitize-v850e
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* interp.c (sim_open): Don't set arch, now set by
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sim_analyze_program.
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end-sanitize-v850e
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* configure: Regenerated to track ../common/aclocal.m4 changes.
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Mon Sep 15 14:39:34 1997 Andrew Cagney <cagney@b1.cygnus.com>
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* simops.c (op_types): Move from here.
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sim-main.h: To here.
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* sim-main.h (trace_input, trace_output), simops.c: Make global.
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* simops.c (OP_60): Move "jmp" code from here.
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* v850.igen (jmp): To here.
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start-sanitize-v850eq
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* simops.c (OP_60): Move "sld.bu" code from here.
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* v850.igen (sld.bu): To here.
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end-sanitize-v850eq
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Fri Sep 12 15:11:03 1997 Andrew Cagney <cagney@b1.cygnus.com>
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start-sanitize-v850eq
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@ -233,12 +233,6 @@ sim_open (kind, cb, abfd, argv)
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STATE_WATCHPOINTS (sd)->sizeof_pc = sizeof (PC);
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STATE_WATCHPOINTS (sd)->interrupt_handler = do_interrupt;
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STATE_WATCHPOINTS (sd)->interrupt_names = interrupt_names;
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/* start-sanitize-v850e */
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STATE_ARCHITECTURE (sd) = bfd_lookup_arch (bfd_arch_v850, bfd_mach_v850e);
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/* end-sanitize-v850e */
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/* start-sanitize-v850eq */
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STATE_ARCHITECTURE (sd) = bfd_lookup_arch (bfd_arch_v850, bfd_mach_v850eq);
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/* end-sanitize-v850eq */
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if (sim_pre_argv_init (sd, argv[0]) != SIM_RC_OK)
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return 0;
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@ -409,6 +403,13 @@ sim_create_inferior (sd, prog_bfd, argv, env)
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memset (&State, 0, sizeof (State));
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if (prog_bfd != NULL)
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PC = bfd_get_start_address (prog_bfd);
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/* start-sanitize-v850eq */
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/* For v850eq, set PSW[US] by default */
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if (STATE_ARCHITECTURE (sd) != NULL
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&& STATE_ARCHITECTURE (sd)->arch == bfd_arch_v850
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&& STATE_ARCHITECTURE (sd)->mach == bfd_mach_v850eq)
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PSW |= PSW_US;
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/* end-sanitize-v850eq */
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return SIM_RC_OK;
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}
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@ -136,6 +136,9 @@ extern struct simops Simops[];
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#define CTBP (State.sregs[20])
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/* end-sanitize-v850e */
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/* start-sanitize-v850eq */
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#define PSW_US BIT32 (8)
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/* end-sanitize-v850eq */
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#define PSW_NP 0x80
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#define PSW_EP 0x40
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#define PSW_ID 0x20
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@ -208,4 +211,53 @@ sim_core_read_unaligned_##LEN (STATE_CPU (simulator, 0), \
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sim_core_write_unaligned_##LEN (STATE_CPU (simulator, 0), \
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PC, sim_core_write_map, (ADDR), (DATA))
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/* Debug/tracing calls */
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enum op_types
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{
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OP_UNKNOWN,
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OP_NONE,
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OP_TRAP,
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OP_REG,
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OP_REG_REG,
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OP_REG_REG_CMP,
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OP_REG_REG_MOVE,
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OP_IMM_REG,
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OP_IMM_REG_CMP,
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OP_IMM_REG_MOVE,
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OP_COND_BR,
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OP_LOAD16,
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OP_STORE16,
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OP_LOAD32,
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OP_STORE32,
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OP_JUMP,
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OP_IMM_REG_REG,
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OP_UIMM_REG_REG,
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OP_BIT,
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OP_EX1,
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OP_EX2,
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OP_LDSR,
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OP_STSR,
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/* start-sanitize-v850e */
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OP_BIT_CHANGE,
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OP_REG_REG_REG,
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OP_REG_REG3,
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/* end-sanitize-v850e */
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/* start-sanitize-v850eq */
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OP_IMM_REG_REG_REG,
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OP_PUSHPOP1,
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OP_PUSHPOP2,
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OP_PUSHPOP3,
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/* end-sanitize-v850eq */
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};
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#ifdef DEBUG
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void trace_input PARAMS ((char *name, enum op_types type, int size));
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void trace_output PARAMS ((enum op_types result));
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#else
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#define trace_input(NAME, IN1, IN2)
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#define trace_output(RESULT)
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#endif
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#include "simops.h"
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@ -41,44 +41,6 @@
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#include <sys/time.h>
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#endif
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enum op_types
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{
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OP_UNKNOWN,
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OP_NONE,
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OP_TRAP,
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OP_REG,
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OP_REG_REG,
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OP_REG_REG_CMP,
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OP_REG_REG_MOVE,
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OP_IMM_REG,
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OP_IMM_REG_CMP,
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OP_IMM_REG_MOVE,
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OP_COND_BR,
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OP_LOAD16,
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OP_STORE16,
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OP_LOAD32,
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OP_STORE32,
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OP_JUMP,
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OP_IMM_REG_REG,
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OP_UIMM_REG_REG,
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OP_BIT,
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OP_EX1,
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OP_EX2,
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OP_LDSR,
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OP_STSR,
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/* start-sanitize-v850e */
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OP_BIT_CHANGE,
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OP_REG_REG_REG,
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OP_REG_REG3,
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/* end-sanitize-v850e */
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/* start-sanitize-v850eq */
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OP_IMM_REG_REG_REG,
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OP_PUSHPOP1,
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OP_PUSHPOP2,
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OP_PUSHPOP3,
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/* end-sanitize-v850eq */
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};
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/* start-sanitize-v850e */
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/* This is an array of the bit positions of registers r20 .. r31 in that order in a prepare/dispose instruction. */
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static int type1_regs[12] = { 27, 26, 25, 24, 31, 30, 29, 28, 23, 22, 0, 21 };
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@ -91,9 +53,6 @@ static int type3_regs[15] = { 2, 1, 0, 27, 26, 25, 24, 31, 30, 29, 28, 23, 22, 2
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/* end-sanitize-v850eq */
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#ifdef DEBUG
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static void trace_input PARAMS ((char *name, enum op_types type, int size));
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static void trace_output PARAMS ((enum op_types result));
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#ifndef SIZE_INSTRUCTION
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#define SIZE_INSTRUCTION 6
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#endif
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@ -111,7 +70,7 @@ static void trace_output PARAMS ((enum op_types result));
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#endif
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static void
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void
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trace_input (name, type, size)
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char *name;
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enum op_types type;
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@ -173,148 +132,6 @@ trace_input (name, type, size)
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SIZE_LOCATION, SIZE_LOCATION, buf,
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SIZE_INSTRUCTION, name);
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#if 0
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switch (type)
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{
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default:
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case OP_UNKNOWN:
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case OP_NONE:
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strcpy (buf, "unknown");
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break;
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case OP_TRAP:
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sprintf (buf, "%ld", OP[0]);
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break;
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case OP_REG:
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sprintf (buf, "r%ld", OP[0]);
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break;
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case OP_REG_REG:
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case OP_REG_REG_CMP:
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case OP_REG_REG_MOVE:
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sprintf (buf, "r%ld,r%ld", OP[0], OP[1]);
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break;
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case OP_IMM_REG:
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case OP_IMM_REG_CMP:
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case OP_IMM_REG_MOVE:
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sprintf (buf, "%ld,r%ld", OP[0], OP[1]);
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break;
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case OP_COND_BR:
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sprintf (buf, "%ld", SEXT9 (OP[0]));
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break;
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case OP_LOAD16:
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sprintf (buf, "%ld[r30],r%ld", OP[1] * size, OP[0]);
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break;
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case OP_STORE16:
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sprintf (buf, "r%ld,%ld[r30]", OP[0], OP[1] * size);
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break;
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case OP_LOAD32:
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sprintf (buf, "%ld[r%ld],r%ld", EXTEND16 (OP[2]) & ~0x1, OP[0], OP[1]);
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break;
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case OP_STORE32:
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sprintf (buf, "r%ld,%ld[r%ld]", OP[1], EXTEND16 (OP[2] & ~0x1), OP[0]);
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break;
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case OP_JUMP:
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sprintf (buf, "%ld,r%ld", SEXT22 (OP[0]), OP[1]);
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break;
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case OP_IMM_REG_REG:
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sprintf (buf, "%ld,r%ld,r%ld", EXTEND16 (OP[0]), OP[1], OP[2]);
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break;
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case OP_UIMM_REG_REG:
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sprintf (buf, "%ld,r%ld,r%ld", OP[0] & 0xffff, OP[1], OP[2]);
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break;
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case OP_BIT:
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sprintf (buf, "%ld,%ld[r%ld]", OP[1] & 0x7, EXTEND16 (OP[2]), OP[0]);
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break;
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case OP_EX1:
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{
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char *cond;
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switch (OP[0] & 0xf)
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{
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default: cond = "?"; break;
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case 0x0: cond = "v"; break;
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case 0x1: cond = "c"; break;
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case 0x2: cond = "z"; break;
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case 0x3: cond = "nh"; break;
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case 0x4: cond = "s"; break;
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case 0x5: cond = "t"; break;
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case 0x6: cond = "lt"; break;
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case 0x7: cond = "le"; break;
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case 0x8: cond = "nv"; break;
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case 0x9: cond = "nc"; break;
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case 0xa: cond = "nz"; break;
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case 0xb: cond = "h"; break;
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case 0xc: cond = "ns"; break;
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case 0xd: cond = "sa"; break;
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case 0xe: cond = "ge"; break;
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case 0xf: cond = "gt"; break;
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}
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sprintf (buf, "%s,r%ld", cond, OP[1]);
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break;
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}
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case OP_EX2:
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strcpy (buf, "EX2");
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break;
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case OP_LDSR:
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case OP_STSR:
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sprintf (buf, "r%ld,s%ld", OP[0], OP[1]);
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break;
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case OP_PUSHPOP1:
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for (i = 0; i < 12; i++)
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if (OP[3] & (1 << type1_regs[i]))
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sprintf (strchr (buf, 0), "r%d ", i + 20);
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break;
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case OP_PUSHPOP2:
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for (i = 0; i < 16; i++)
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if (OP[3] & (1 << type2_regs[i]))
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sprintf (strchr (buf, 0), "r%d ", i + 16);
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if (OP[3] & (1 << 19))
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strcat (buf, "F/EIPC, F/EIPSW " );
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break;
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case OP_PUSHPOP3:
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for (i = 0; i < 15; i++)
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if (OP[3] & (1 << type3_regs[i]))
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sprintf (strchr (buf, 0), "r%d ", i + 1);
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if (OP[3] & (1 << 3))
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strcat (buf, "PSW " );
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if (OP[3] & (1 << 19))
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strcat (buf, "F/EIPC, F/EIPSW " );
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break;
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case OP_BIT_CHANGE:
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sprintf (buf, "r%ld, [r%ld]", OP[1], OP[0] );
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break;
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}
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#endif
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if (!TRACE_ALU_P (STATE_CPU (simulator, 0)))
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{
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trace_printf (simulator, STATE_CPU (simulator, 0),
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"%s\n", buf);
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}
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else
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{
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#if 0
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trace_printf (simulator, STATE_CPU (simulator, 0),
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"%-*s", SIZE_OPERANDS, buf);
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#endif
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switch (type)
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{
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default:
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@ -330,7 +147,9 @@ trace_input (name, type, size)
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num_values = 1;
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break;
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/* start-sanitize-v850e */
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case OP_BIT_CHANGE:
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/* end-sanitize-v850e */
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case OP_REG_REG:
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case OP_REG_REG_CMP:
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values[0] = State.regs[OP[1]];
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@ -431,10 +250,9 @@ trace_input (name, type, size)
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while (i++ < 3)
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trace_printf (simulator, STATE_CPU (simulator, 0),
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"%*s", SIZE_VALUES, "");
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}
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}
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static void
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void
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trace_output (result)
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enum op_types result;
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{
|
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@ -495,12 +313,6 @@ trace_output (result)
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}
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}
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#else
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#define trace_input(NAME, IN1, IN2)
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#define trace_output(RESULT)
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/* #define trace_input(NAME, IN1, IN2) fprintf (stderr, NAME "\n" ); */
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#endif
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@ -532,6 +344,7 @@ condition_met (unsigned code)
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return 1;
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}
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/* start-sanitize-v850e */
|
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|
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static unsigned long
|
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Add32 (unsigned long a1, unsigned long a2, int * carry)
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@ -605,6 +418,7 @@ Multiply64 (boolean sign, unsigned long op0)
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return;
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}
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/* end-sanitize-v850e */
|
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/* Read a null terminated string from memory, return in a buffer */
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static char *
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@ -982,49 +796,6 @@ OP_58F ()
|
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return branch (15);
|
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}
|
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|
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/* jmp [reg1] */
|
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/* sld.bu disp4[ep], reg2 */
|
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int
|
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OP_60 ()
|
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{
|
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if (OP[1] == 0)
|
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{
|
||||
trace_input ("jmp", OP_REG, 0);
|
||||
|
||||
PC = State.regs[ OP[0] ];
|
||||
|
||||
trace_output (OP_REG);
|
||||
|
||||
return 0; /* Add nothing to the PC, we have already done it. */
|
||||
}
|
||||
/* start-sanitize-v850e */
|
||||
else
|
||||
{
|
||||
unsigned long result;
|
||||
|
||||
result = load_mem (State.regs[30] + (OP[3] & 0xf), 1);
|
||||
|
||||
/* start-sanitize-v850eq */
|
||||
#ifdef ARCH_v850eq
|
||||
trace_input ("sld.b", OP_LOAD16, 1);
|
||||
|
||||
State.regs[ OP[1] ] = EXTEND8 (result);
|
||||
#else
|
||||
/* end-sanitize-v850eq */
|
||||
trace_input ("sld.bu", OP_LOAD16, 1);
|
||||
|
||||
State.regs[ OP[1] ] = result;
|
||||
/* start-sanitize-v850eq */
|
||||
#endif
|
||||
/* end-sanitize-v850eq */
|
||||
|
||||
trace_output (OP_LOAD16);
|
||||
|
||||
return 2;
|
||||
}
|
||||
/* end-sanitize-v850e */
|
||||
}
|
||||
|
||||
/* jarl/jr disp22, reg */
|
||||
int
|
||||
OP_780 ()
|
||||
@ -2579,6 +2350,7 @@ OP_4007E0 ()
|
||||
return 4;
|
||||
}
|
||||
|
||||
/* start-sanitize-v850e */
|
||||
/* tst1 reg2, [reg1] */
|
||||
int
|
||||
OP_E607E0 (void)
|
||||
@ -2598,6 +2370,8 @@ OP_E607E0 (void)
|
||||
return 4;
|
||||
}
|
||||
|
||||
/* end-sanitize-v850e */
|
||||
/* start-sanitize-v850e */
|
||||
/* mulu reg1, reg2, reg3 */
|
||||
int
|
||||
OP_22207E0 (void)
|
||||
@ -2611,6 +2385,7 @@ OP_22207E0 (void)
|
||||
return 4;
|
||||
}
|
||||
|
||||
/* end-sanitize-v850e */
|
||||
/* start-sanitize-v850e */
|
||||
|
||||
#define BIT_CHANGE_OP( name, binop ) \
|
||||
@ -2667,7 +2442,6 @@ OP_20007E0 (void)
|
||||
return 4;
|
||||
}
|
||||
/* end-sanitize-v850e */
|
||||
|
||||
/* start-sanitize-v850eq */
|
||||
/* This function is courtesy of Sugimoto at NEC, via Seow Tan (Soew_Tan@el.nec.com) */
|
||||
static void
|
||||
@ -2982,8 +2756,8 @@ OP_18007E0 (void)
|
||||
|
||||
return 4;
|
||||
}
|
||||
/* end-sanitize-v850eq */
|
||||
|
||||
/* end-sanitize-v850eq */
|
||||
/* start-sanitize-v850e */
|
||||
/* divu reg1, reg2, reg3 */
|
||||
int
|
||||
@ -3054,6 +2828,8 @@ OP_2C207E0 (void)
|
||||
return 4;
|
||||
}
|
||||
|
||||
/* end-sanitize-v850e */
|
||||
/* start-sanitize-v850e */
|
||||
/* div reg1, reg2, reg3 */
|
||||
int
|
||||
OP_2C007E0 (void)
|
||||
@ -3123,6 +2899,8 @@ OP_2C007E0 (void)
|
||||
return 4;
|
||||
}
|
||||
|
||||
/* end-sanitize-v850e */
|
||||
/* start-sanitize-v850e */
|
||||
/* divhu reg1, reg2, reg3 */
|
||||
int
|
||||
OP_28207E0 (void)
|
||||
@ -3192,6 +2970,8 @@ OP_28207E0 (void)
|
||||
return 4;
|
||||
}
|
||||
|
||||
/* end-sanitize-v850e */
|
||||
/* start-sanitize-v850e */
|
||||
/* divh reg1, reg2, reg3 */
|
||||
int
|
||||
OP_28007E0 (void)
|
||||
@ -3261,6 +3041,8 @@ OP_28007E0 (void)
|
||||
return 4;
|
||||
}
|
||||
|
||||
/* end-sanitize-v850e */
|
||||
/* start-sanitize-v850e */
|
||||
/* mulu imm9, reg2, reg3 */
|
||||
int
|
||||
OP_24207E0 (void)
|
||||
@ -3274,6 +3056,8 @@ OP_24207E0 (void)
|
||||
return 4;
|
||||
}
|
||||
|
||||
/* end-sanitize-v850e */
|
||||
/* start-sanitize-v850e */
|
||||
/* mul imm9, reg2, reg3 */
|
||||
int
|
||||
OP_24007E0 (void)
|
||||
@ -3287,6 +3071,8 @@ OP_24007E0 (void)
|
||||
return 4;
|
||||
}
|
||||
|
||||
/* end-sanitize-v850e */
|
||||
/* start-sanitize-v850e */
|
||||
/* cmov imm5, reg2, reg3 */
|
||||
int
|
||||
OP_30007E0 (void)
|
||||
@ -3301,6 +3087,8 @@ OP_30007E0 (void)
|
||||
|
||||
}
|
||||
|
||||
/* end-sanitize-v850e */
|
||||
/* start-sanitize-v850e */
|
||||
/* ctret */
|
||||
int
|
||||
OP_14407E0 (void)
|
||||
@ -3315,6 +3103,8 @@ OP_14407E0 (void)
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* end-sanitize-v850e */
|
||||
/* start-sanitize-v850e */
|
||||
/* hsw */
|
||||
int
|
||||
OP_34407E0 (void)
|
||||
@ -3340,6 +3130,8 @@ OP_34407E0 (void)
|
||||
return 4;
|
||||
}
|
||||
|
||||
/* end-sanitize-v850e */
|
||||
/* start-sanitize-v850e */
|
||||
#define WORDHASNULLBYTE(x) (((x) - 0x01010101) & ~(x)&0x80808080)
|
||||
|
||||
/* bsw */
|
||||
@ -3369,6 +3161,8 @@ OP_34007E0 (void)
|
||||
return 4;
|
||||
}
|
||||
|
||||
/* end-sanitize-v850e */
|
||||
/* start-sanitize-v850e */
|
||||
/* bsh */
|
||||
int
|
||||
OP_34207E0 (void)
|
||||
@ -3395,6 +3189,8 @@ OP_34207E0 (void)
|
||||
return 4;
|
||||
}
|
||||
|
||||
/* end-sanitize-v850e */
|
||||
/* start-sanitize-v850e */
|
||||
/* pushml list18 */
|
||||
/* ld.hu */
|
||||
int
|
||||
@ -3456,6 +3252,8 @@ OP_107E0 (void)
|
||||
return 4;
|
||||
}
|
||||
|
||||
/* end-sanitize-v850e */
|
||||
/* start-sanitize-v850e */
|
||||
/* prepare list12, imm5 */
|
||||
/* ld.bu */
|
||||
int
|
||||
@ -3596,6 +3394,8 @@ OP_30780 (void)
|
||||
return 4;
|
||||
}
|
||||
|
||||
/* end-sanitize-v850e */
|
||||
/* start-sanitize-v850e */
|
||||
/* sld.hu */
|
||||
int
|
||||
OP_70 (void)
|
||||
@ -3623,6 +3423,8 @@ OP_70 (void)
|
||||
return 2;
|
||||
}
|
||||
|
||||
/* end-sanitize-v850e */
|
||||
/* start-sanitize-v850e */
|
||||
/* cmov reg1, reg2, reg3 */
|
||||
int
|
||||
OP_32007E0 (void)
|
||||
@ -3636,6 +3438,8 @@ OP_32007E0 (void)
|
||||
return 4;
|
||||
}
|
||||
|
||||
/* end-sanitize-v850e */
|
||||
/* start-sanitize-v850e */
|
||||
/* mul reg1, reg2, reg3 */
|
||||
int
|
||||
OP_22007E0 (void)
|
||||
|
||||
@ -455,7 +455,10 @@ rrrrr!0,11110,dddddd + ddddddddddddddd,0:V:::jarl
|
||||
00000000011,RRRRR:I:::jmp
|
||||
"jmp [r<reg1>]"
|
||||
{
|
||||
COMPAT_1 (OP_60 ());
|
||||
COMPAT_1 (0);
|
||||
trace_input ("jmp", OP_REG, 0);
|
||||
nia = State.regs[ reg1 ];
|
||||
trace_output (OP_REG);
|
||||
}
|
||||
|
||||
|
||||
@ -884,18 +887,39 @@ rrrrr,1010,dddddd,0:IV:::sld.w
|
||||
COMPAT_1 (OP_500 ());
|
||||
}
|
||||
|
||||
// start-sanitize-v850e
|
||||
rrrrr!0,0000110,dddd:IV:::sld.bu
|
||||
"sld.bu <disp4>[ep], r<reg2>"
|
||||
{
|
||||
COMPAT_1 (OP_60 ());
|
||||
unsigned long result;
|
||||
|
||||
COMPAT_1 (0);
|
||||
result = load_mem (State.regs[30] + disp4, 1);
|
||||
|
||||
/* start-sanitize-v850eq */
|
||||
if (PSW & PSW_US) {
|
||||
trace_input ("sld.b", OP_LOAD16, 1);
|
||||
|
||||
State.regs[ reg2 ] = EXTEND8 (result);
|
||||
} else {
|
||||
/* end-sanitize-v850eq */
|
||||
trace_input ("sld.bu", OP_LOAD16, 1);
|
||||
State.regs[ reg2 ] = result;
|
||||
/* start-sanitize-v850eq */
|
||||
}
|
||||
/* end-sanitize-v850eq */
|
||||
trace_output (OP_LOAD16);
|
||||
}
|
||||
|
||||
// end-sanitize-v850e
|
||||
// start-sanitize-v850e
|
||||
rrrrr!0,0000111,dddd:IV:::sld.hu
|
||||
"sld.hu <disp5>[ep], r<reg2>"
|
||||
{
|
||||
COMPAT_1 (OP_70 ());
|
||||
}
|
||||
|
||||
// end-sanitize-v850e
|
||||
|
||||
|
||||
// SST
|
||||
|
||||
Loading…
Reference in New Issue
Block a user