mirror of
https://github.com/darlinghq/darling-gdb.git
synced 2024-12-03 01:30:50 +00:00
2009-04-09 Catherine Moore <clm@codesourcery.com>
* config/tc-mips.c (mips_fix_24k): Declare. (check_for_24k_errata): New. (mips_cleanup): Call check_for_24k_errata. (start_noreorder): Likewise. (md_mips_end): Likewise. (s_change_sec): Likewise. (s_change_section): Likewise. (append_insn): Call check_for_24k_errata. Prevent ERET/DERET instructions from being moved into delay slots. (OPTION_FIX_24K): New. (OPTION_NO_FIX_24k) New. (md_longopts): Add "mfix-24k" and "mno-fix-24k". (md_parse_option): Handle fix-24k options. (md_show_usage): Display fix-24k options. * doc/c-mips.texi: Document. * testsuite/gas/mips/mips.exp: Run new tests. * testsuite/gas/mips/eret.s: New test. * testsuite/gas/mips/eret.d: New test output. * testsuite/gas/mips/eret.l: New test output.
This commit is contained in:
parent
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commit
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@ -1,3 +1,26 @@
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2009-04-09 Catherine Moore <clm@codesourcery.com>
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* config/tc-mips.c (mips_fix_24k): Declare.
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(check_for_24k_errata): New.
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(mips_cleanup): Call check_for_24k_errata.
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(start_noreorder): Likewise.
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(md_mips_end): Likewise.
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(s_change_sec): Likewise.
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(s_change_section): Likewise.
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(append_insn): Call check_for_24k_errata. Prevent
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ERET/DERET instructions from being moved into delay
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slots.
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(OPTION_FIX_24K): New.
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(OPTION_NO_FIX_24k) New.
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(md_longopts): Add "mfix-24k" and "mno-fix-24k".
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(md_parse_option): Handle fix-24k options.
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(md_show_usage): Display fix-24k options.
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* doc/c-mips.texi: Document.
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* testsuite/gas/mips/mips.exp: Run new tests.
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* testsuite/gas/mips/eret.s: New test.
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* testsuite/gas/mips/eret.d: New test output.
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* testsuite/gas/mips/eret.l: New test output.
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2009-04-09 Adam Nemet <anemet@caviumnetworks.com>
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* config/tc-mips.c (mips_dwarf2_addr_size): Use HAVE_64BIT_OBJECTS
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@ -760,6 +760,9 @@ static int mips_fix_vr4120;
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/* ...likewise -mfix-vr4130. */
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static int mips_fix_vr4130;
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/* ...likewise -mfix-24k. */
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static int mips_fix_24k;
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/* We don't relax branches by default, since this causes us to expand
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`la .l2 - .l1' if there's a branch between .l1 and .l2, because we
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fail to compute the offset before expanding the macro to the most
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@ -1789,6 +1792,85 @@ reg_lookup (char **s, unsigned int types, unsigned int *regnop)
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return reg >= 0;
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}
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#define INSN_ERET 0x42000018
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#define INSN_DERET 0x4200001f
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/* Implement the ERET/DERET Errata for MIPS 24k.
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If an ERET/DERET is encountered in a noreorder block,
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warn if the ERET/DERET is followed by a branch instruction.
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Also warn if the ERET/DERET is the last instruction in the
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noreorder block.
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IF an ERET/DERET is in a reorder block and is followed by a
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branch instruction, insert a nop. */
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static void
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check_for_24k_errata (struct mips_cl_insn *insn, int eret_ndx)
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{
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bfd_boolean next_insn_is_branch = FALSE;
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/* eret_ndx will be -1 for the last instruction in a section
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and the ERET/DERET will be in insn, not history. */
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if (insn
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&& eret_ndx == -1
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&& (insn->insn_opcode == INSN_ERET
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|| insn->insn_opcode == INSN_DERET)
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&& insn->noreorder_p)
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{
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as_warn (_("ERET and DERET must be followed by a NOP on the 24K."));
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return;
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}
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if (history[eret_ndx].insn_opcode != INSN_ERET
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&& history[eret_ndx].insn_opcode != INSN_DERET)
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return;
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if (!insn)
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{
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if (history[eret_ndx].noreorder_p)
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as_warn (_("ERET and DERET must be followed by a NOP on the 24K."));
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return;
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}
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next_insn_is_branch = ((insn->insn_opcode == INSN_ERET)
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|| (insn->insn_opcode == INSN_DERET)
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|| (insn->insn_mo->pinfo
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& (INSN_UNCOND_BRANCH_DELAY
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| INSN_COND_BRANCH_DELAY
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| INSN_COND_BRANCH_LIKELY)));
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if (next_insn_is_branch && history[eret_ndx].noreorder_p)
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{
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as_warn (_("ERET and DERET must be followed by a NOP on the 24K."));
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return;
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}
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/* Emit nop if the next instruction is a branch. */
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if (next_insn_is_branch)
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{
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long nop_where, br_where;
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struct frag *nop_frag, *br_frag;
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struct mips_cl_insn br_insn, nop_insn;
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emit_nop ();
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nop_insn = history[eret_ndx - 1];
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nop_frag = history[eret_ndx - 1].frag;
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nop_where = history[eret_ndx - 1].where;
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br_insn = history[eret_ndx];
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br_frag = history[eret_ndx].frag;
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br_where = history[eret_ndx].where;
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move_insn (&nop_insn, br_frag, br_where);
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move_insn (&br_insn, nop_frag, nop_where);
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history[eret_ndx-1] = br_insn;
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history[eret_ndx] = nop_insn;
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}
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}
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/* Return TRUE if opcode MO is valid on the currently selected ISA and
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architecture. If EXPANSIONP is TRUE then this check is done while
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expanding a macro. Use is_opcode_valid_16 for MIPS16 opcodes. */
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@ -2074,6 +2156,9 @@ md_begin (void)
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void
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md_mips_end (void)
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{
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if (mips_fix_24k)
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check_for_24k_errata ((struct mips_cl_insn *) &history[0], -1);
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if (! ECOFF_DEBUGGING)
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md_obj_end ();
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}
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@ -2705,6 +2790,7 @@ append_insn (struct mips_cl_insn *ip, expressionS *address_expr,
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bfd_reloc_code_real_type *reloc_type)
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{
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unsigned long prev_pinfo, pinfo;
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int hndx_24k = 0;
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relax_stateT prev_insn_frag_type = 0;
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bfd_boolean relaxed_branch = FALSE;
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segment_info_type *si = seg_info (now_seg);
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@ -3238,7 +3324,11 @@ append_insn (struct mips_cl_insn *ip, expressionS *address_expr,
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|| (mips_opts.mips16 && history[0].fixp[0])
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/* If the previous instruction is a sync, sync.l, or
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sync.p, we can not swap. */
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|| (prev_pinfo & INSN_SYNC))
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|| (prev_pinfo & INSN_SYNC)
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/* If the previous instruction is an ERET or
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DERET, avoid the swap. */
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|| (history[0].insn_opcode == INSN_ERET)
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|| (history[0].insn_opcode == INSN_DERET))
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{
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if (mips_opts.mips16
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&& (pinfo & INSN_UNCOND_BRANCH_DELAY)
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@ -3258,6 +3348,8 @@ append_insn (struct mips_cl_insn *ip, expressionS *address_expr,
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slot, and bump the destination address. */
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insert_into_history (0, 1, ip);
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emit_nop ();
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if (mips_fix_24k)
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hndx_24k++;
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}
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if (mips_relax.sequence)
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@ -3297,7 +3389,14 @@ append_insn (struct mips_cl_insn *ip, expressionS *address_expr,
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/* If that was an unconditional branch, forget the previous
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insn information. */
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if (pinfo & INSN_UNCOND_BRANCH_DELAY)
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mips_no_prev_insn ();
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{
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/* Check for eret/deret before clearing history. */
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if (mips_fix_24k)
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check_for_24k_errata (
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(struct mips_cl_insn *) &history[hndx_24k],
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hndx_24k+1);
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mips_no_prev_insn ();
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}
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}
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else if (pinfo & INSN_COND_BRANCH_LIKELY)
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{
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@ -3307,6 +3406,8 @@ append_insn (struct mips_cl_insn *ip, expressionS *address_expr,
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the next instruction. */
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insert_into_history (0, 1, ip);
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emit_nop ();
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if (mips_fix_24k)
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hndx_24k++;
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}
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else
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insert_into_history (0, 1, ip);
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@ -3314,6 +3415,10 @@ append_insn (struct mips_cl_insn *ip, expressionS *address_expr,
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else
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insert_into_history (0, 1, ip);
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if (mips_fix_24k)
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check_for_24k_errata ((struct mips_cl_insn *) &history[hndx_24k],
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hndx_24k+1);
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/* We just output an insn, so the next one doesn't have a label. */
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mips_clear_insn_labels ();
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}
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@ -3400,6 +3505,9 @@ start_noreorder (void)
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static void
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end_noreorder (void)
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{
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if (mips_fix_24k)
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check_for_24k_errata (NULL, 0);
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mips_opts.noreorder--;
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if (mips_opts.noreorder == 0 && prev_nop_frag != NULL)
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{
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@ -11175,7 +11283,9 @@ enum options
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OPTION_M3900,
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OPTION_NO_M3900,
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OPTION_M7000_HILO_FIX,
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OPTION_MNO_7000_HILO_FIX,
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OPTION_MNO_7000_HILO_FIX,
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OPTION_FIX_24K,
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OPTION_NO_FIX_24K,
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OPTION_FIX_VR4120,
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OPTION_NO_FIX_VR4120,
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OPTION_FIX_VR4130,
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@ -11268,6 +11378,8 @@ struct option md_longopts[] =
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{"mno-fix-vr4120", no_argument, NULL, OPTION_NO_FIX_VR4120},
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{"mfix-vr4130", no_argument, NULL, OPTION_FIX_VR4130},
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{"mno-fix-vr4130", no_argument, NULL, OPTION_NO_FIX_VR4130},
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{"mfix-24k", no_argument, NULL, OPTION_FIX_24K},
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{"mno-fix-24k", no_argument, NULL, OPTION_NO_FIX_24K},
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/* Miscellaneous options. */
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{"trap", no_argument, NULL, OPTION_TRAP},
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@ -11521,6 +11633,14 @@ md_parse_option (int c, char *arg)
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mips_opts.ase_smartmips = 0;
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break;
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case OPTION_FIX_24K:
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mips_fix_24k = 1;
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break;
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case OPTION_NO_FIX_24K:
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mips_fix_24k = 0;
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break;
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case OPTION_FIX_VR4120:
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mips_fix_vr4120 = 1;
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break;
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@ -12468,6 +12588,10 @@ s_change_sec (int sec)
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#endif
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mips_emit_delays ();
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if (mips_fix_24k)
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check_for_24k_errata ((struct mips_cl_insn *) &history[0], -1);
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switch (sec)
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{
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case 't':
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@ -12526,6 +12650,9 @@ s_change_section (int ignore ATTRIBUTE_UNUSED)
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if (!IS_ELF)
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return;
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if (mips_fix_24k)
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check_for_24k_errata ((struct mips_cl_insn *) &history[0], -1);
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section_name = input_line_pointer;
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c = get_symbol_end ();
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if (c)
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@ -15457,6 +15584,7 @@ MIPS options:\n\
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fprintf (stream, _("\
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-mfix-vr4120 work around certain VR4120 errata\n\
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-mfix-vr4130 work around VR4130 mflo/mfhi errata\n\
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-mfix-24k insert a nop after ERET and DERET instructions\n\
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-mgp32 use 32-bit GPRs, regardless of the chosen ISA\n\
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-mfp32 use 32-bit FPRs, regardless of the chosen ISA\n\
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-msym32 assume all symbols have 32-bit values\n\
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@ -182,6 +182,10 @@ all problems in hand-written assembler code.
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@itemx -no-mfix-vr4130
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Insert nops to work around the VR4130 @samp{mflo}/@samp{mfhi} errata.
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@item -mfix-24k
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@itemx -no-mfix-24k
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Insert nops to work around the 24K @samp{eret}/@samp{deret} errata.
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@item -m4010
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@itemx -no-m4010
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Generate code for the LSI @sc{r4010} chip. This tells the assembler to
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41
gas/testsuite/gas/mips/eret.d
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41
gas/testsuite/gas/mips/eret.d
Normal file
@ -0,0 +1,41 @@
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#objdump: -d
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#name: MIPS eret disassembly
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#as: -mfix-24k -march=24kc --no-warn
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.*\.o: file format .*mips.*
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Disassembly of section \.text:
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00000000 <\.text>:
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0: 240c0000 li t4,0
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4: 42000018 eret
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8: 00000000 nop
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c: 10000003 b 0x1c
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10: 00000000 nop
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14: 240a0003 li t2,3
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18: 42000018 eret
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1c: 24040000 li a0,0
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20: 4200001f deret
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24: 00000000 nop
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28: 116afffa beq t3,t2,0x14
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2c: 00000000 nop
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30: 4200001f deret
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34: 00000000 nop
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38: 42000018 eret
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3c: 00000000 nop
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40: 42000018 eret
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44: 00000000 nop
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48: 1000fff4 b 0x1c
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4c: 00000000 nop
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50: 240c0004 li t4,4
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54: 4200001f deret
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58: 240c0003 li t4,3
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5c: 42000018 eret
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60: 10000005 b 0x78
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64: 240c0003 li t4,3
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68: 42000018 eret
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6c: 00000000 nop
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70: 10000001 b 0x78
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74: 240c0003 li t4,3
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78: 240c0003 li t4,3
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7c: 42000018 eret
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3
gas/testsuite/gas/mips/eret.l
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3
gas/testsuite/gas/mips/eret.l
Normal file
@ -0,0 +1,3 @@
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.*\.s: Assembler messages:
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.*\.s:20: Warning: ERET and DERET must be followed by a NOP on the 24K\.
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.*\.s:27: Warning: ERET and DERET must be followed by a NOP on the 24K\.
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27
gas/testsuite/gas/mips/eret.s
Normal file
27
gas/testsuite/gas/mips/eret.s
Normal file
@ -0,0 +1,27 @@
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.text
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li $t4, 0
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eret
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b 2f
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1: li $t2, 3
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eret
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2: li $a0, 0
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deret
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beq $t3,$t2,1b
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deret
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eret
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eret
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b 2b
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.set noreorder
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li $t4, 4
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deret
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li $t4, 3
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eret
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b 1f
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li $t4, 3
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eret
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nop
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b 1f
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li $t4, 3
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1: li $t4, 3
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eret
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@ -436,6 +436,9 @@ if { [istarget mips*-*-vxworks*] } {
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} else {
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run_dump_test "jal"
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}
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run_dump_test "eret"
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run_list_test "eret" "-mfix-24k -march=24kc" "MIPS eret warnings"
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if $elf { run_dump_test "jal-svr4pic" }
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if $elf { run_dump_test "jal-xgot" }
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run_list_test_arches "jal-range" "-32" [mips_arch_list_matching mips1]
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