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* irix5-nat.c (supply_fpregset): Fix bug that caused the FSR

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register value to be incorrectly written in the regcache.
        (fill_fpregset): Fix bug that caused the FSR register value
        to be incorrectly read from the regcache.
This commit is contained in:
Joel Brobecker 2005-03-28 22:31:55 +00:00
parent fce5e38603
commit 6d1eba4cf3
2 changed files with 33 additions and 6 deletions
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7
gdb/ChangeLog
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@ -1,3 +1,10 @@
2005-03-28 Joel Brobecker <brobecker@adacore.com>
* irix5-nat.c (supply_fpregset): Fix bug that caused the FSR
register value to be incorrectly written in the regcache.
(fill_fpregset): Fix bug that caused the FSR register value
to be incorrectly read from the regcache.
2005-03-28 Daniel Jacobowitz <dan@codesourcery.com>
* remote-rdi.c (arm_rdi_insert_breakpoint): Don't call

32
gdb/irix5-nat.c
View File

@ -139,6 +139,7 @@ supply_fpregset (fpregset_t *fpregsetp)
{
int regi;
static char zerobuf[32] = {0};
char fsrbuf[8];
/* FIXME, this is wrong for the N32 ABI which has 64 bit FP regs. */
@ -146,9 +147,17 @@ supply_fpregset (fpregset_t *fpregsetp)
regcache_raw_supply (current_regcache, FP0_REGNUM + regi,
(char *) &fpregsetp->fp_r.fp_regs[regi]);
/* We can't supply the FSR register directly to the regcache,
because there is a size issue: On one hand, fpregsetp->fp_csr
is 32bits long, while the regcache expects a 64bits long value.
So we use a buffer of the correct size and copy into it the register
value at the proper location. */
memset (fsrbuf, 0, 4);
memcpy (fsrbuf + 4, &fpregsetp->fp_csr, 4);
regcache_raw_supply (current_regcache,
mips_regnum (current_gdbarch)->fp_control_status,
(char *) &fpregsetp->fp_csr);
fsrbuf);
/* FIXME: how can we supply FCRIR? SGI doesn't tell us. */
regcache_raw_supply (current_regcache,
@ -173,11 +182,22 @@ fill_fpregset (fpregset_t *fpregsetp, int regno)
}
}
if ((regno == -1)
|| (regno == mips_regnum (current_gdbarch)->fp_control_status))
regcache_raw_read (current_regcache,
mips_regnum (current_gdbarch)->fp_control_status,
&fpregsetp->fp_csr);
if (regno == -1
|| regno == mips_regnum (current_gdbarch)->fp_control_status)
{
char fsrbuf[8];
/* We can't fill the FSR register directly from the regcache,
because there is a size issue: On one hand, fpregsetp->fp_csr
is 32bits long, while the regcache expects a 64bits long buffer.
So we use a buffer of the correct size and copy the register
value from that buffer. */
regcache_raw_read (current_regcache,
mips_regnum (current_gdbarch)->fp_control_status,
fsrbuf);
memcpy (&fpregsetp->fp_csr, fsrbuf + 4, 4);
}
}