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Skeleton file for mn1030002 serial device implementation.
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Joyce Janczyn
parent
5f69de151a
commit
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413
sim/mn10300/dv-mn103ser.c
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413
sim/mn10300/dv-mn103ser.c
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/* This file is part of the program GDB, the GNU debugger.
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Copyright (C) 1998 Free Software Foundation, Inc.
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Contributed by Cygnus Solutions.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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*/
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#include "sim-main.h"
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#include "hw-main.h"
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/* DEVICE
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mn103ser - mn103002 serial devices 0, 1 and 2.
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DESCRIPTION
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Implements the mn103002 serial interfaces as described in the
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mn103002 user guide.
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PROPERTIES
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reg = <serial-addr> <serial-size>
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BUGS
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*/
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/* The serial devices' registers' address block */
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struct mn103ser_block {
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unsigned_word base;
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unsigned_word bound;
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};
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enum serial_register_types {
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SC0CTR,
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SC0ICR,
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SC0TXB,
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SC0RXB,
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SC0STR,
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SC1CTR,
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SC1ICR,
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SC1TXB,
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SC1RXB,
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SC1STR,
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SC2CTR,
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SC2ICR,
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SC2TXB,
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SC2RXB,
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SC2STR,
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};
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struct mn103ser {
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struct mn103ser_block block;
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};
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/* output port ID's */
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/* for mn103002 */
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enum {
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SERIAL0_RECEIVE,
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SERIAL0_SEND,
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SERIAL1_RECEIVE,
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SERIAL1_SEND,
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SERIAL2_RECEIVE,
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SERIAL2_SEND,
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};
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static const struct hw_port_descriptor mn103ser_ports[] = {
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{ "serial-0-receive", SERIAL0_RECEIVE, 0, output_port, },
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{ "serial-0-transmit", SERIAL0_SEND, 0, output_port, },
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{ "serial-1-receive", SERIAL1_RECEIVE, 0, output_port, },
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{ "serial-1-transmit", SERIAL1_SEND, 0, output_port, },
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{ "serial-2-receive", SERIAL2_RECEIVE, 0, output_port, },
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{ "serial-2-transmit", SERIAL2_SEND, 0, output_port, },
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{ NULL, },
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};
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/* Finish off the partially created hw device. Attach our local
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callbacks. Wire up our port names etc */
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static hw_io_read_buffer_method mn103ser_io_read_buffer;
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static hw_io_write_buffer_method mn103ser_io_write_buffer;
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static void
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attach_mn103ser_regs (struct hw *me,
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struct mn103ser *serial)
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{
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unsigned_word attach_address;
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int attach_space;
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unsigned attach_size;
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reg_property_spec reg;
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if (hw_find_property (me, "reg") == NULL)
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hw_abort (me, "Missing \"reg\" property");
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if (!hw_find_reg_array_property (me, "reg", 0, ®))
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hw_abort (me, "\"reg\" property must contain three addr/size entries");
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hw_unit_address_to_attach_address (hw_parent (me),
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®.address,
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&attach_space,
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&attach_address,
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me);
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serial->block.base = attach_address;
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hw_unit_size_to_attach_size (hw_parent (me),
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®.size,
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&attach_size, me);
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serial->block.bound = attach_address + (attach_size - 1);
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hw_attach_address (hw_parent (me),
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0,
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attach_space, attach_address, attach_size,
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me);
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}
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static void
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mn103ser_finish (struct hw *me)
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{
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struct mn103ser *serial;
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int i;
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serial = HW_ZALLOC (me, struct mn103ser);
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set_hw_data (me, serial);
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set_hw_io_read_buffer (me, mn103ser_io_read_buffer);
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set_hw_io_write_buffer (me, mn103ser_io_write_buffer);
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set_hw_ports (me, mn103ser_ports);
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/* Attach ourself to our parent bus */
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attach_mn103ser_regs (me, serial);
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/* Initialize the serial device registers. */
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}
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/* read and write */
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static int
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decode_addr (struct hw *me,
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struct mn103ser *serial,
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unsigned_word address)
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{
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unsigned_word offset;
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offset = address - serial->block.base;
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switch (offset)
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{
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case 0x00: return SC0CTR;
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case 0x04: return SC0ICR;
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case 0x08: return SC0TXB;
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case 0x09: return SC0RXB;
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case 0x0C: return SC0STR;
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case 0x10: return SC1CTR;
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case 0x14: return SC1ICR;
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case 0x18: return SC1TXB;
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case 0x19: return SC1RXB;
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case 0x1C: return SC1STR;
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case 0x20: return SC2CTR;
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case 0x24: return SC2ICR;
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case 0x28: return SC2TXB;
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case 0x29: return SC2RXB;
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case 0x2C: return SC2STR;
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default:
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{
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hw_abort (me, "bad address");
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return -1;
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}
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}
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}
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static void
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read_control_reg (struct hw *me,
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struct mn103ser *serial,
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unsigned_word addr,
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void *dest,
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unsigned nr_bytes)
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{
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}
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static void
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read_intmode_reg (struct hw *me,
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struct mn103ser *serial,
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unsigned_word addr,
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void *dest,
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unsigned nr_bytes)
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{
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}
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static void
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read_txb (struct hw *me,
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struct mn103ser *serial,
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unsigned_word addr,
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void *dest,
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unsigned nr_bytes)
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{
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}
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static void
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read_rxb (struct hw *me,
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struct mn103ser *serial,
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unsigned_word addr,
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void *dest,
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unsigned nr_bytes)
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{
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}
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static void
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read_status_reg (struct hw *me,
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struct mn103ser *serial,
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unsigned_word addr,
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void *dest,
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unsigned nr_bytes)
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{
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}
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static unsigned
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mn103ser_io_read_buffer (struct hw *me,
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void *dest,
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int space,
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unsigned_word base,
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unsigned nr_bytes)
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{
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struct mn103ser *serial = hw_data (me);
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enum serial_register_types serial_reg;
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HW_TRACE ((me, "read 0x%08lx %d", (long) base, (int) nr_bytes));
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serial_reg = decode_addr (me, serial, base);
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switch (serial_reg)
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{
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/* control registers */
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case SC0CTR:
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case SC1CTR:
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case SC2CTR:
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read_control_reg(me, serial, base, dest, nr_bytes);
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break;
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/* interrupt mode registers */
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case SC0ICR:
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case SC1ICR:
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case SC2ICR:
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read_intmode_reg(me, serial, base, dest, nr_bytes);
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break;
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/* transmission buffers */
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case SC0TXB:
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case SC1TXB:
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case SC2TXB:
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read_txb(me, serial, base, dest, nr_bytes);
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break;
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/* reception buffers */
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case SC0RXB:
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case SC1RXB:
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case SC2RXB:
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read_rxb(me, serial, base, dest, nr_bytes);
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break;
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/* status registers */
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case SC0STR:
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case SC1STR:
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case SC2STR:
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read_status_reg(me, serial, base, dest, nr_bytes);
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break;
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default:
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hw_abort(me, "invalid address");
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}
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return nr_bytes;
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}
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static void
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write_control_reg (struct hw *me,
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struct mn103ser *serial,
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unsigned_word addr,
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const void *source,
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unsigned nr_bytes)
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{
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}
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static void
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write_intmode_reg (struct hw *me,
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struct mn103ser *serial,
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unsigned_word addr,
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const void *source,
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unsigned nr_bytes)
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{
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}
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static void
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write_txb (struct hw *me,
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struct mn103ser *serial,
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unsigned_word addr,
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const void *source,
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unsigned nr_bytes)
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{
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}
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static void
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write_rxb (struct hw *me,
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struct mn103ser *serial,
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unsigned_word addr,
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const void *source,
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unsigned nr_bytes)
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{
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}
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static void
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write_status_reg (struct hw *me,
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struct mn103ser *serial,
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unsigned_word addr,
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const void *source,
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unsigned nr_bytes)
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{
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}
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static unsigned
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mn103ser_io_write_buffer (struct hw *me,
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const void *source,
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int space,
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unsigned_word base,
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unsigned nr_bytes)
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{
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struct mn103ser *serial = hw_data (me);
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enum serial_register_types serial_reg;
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HW_TRACE ((me, "write 0x%08lx %d", (long) base, (int) nr_bytes));
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serial_reg = decode_addr (me, serial, base);
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switch (serial_reg)
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{
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/* control registers */
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case SC0CTR:
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case SC1CTR:
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case SC2CTR:
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write_control_reg(me, serial, base, source, nr_bytes);
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break;
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/* interrupt mode registers */
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case SC0ICR:
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case SC1ICR:
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case SC2ICR:
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write_intmode_reg(me, serial, base, source, nr_bytes);
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break;
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/* transmission buffers */
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case SC0TXB:
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case SC1TXB:
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case SC2TXB:
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write_txb(me, serial, base, source, nr_bytes);
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break;
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/* reception buffers */
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case SC0RXB:
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case SC1RXB:
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case SC2RXB:
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write_rxb(me, serial, base, source, nr_bytes);
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break;
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/* status registers */
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case SC0STR:
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case SC1STR:
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case SC2STR:
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write_status_reg(me, serial, base, source, nr_bytes);
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break;
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default:
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hw_abort(me, "invalid address");
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}
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return nr_bytes;
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}
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const struct hw_descriptor dv_mn103ser_descriptor[] = {
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{ "mn103ser", mn103ser_finish, },
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{ NULL },
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};
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