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* mips-tdep.c (mips32_scan_prologue): Use the ABI register size

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to decide whether to match instruction patterns using "sw" and "sd".
This commit is contained in:
Kevin Buettner 2008-03-15 00:00:48 +00:00
parent e073c5fec6
commit 7d1e6fb863
2 changed files with 12 additions and 3 deletions
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5
gdb/ChangeLog
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@ -1,3 +1,8 @@
2008-03-14 Kevin Buettner <kevinb@redhat.com>
* mips-tdep.c (mips32_scan_prologue): Use the ABI register size
to decide whether to match instruction patterns using "sw" and "sd".
2008-03-14 Pedro Alves <pedro@codesourcery.com> 2008-03-14 Pedro Alves <pedro@codesourcery.com>
* infcmd.c (jump_command): Postpone disabling stdin until after * infcmd.c (jump_command): Postpone disabling stdin until after

10
gdb/mips-tdep.c
View File

@ -1931,6 +1931,7 @@ mips32_scan_prologue (CORE_ADDR start_pc, CORE_ADDR limit_pc,
int seen_sp_adjust = 0; int seen_sp_adjust = 0;
int load_immediate_bytes = 0; int load_immediate_bytes = 0;
struct gdbarch *gdbarch = get_frame_arch (next_frame); struct gdbarch *gdbarch = get_frame_arch (next_frame);
int regsize_is_64_bits = (mips_abi_regsize (gdbarch) == 8);
/* Can be called when there's no process, and hence when there's no /* Can be called when there's no process, and hence when there's no
NEXT_FRAME. */ NEXT_FRAME. */
@ -1973,11 +1974,13 @@ restart:
break; break;
seen_sp_adjust = 1; seen_sp_adjust = 1;
} }
else if ((high_word & 0xFFE0) == 0xafa0) /* sw reg,offset($sp) */ else if (((high_word & 0xFFE0) == 0xafa0) /* sw reg,offset($sp) */
&& !regsize_is_64_bits)
{ {
set_reg_offset (this_cache, reg, sp + low_word); set_reg_offset (this_cache, reg, sp + low_word);
} }
else if ((high_word & 0xFFE0) == 0xffa0) /* sd reg,offset($sp) */ else if (((high_word & 0xFFE0) == 0xffa0) /* sd reg,offset($sp) */
&& regsize_is_64_bits)
{ {
/* Irix 6.2 N32 ABI uses sd instructions for saving $gp and $ra. */ /* Irix 6.2 N32 ABI uses sd instructions for saving $gp and $ra. */
set_reg_offset (this_cache, reg, sp + low_word); set_reg_offset (this_cache, reg, sp + low_word);
@ -2041,7 +2044,8 @@ restart:
} }
} }
} }
else if ((high_word & 0xFFE0) == 0xafc0) /* sw reg,offset($30) */ else if ((high_word & 0xFFE0) == 0xafc0 /* sw reg,offset($30) */
&& !regsize_is_64_bits)
{ {
set_reg_offset (this_cache, reg, frame_addr + low_word); set_reg_offset (this_cache, reg, frame_addr + low_word);
} }