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https://github.com/darlinghq/darling-gdb.git
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68060 support
This commit is contained in:
Ken Raeburn
parent
c84291b43c
commit
82489ea062
@ -74,6 +74,12 @@ const int md_reloc_size = 8; /* Size of relocation record */
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references. */
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int flag_want_pic;
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#ifdef REGISTER_PREFIX_OPTIONAL
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int flag_reg_prefix_optional = REGISTER_PREFIX_OPTIONAL;
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#else
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int flag_reg_prefix_optional;
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#endif
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/* Its an arbitrary name: This means I don't approve of it */
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/* See flames below */
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static struct obstack robyn;
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@ -187,13 +193,25 @@ struct m68k_exp
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short e_siz; /* 0== default 1==short/byte 2==word 3==long */
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};
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/* DATA and ADDR have to be contiguous, so that reg-DATA gives 0-7==data reg,
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8-15==addr reg for operands that take both types */
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/* DATA and ADDR have to be contiguous, so that reg-DATA gives
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0-7==data reg, 8-15==addr reg for operands that take both types.
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We don't use forms like "ADDR0 = ADDR" here because this file is
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likely to be used on an Apollo, and the broken Apollo compiler
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gives an `undefined variable' error if we do that, according to
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troy@cbme.unsw.edu.au. */
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#define DATA DATA0
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#define ADDR ADDR0
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#define SP ADDR7
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#define FPREG FP0
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#define COPNUM COP0
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#define BAD BAD0
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#define BAC BAC0
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enum _register
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{
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DATA = 1, /* 1- 8 == data registers 0-7 */
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DATA0 = DATA,
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DATA0 = 1, /* 1- 8 == data registers 0-7 */
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DATA1,
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DATA2,
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DATA3,
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@ -202,8 +220,7 @@ enum _register
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DATA6,
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DATA7,
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ADDR,
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ADDR0 = ADDR,
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ADDR0,
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ADDR1,
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ADDR2,
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ADDR3,
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@ -212,13 +229,10 @@ enum _register
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ADDR6,
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ADDR7,
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/* Note that COPNUM==processor #1 -- COPNUM+7==#8, which stores as 000 */
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/* Note that COP0==processor #1 -- COP0+7==#8, which stores as 000 */
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/* I think. . . */
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SP = ADDR7,
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FPREG, /* Eight FP registers */
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FP0 = FPREG,
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FP0, /* Eight FP registers */
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FP1,
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FP2,
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FP3,
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@ -226,8 +240,8 @@ enum _register
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FP5,
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FP6,
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FP7,
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COPNUM = (FPREG + 8), /* Co-processor #1-#8 */
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COP0 = COPNUM,
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COP0, /* Co-processor #1-#8 */
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COP1,
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COP2,
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COP3,
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@ -235,12 +249,13 @@ enum _register
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COP5,
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COP6,
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COP7,
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PC, /* Program counter */
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ZPC, /* Hack for Program space, but 0 addressing */
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SR, /* Status Reg */
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CCR, /* Condition code Reg */
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/* These have to be in order for the movec instruction to work. */
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/* These have to be grouped together for the movec instruction to work. */
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USP, /* User Stack Pointer */
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ISP, /* Interrupt stack pointer */
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SFC,
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@ -257,6 +272,9 @@ enum _register
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TC,
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SRP,
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URP,
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BUSCR, /* 68060 added these */
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PCR,
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#define last_movec_reg PCR
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/* end of movec ordering constraints */
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FPI,
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@ -269,8 +287,7 @@ enum _register
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VAL,
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SCC,
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AC,
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BAD,
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BAD0 = BAD,
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BAD0,
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BAD1,
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BAD2,
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BAD3,
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@ -278,8 +295,7 @@ enum _register
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BAD5,
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BAD6,
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BAD7,
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BAC,
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BAC0 = BAC,
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BAC0,
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BAC1,
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BAC2,
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BAC3,
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@ -300,6 +316,28 @@ enum _register
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TT1,
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};
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static const enum _register m68000_control_regs[] = { 0 };
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static const enum _register m68010_control_regs[] = {
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SFC, DFC, USP, VBR,
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0
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};
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static const enum _register m68020_control_regs[] = {
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SFC, DFC, USP, VBR, CACR, CAAR, MSP, ISP,
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0
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};
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static const enum _register m68040_control_regs[] = {
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SFC, DFC, CACR, TC, ITT0, ITT1, DTT0, DTT1,
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USP, VBR, MSP, ISP, MMUSR, URP, SRP,
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0
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};
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static const enum _register m68060_control_regs[] = {
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SFC, DFC, CACR, TC, ITT0, ITT1, DTT0, DTT1, BUSCR,
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USP, VBR, URP, SRP, PCR,
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0
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};
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static const enum _register *control_regs;
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/* Internal form of an operand. */
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struct m68k_op
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{
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@ -597,15 +635,19 @@ m68k_reg_parse (ccp)
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char *p;
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symbolS *symbolP;
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#ifdef REGISTER_PREFIX
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if (*start != REGISTER_PREFIX)
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return FAIL;
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p = start + 1;
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#else
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p = start;
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if (*p == OPTIONAL_REGISTER_PREFIX)
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p++, start++;
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#endif
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if (flag_reg_prefix_optional)
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{
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if (*start == REGISTER_PREFIX)
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start++;
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p = start;
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}
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else
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{
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if (*start != REGISTER_PREFIX)
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return FAIL;
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p = start + 1;
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}
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if (!isalpha (*p) || !is_name_beginner (*p))
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return FAIL;
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@ -846,7 +888,7 @@ m68k_ip_op (str, opP)
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;
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--strend;
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if (*str == '#')
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if (*str == '#' || *str == '&')
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{
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str++;
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opP->con1 = add_exp (str, strend);
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@ -1002,9 +1044,8 @@ m68k_ip_op (str, opP)
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{
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/* "(EXPR,..." , a displacement */
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char *stmp;
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char *index ();
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if ((stmp = index (str, ',')) != NULL)
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if ((stmp = strchr (str, ',')) != NULL)
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{
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opP->con1 = add_exp (str, stmp - 1);
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str = stmp;
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@ -1097,8 +1138,7 @@ m68k_ip_op (str, opP)
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{
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/* "EXP2" or "EXP2(REG..." */
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char *stmp;
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char *index ();
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if ((stmp = index (str, '(')) != NULL)
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if ((stmp = strchr (str, '(')) != NULL)
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{
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char *ostr = str;
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@ -1397,10 +1437,47 @@ m68k_ip_op (str, opP)
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#if defined (M68KCOFF) && !defined (BFD_ASSEMBLER)
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#ifdef NO_PCREL_RELOCS
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int
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make_pcrel_absolute(fixP, add_number)
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fixS *fixP;
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long *add_number;
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{
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register unsigned char *opcode = fixP->fx_frag->fr_opcode;
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/* rewrite the PC relative instructions to absolute address ones.
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* these are rumoured to be faster, and the apollo linker refuses
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* to deal with the PC relative relocations.
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*/
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if (opcode[0] == 0x60 && opcode[1] == 0xff) /* BRA -> JMP */
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{
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opcode[0] = 0x4e;
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opcode[1] = 0xf9;
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}
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else if (opcode[0] == 0x61 && opcode[1] == 0xff) /* BSR -> JSR */
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{
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opcode[0] = 0x4e;
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opcode[1] = 0xb9;
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}
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else
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as_fatal ("Unknown PC relative instruction");
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*add_number -= 4;
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return 0;
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}
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#endif /* NO_PCREL_RELOCS */
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short
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tc_coff_fix2rtype (fixP)
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fixS *fixP;
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{
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#ifdef NO_PCREL_RELOCS
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know (fixP->fx_pcrel == 0);
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return (fixP->fx_size == 1 ? R_RELBYTE
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: fixP->fx_size == 2 ? R_DIR16
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: R_DIR32);
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#else
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return (fixP->fx_pcrel ?
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(fixP->fx_size == 1 ? R_PCRBYTE :
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fixP->fx_size == 2 ? R_PCRWORD :
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@ -1408,8 +1485,7 @@ tc_coff_fix2rtype (fixP)
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(fixP->fx_size == 1 ? R_RELBYTE :
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fixP->fx_size == 2 ? R_RELWORD :
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R_RELLONG));
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#endif
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}
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#endif
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@ -1823,27 +1899,17 @@ m68k_ip (instring)
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case 'J':
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if (opP->mode != MSCR
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|| opP->reg < USP
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|| opP->reg > URP
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|| cpu_of_arch (current_architecture) < m68010 /* before 68010 had none */
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|| (cpu_of_arch (current_architecture) < m68020
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&& opP->reg != SFC
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&& opP->reg != DFC
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&& opP->reg != USP
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&& opP->reg != VBR) /* 68010's had only these */
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|| (cpu_of_arch (current_architecture) < m68040
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&& opP->reg != SFC
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&& opP->reg != DFC
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&& opP->reg != USP
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&& opP->reg != VBR
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&& opP->reg != CACR
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&& opP->reg != CAAR
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&& opP->reg != MSP
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&& opP->reg != ISP) /* 680[23]0's have only these */
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|| (cpu_of_arch (current_architecture) == m68040 /* 68040 has all but this */
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&& opP->reg == CAAR))
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|| opP->reg > last_movec_reg)
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losing++;
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else
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{
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losing++;
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} /* doesn't cut it */
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enum _register *rp;
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for (rp = control_regs; *rp; rp++)
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if (*rp == opP->reg)
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break;
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if (*rp == 0)
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losing++;
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}
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break;
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case 'k':
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@ -2042,7 +2108,7 @@ m68k_ip (instring)
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switch (ok_arch)
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{
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case mfloat:
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strcpy (cp, "fpu (68040 or 68881/68882)");
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strcpy (cp, "fpu (68040, 68060 or 68881/68882)");
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break;
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case mmmu:
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strcpy (cp, "mmu (68030 or 68851)");
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@ -2071,6 +2137,7 @@ m68k_ip (instring)
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{ m68020, "68020" },
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{ m68030, "68030" },
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{ m68040, "68040" },
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{ m68060, "68060" },
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{ cpu32, "cpu32" },
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{ m68881, "68881" },
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{ m68851, "68851" }
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@ -2195,7 +2262,7 @@ m68k_ip (instring)
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/* Can other cases happen here? */
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if (op (opP->con1) != O_constant)
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abort ();
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val = (valueT) offs (opP->con1);
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gencnt = 0;
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do
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@ -2267,6 +2334,7 @@ m68k_ip (instring)
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if (opP->reg == PC)
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{
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addword (0x0170);
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opP->con1->e_exp.X_add_number += 6;
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add_fix ('l', opP->con1, 1);
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addword (0), addword (0);
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break;
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@ -2292,6 +2360,7 @@ m68k_ip (instring)
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{
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if (opP->reg == PC)
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{
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opP->con1->e_exp.X_add_number += 2;
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add_fix ('w', opP->con1, 1);
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}
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else
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@ -3376,24 +3445,25 @@ insert_reg (regname, regnum)
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{
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char buf[100];
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int i;
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symbolS *s;
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#ifdef REGISTER_PREFIX
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buf[0] = REGISTER_PREFIX;
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strcpy (buf + 1, regname);
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regname = buf;
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if (!flag_reg_prefix_optional)
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{
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buf[0] = REGISTER_PREFIX;
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strcpy (buf + 1, regname);
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regname = buf;
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}
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#endif
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symbol_table_insert (s = symbol_new (regname, reg_section, regnum, &zero_address_frag));
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verify_symbol_chain_2 (s);
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symbol_table_insert (symbol_new (regname, reg_section, regnum,
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&zero_address_frag));
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for (i = 0; regname[i]; i++)
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buf[i] = islower (regname[i]) ? toupper (regname[i]) : regname[i];
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buf[i] = '\0';
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symbol_table_insert (s = symbol_new (buf, reg_section, regnum, &zero_address_frag));
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verify_symbol_chain_2 (s);
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symbol_table_insert (symbol_new (buf, reg_section, regnum,
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&zero_address_frag));
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}
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struct init_entry
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@ -3538,83 +3608,6 @@ md_assemble (str)
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int m, n = 0;
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char *to_beg_P;
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int shorts_this_frag;
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static int done_first_time;
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if (!done_first_time)
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{
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done_first_time = 1;
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if (cpu_of_arch (current_architecture) == 0)
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{
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int cpu_type;
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if (strcmp (TARGET_CPU, "m68000") == 0
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|| strcmp (TARGET_CPU, "m68302") == 0)
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cpu_type = m68000;
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else if (strcmp (TARGET_CPU, "m68010") == 0)
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cpu_type = m68010;
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else if (strcmp (TARGET_CPU, "m68020") == 0
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|| strcmp (TARGET_CPU, "m68k") == 0)
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cpu_type = m68020;
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else if (strcmp (TARGET_CPU, "m68030") == 0)
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cpu_type = m68030;
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else if (strcmp (TARGET_CPU, "m68040") == 0)
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cpu_type = m68040;
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else if (strcmp (TARGET_CPU, "cpu32") == 0
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|| strcmp (TARGET_CPU, "m68331") == 0
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|| strcmp (TARGET_CPU, "m68332") == 0
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|| strcmp (TARGET_CPU, "m68333") == 0
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|| strcmp (TARGET_CPU, "m68340") == 0)
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cpu_type = cpu32;
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else
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cpu_type = m68020;
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current_architecture |= cpu_type;
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}
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#if 0 /* Could be doing emulation. */
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if (current_architecture & m68881)
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{
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if (current_architecture & m68000)
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as_bad ("incompatible processors 68000 and 68881/2 specified");
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if (current_architecture & m68010)
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as_bad ("incompatible processors 68010 and 68881/2 specified");
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if (current_architecture & m68040)
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as_bad ("incompatible processors 68040 and 68881/2 specified");
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}
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#endif
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/* What other incompatibilities could we check for? */
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/* Toss in some default assumptions about coprocessors. */
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if (!no_68881
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&& (cpu_of_arch (current_architecture)
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/* Can CPU32 have a 68881 coprocessor?? */
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& (m68020 | m68030 | cpu32)))
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{
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current_architecture |= m68881;
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}
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if (!no_68851
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&& (cpu_of_arch (current_architecture) & m68020up) != 0
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&& cpu_of_arch (current_architecture) != m68040)
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{
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current_architecture |= m68851;
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}
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if (no_68881 && (current_architecture & m68881))
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as_bad ("options for 68881 and no-68881 both given");
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if (no_68851 && (current_architecture & m68851))
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as_bad ("options for 68851 and no-68851 both given");
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#ifdef OBJ_AOUT
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/* Work out the magic number. This isn't very general. */
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if (current_architecture & m68000)
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m68k_aout_machtype = 0;
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else if (current_architecture & m68010)
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m68k_aout_machtype = 1;
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else if (current_architecture & m68020)
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m68k_aout_machtype = 2;
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else
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m68k_aout_machtype = 2;
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#endif
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}
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memset ((char *) (&the_ins), '\0', sizeof (the_ins));
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m68k_ip (str);
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@ -3791,8 +3784,7 @@ md_begin ()
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register unsigned int i;
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register char c;
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if ((op_hash = hash_new ()) == NULL)
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as_fatal ("Virtual memory exhausted");
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op_hash = hash_new ();
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obstack_begin (&robyn, 4000);
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for (i = 0; i < numopcodes; i++)
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@ -3822,7 +3814,6 @@ md_begin ()
|
||||
while (slak);
|
||||
|
||||
retval = hash_insert (op_hash, ins->name, (char *) hack);
|
||||
/* Didn't his mommy tell him about null pointers? */
|
||||
if (retval)
|
||||
as_bad ("Internal Error: Can't hash %s: %s", ins->name, retval);
|
||||
}
|
||||
@ -3848,9 +3839,6 @@ md_begin ()
|
||||
#ifdef REGISTER_PREFIX
|
||||
alt_notend_table[REGISTER_PREFIX] = 1;
|
||||
#endif
|
||||
#ifdef OPTIONAL_REGISTER_PREFIX
|
||||
alt_notend_table[OPTIONAL_REGISTER_PREFIX] = 1;
|
||||
#endif
|
||||
|
||||
#ifndef MIT_SYNTAX_ONLY
|
||||
/* Insert pseudo ops, these have to go into the opcode table since
|
||||
@ -3873,20 +3861,119 @@ md_begin ()
|
||||
init_regtable ();
|
||||
}
|
||||
|
||||
void
|
||||
m68k_init_after_args ()
|
||||
{
|
||||
if (cpu_of_arch (current_architecture) == 0)
|
||||
{
|
||||
int cpu_type;
|
||||
|
||||
if (strcmp (TARGET_CPU, "m68000") == 0
|
||||
|| strcmp (TARGET_CPU, "m68302") == 0)
|
||||
cpu_type = m68000;
|
||||
else if (strcmp (TARGET_CPU, "m68010") == 0)
|
||||
cpu_type = m68010;
|
||||
else if (strcmp (TARGET_CPU, "m68020") == 0
|
||||
|| strcmp (TARGET_CPU, "m68k") == 0)
|
||||
cpu_type = m68020;
|
||||
else if (strcmp (TARGET_CPU, "m68030") == 0)
|
||||
cpu_type = m68030;
|
||||
else if (strcmp (TARGET_CPU, "m68040") == 0)
|
||||
cpu_type = m68040;
|
||||
else if (strcmp (TARGET_CPU, "m68060") == 0)
|
||||
cpu_type = m68060;
|
||||
else if (strcmp (TARGET_CPU, "cpu32") == 0
|
||||
|| strcmp (TARGET_CPU, "m68331") == 0
|
||||
|| strcmp (TARGET_CPU, "m68332") == 0
|
||||
|| strcmp (TARGET_CPU, "m68333") == 0
|
||||
|| strcmp (TARGET_CPU, "m68340") == 0)
|
||||
cpu_type = cpu32;
|
||||
else
|
||||
cpu_type = m68020;
|
||||
|
||||
current_architecture |= cpu_type;
|
||||
}
|
||||
#if 0 /* Could be doing emulation. */
|
||||
if (current_architecture & m68881)
|
||||
{
|
||||
if (current_architecture & m68000)
|
||||
as_bad ("incompatible processors 68000 and 68881/2 specified");
|
||||
if (current_architecture & m68010)
|
||||
as_bad ("incompatible processors 68010 and 68881/2 specified");
|
||||
if (current_architecture & m68040)
|
||||
as_bad ("incompatible processors 68040 and 68881/2 specified");
|
||||
}
|
||||
#endif
|
||||
if (current_architecture & m68851)
|
||||
{
|
||||
if (current_architecture & m68040)
|
||||
{
|
||||
as_warn ("68040 and 68851 specified; mmu instructions may assemble incorrectly");
|
||||
}
|
||||
}
|
||||
/* What other incompatibilities could we check for? */
|
||||
|
||||
/* Toss in some default assumptions about coprocessors. */
|
||||
if (!no_68881
|
||||
&& (cpu_of_arch (current_architecture)
|
||||
/* Can CPU32 have a 68881 coprocessor?? */
|
||||
& (m68020 | m68030 | cpu32)))
|
||||
{
|
||||
current_architecture |= m68881;
|
||||
}
|
||||
if (!no_68851
|
||||
&& (cpu_of_arch (current_architecture) & m68020up) != 0
|
||||
&& (cpu_of_arch (current_architecture) & m68040up) == 0)
|
||||
{
|
||||
current_architecture |= m68851;
|
||||
}
|
||||
if (no_68881 && (current_architecture & m68881))
|
||||
as_bad ("options for 68881 and no-68881 both given");
|
||||
if (no_68851 && (current_architecture & m68851))
|
||||
as_bad ("options for 68851 and no-68851 both given");
|
||||
|
||||
#ifdef OBJ_AOUT
|
||||
/* Work out the magic number. This isn't very general. */
|
||||
if (current_architecture & m68000)
|
||||
m68k_aout_machtype = 0;
|
||||
else if (current_architecture & m68010)
|
||||
m68k_aout_machtype = 1;
|
||||
else if (current_architecture & m68020)
|
||||
m68k_aout_machtype = 2;
|
||||
else
|
||||
m68k_aout_machtype = 2;
|
||||
#endif
|
||||
|
||||
/* Note which set of "movec" control registers is available. */
|
||||
switch (cpu_of_arch (current_architecture))
|
||||
{
|
||||
case m68000:
|
||||
control_regs = m68000_control_regs;
|
||||
break;
|
||||
case m68010:
|
||||
control_regs = m68010_control_regs;
|
||||
break;
|
||||
case m68020:
|
||||
case m68030:
|
||||
control_regs = m68020_control_regs;
|
||||
break;
|
||||
case m68040:
|
||||
control_regs = m68040_control_regs;
|
||||
break;
|
||||
case m68060:
|
||||
control_regs = m68060_control_regs;
|
||||
break;
|
||||
default:
|
||||
abort ();
|
||||
}
|
||||
}
|
||||
|
||||
#if 0
|
||||
#define notend(s) ((*s == ',' || *s == '}' || *s == '{' \
|
||||
|| (*s == ':' && strchr("aAdD#", s[1]))) \
|
||||
? 0 : 1)
|
||||
#endif
|
||||
|
||||
/* This funciton is called once, before the assembler exits. It is
|
||||
supposed to do any final cleanup for this part of the assembler.
|
||||
*/
|
||||
void
|
||||
md_end ()
|
||||
{
|
||||
}
|
||||
|
||||
/* Equal to MAX_PRECISION in atof-ieee.c */
|
||||
#define MAX_LITTLENUMS 6
|
||||
|
||||
@ -3949,37 +4036,13 @@ md_atof (type, litP, sizeP)
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* Turn an integer of n bytes (in val) into a stream of bytes appropriate
|
||||
for use in the a.out file, and stores them in the array pointed to by buf.
|
||||
This knows about the endian-ness of the target machine and does
|
||||
THE RIGHT THING, whatever it is. Possible values for n are 1 (byte)
|
||||
2 (short) and 4 (long) Floating numbers are put out as a series of
|
||||
LITTLENUMS (shorts, here at least)
|
||||
*/
|
||||
void
|
||||
md_number_to_chars (buf, val, n)
|
||||
char *buf;
|
||||
valueT val;
|
||||
int n;
|
||||
{
|
||||
switch (n)
|
||||
{
|
||||
case 1:
|
||||
*buf++ = val;
|
||||
break;
|
||||
case 2:
|
||||
*buf++ = (val >> 8);
|
||||
*buf++ = val;
|
||||
break;
|
||||
case 4:
|
||||
*buf++ = (val >> 24);
|
||||
*buf++ = (val >> 16);
|
||||
*buf++ = (val >> 8);
|
||||
*buf++ = val;
|
||||
break;
|
||||
default:
|
||||
as_fatal ("failed sanity check.");
|
||||
}
|
||||
number_to_chars_bigendian (buf, val, n);
|
||||
}
|
||||
|
||||
static void
|
||||
@ -4526,8 +4589,7 @@ tc_aout_fix_to_chars (where, fixP, segment_address_in_file)
|
||||
* Out: GNU LD relocation length code: 0, 1, or 2.
|
||||
*/
|
||||
|
||||
static CONST unsigned char nbytes_r_length[] =
|
||||
{42, 0, 1, 42, 2};
|
||||
static CONST unsigned char nbytes_r_length[] = {42, 0, 1, 42, 2};
|
||||
long r_symbolnum;
|
||||
|
||||
know (fixP->fx_addsy != NULL);
|
||||
@ -4545,8 +4607,6 @@ tc_aout_fix_to_chars (where, fixP, segment_address_in_file)
|
||||
where[6] = r_symbolnum & 0x0ff;
|
||||
where[7] = (((fixP->fx_pcrel << 7) & 0x80) | ((nbytes_r_length[fixP->fx_size] << 5) & 0x60) |
|
||||
(((!S_IS_DEFINED (fixP->fx_addsy)) << 4) & 0x10));
|
||||
|
||||
return;
|
||||
}
|
||||
#endif
|
||||
|
||||
@ -4896,6 +4956,20 @@ s_proc (ignore)
|
||||
#define MAYBE_FLOAT_TOO /* m68881 */ 0 /* this is handled later */
|
||||
#endif
|
||||
|
||||
int
|
||||
m68k_parse_long_option (opt)
|
||||
char *opt;
|
||||
{
|
||||
/* Skip over double-dash. */
|
||||
opt += 2;
|
||||
if (!strcmp (opt, "register-prefix-optional"))
|
||||
{
|
||||
flag_reg_prefix_optional = 1;
|
||||
return 1;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
int
|
||||
md_parse_option (argP, cntP, vecP)
|
||||
char **argP;
|
||||
@ -4945,6 +5019,10 @@ md_parse_option (argP, cntP, vecP)
|
||||
{
|
||||
current_architecture |= m68040 | MAYBE_FLOAT_TOO;
|
||||
}
|
||||
else if (!strcmp (*argP, "68060"))
|
||||
{
|
||||
current_architecture |= m68060 | MAYBE_FLOAT_TOO;
|
||||
}
|
||||
#ifndef NO_68881
|
||||
else if (!strcmp (*argP, "68881"))
|
||||
{
|
||||
|
||||
@ -109,7 +109,7 @@ case ${target_cpu} in
|
||||
# but this is what the support files are named...
|
||||
hppa*) cpu_type=hppa ;;
|
||||
i486) cpu_type=i386 ;;
|
||||
m680[01234]0) cpu_type=m68k ;;
|
||||
m680[012346]0) cpu_type=m68k ;;
|
||||
m68008) cpu_type=m68k ;;
|
||||
m683??) cpu_type=m68k ;;
|
||||
m8*) cpu_type=m88k ;;
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user