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bfd/
* elf64-ppc.c (create_linkage_sections): Don't create .rela.rodata.brlt for --emit-relocs. (ppc_build_one_stub): Create relocs for brlt --emit-relocs here. (ppc_size_one_stub): Count them. Simplify test of stub type when counting stub relocs. Set SEC_RELOC too. (ppc64_elf_size_stubs): Clear reloc_count and SEC_RELOC. (ppc64_elf_finish_dynamic_sections): Output brlt relocs. ld/testsuite/ * ld-powerpc/relbrlt.d: Update.
This commit is contained in:
Alan Modra
parent
4aac632ee9
commit
84f5d08e6b
@ -1,3 +1,13 @@
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2007-02-12 Alan Modra <amodra@bigpond.net.au>
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* elf64-ppc.c (create_linkage_sections): Don't create
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.rela.rodata.brlt for --emit-relocs.
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(ppc_build_one_stub): Create relocs for brlt --emit-relocs here.
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(ppc_size_one_stub): Count them. Simplify test of stub type
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when counting stub relocs. Set SEC_RELOC too.
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(ppc64_elf_size_stubs): Clear reloc_count and SEC_RELOC.
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(ppc64_elf_finish_dynamic_sections): Output brlt relocs.
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2007-02-12 Alan Modra <amodra@bigpond.net.au>
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* elflink.c (evaluate_complex_relocation_symbols): Ignore relocs
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@ -1,5 +1,5 @@
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/* PowerPC64-specific support for 64-bit ELF.
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Copyright 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006
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Copyright 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007
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Free Software Foundation, Inc.
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Written by Linus Nordberg, Swox AB <info@swox.com>,
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based on elf32-ppc.c by Ian Lance Taylor.
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@ -3846,14 +3846,6 @@ create_linkage_sections (bfd *dynobj, struct bfd_link_info *info)
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= bfd_make_section_anyway_with_flags (dynobj, ".rela.data.rel.ro.brlt",
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flags);
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}
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else if (info->emitrelocations)
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{
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flags = (SEC_ALLOC | SEC_LOAD | SEC_READONLY
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| SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_LINKER_CREATED);
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htab->relbrlt
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= bfd_make_section_anyway_with_flags (dynobj, ".rela.rodata.brlt",
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flags);
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}
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else
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return TRUE;
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@ -8394,6 +8386,33 @@ ppc_build_one_stub (struct bfd_hash_entry *gen_entry, void *in_arg)
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rl += htab->relbrlt->reloc_count++ * sizeof (Elf64_External_Rela);
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bfd_elf64_swap_reloca_out (htab->relbrlt->owner, &rela, rl);
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}
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else if (info->emitrelocations)
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{
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Elf_Internal_Rela *relocs, *r;
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struct bfd_elf_section_data *elfsec_data;
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elfsec_data = elf_section_data (htab->brlt);
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relocs = elfsec_data->relocs;
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if (relocs == NULL)
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{
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bfd_size_type relsize;
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relsize = htab->brlt->reloc_count * sizeof (*relocs);
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relocs = bfd_alloc (htab->brlt->owner, relsize);
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if (relocs == NULL)
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return FALSE;
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elfsec_data->relocs = relocs;
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elfsec_data->rel_hdr.sh_size = relsize;
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elfsec_data->rel_hdr.sh_entsize = 24;
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htab->brlt->reloc_count = 0;
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}
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r = relocs + htab->brlt->reloc_count;
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htab->brlt->reloc_count += 1;
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r->r_offset = (br_entry->offset
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+ htab->brlt->output_offset
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+ htab->brlt->output_section->vma);
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r->r_info = ELF64_R_INFO (0, R_PPC64_RELATIVE);
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r->r_addend = off;
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}
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off = (br_entry->offset
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+ htab->brlt->output_offset
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@ -8623,6 +8642,11 @@ ppc_size_one_stub (struct bfd_hash_entry *gen_entry, void *in_arg)
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if (htab->relbrlt != NULL)
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htab->relbrlt->size += sizeof (Elf64_External_Rela);
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else if (info->emitrelocations)
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{
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htab->brlt->reloc_count += 1;
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htab->brlt->flags |= SEC_RELOC;
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}
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}
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stub_entry->stub_type += ppc_stub_plt_branch - ppc_stub_long_branch;
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@ -8630,11 +8654,11 @@ ppc_size_one_stub (struct bfd_hash_entry *gen_entry, void *in_arg)
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if (stub_entry->stub_type != ppc_stub_plt_branch)
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size = 28;
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}
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if (info->emitrelocations
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&& (stub_entry->stub_type == ppc_stub_long_branch
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|| stub_entry->stub_type == ppc_stub_long_branch_r2off))
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stub_entry->stub_sec->reloc_count += 1;
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else if (info->emitrelocations)
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{
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stub_entry->stub_sec->reloc_count += 1;
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stub_entry->stub_sec->flags |= SEC_RELOC;
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}
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}
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stub_entry->stub_sec->size += size;
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@ -9426,9 +9450,12 @@ ppc64_elf_size_stubs (bfd *output_bfd,
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stub_sec->rawsize = stub_sec->size;
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stub_sec->size = 0;
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stub_sec->reloc_count = 0;
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stub_sec->flags &= ~SEC_RELOC;
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}
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htab->brlt->size = 0;
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htab->brlt->reloc_count = 0;
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htab->brlt->flags &= ~SEC_RELOC;
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if (htab->relbrlt != NULL)
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htab->relbrlt->size = 0;
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@ -11442,6 +11469,17 @@ ppc64_elf_finish_dynamic_sections (bfd *output_bfd,
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= PLT_ENTRY_SIZE;
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}
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/* brlt is SEC_LINKER_CREATED, so we need to write out relocs for
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brlt ourselves if emitrelocations. */
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if (htab->brlt != NULL
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&& htab->brlt->reloc_count != 0
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&& !_bfd_elf_link_output_relocs (output_bfd,
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htab->brlt,
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&elf_section_data (htab->brlt)->rel_hdr,
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elf_section_data (htab->brlt)->relocs,
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NULL))
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return FALSE;
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/* We need to handle writing out multiple GOT sections ourselves,
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since we didn't add them to DYNOBJ. We know dynobj is the first
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bfd. */
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@ -1,3 +1,7 @@
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2007-02-12 Alan Modra <amodra@bigpond.net.au>
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* ld-powerpc/relbrlt.d: Update.
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2007-02-06 Nick Clifton <nickc@redhat.com>
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PR ld/3805
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@ -7,44 +7,44 @@
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Disassembly of section \.text:
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0*100000a8 <_start>:
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100000a8: 49 bf 00 31 bl 11bf00d8 .*
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100000a8: R_PPC64_REL24 \.text\+0x37e0044
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100000ac: 60 00 00 00 nop
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100000b0: 49 bf 00 19 bl 11bf00c8 .*
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100000b0: R_PPC64_REL24 \.text\+0x3bf0020
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100000b4: 60 00 00 00 nop
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100000b8: 49 bf 00 25 bl 11bf00dc .*
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100000b8: R_PPC64_REL24 \.text\+0x57e0024
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100000bc: 60 00 00 00 nop
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100000c0: 00 00 00 00 \.long 0x0
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100000c4: 4b ff ff e4 b 100000a8 <_start>
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0*10000078 <_start>:
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10000078: 49 bf 00 31 bl 11bf00a8 .*
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10000078: R_PPC64_REL24 \.text\+0x37e0044
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1000007c: 60 00 00 00 nop
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10000080: 49 bf 00 19 bl 11bf0098 .*
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10000080: R_PPC64_REL24 \.text\+0x3bf0020
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10000084: 60 00 00 00 nop
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10000088: 49 bf 00 25 bl 11bf00ac .*
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10000088: R_PPC64_REL24 \.text\+0x57e0024
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1000008c: 60 00 00 00 nop
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10000090: 00 00 00 00 \.long 0x0
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10000094: 4b ff ff e4 b 10000078 <_start>
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\.\.\.
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0*11bf00c8 <.*plt_branch.*>:
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11bf00c8: 3d 82 05 7e addis r12,r2,1406
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11bf00cc: e9 6c 80 58 ld r11,-32680\(r12\)
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11bf00d0: 7d 69 03 a6 mtctr r11
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11bf00d4: 4e 80 04 20 bctr
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0*11bf0098 <.*plt_branch.*>:
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11bf0098: 3d 82 05 7e addis r12,r2,1406
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11bf009c: e9 6c 80 28 ld r11,-32728\(r12\)
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11bf00a0: 7d 69 03 a6 mtctr r11
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11bf00a4: 4e 80 04 20 bctr
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0*11bf00d8 <.*long_branch.*>:
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11bf00d8: 49 bf 00 14 b 137e00ec <far>
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11bf00d8: R_PPC64_REL24 \*ABS\*\+0x137e00ec
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0*11bf00a8 <.*long_branch.*>:
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11bf00a8: 49 bf 00 14 b 137e00bc <far>
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11bf00a8: R_PPC64_REL24 \*ABS\*\+0x137e00bc
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0*11bf00dc <.*plt_branch.*>:
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11bf00dc: 3d 82 05 7e addis r12,r2,1406
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11bf00e0: e9 6c 80 60 ld r11,-32672\(r12\)
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11bf00e4: 7d 69 03 a6 mtctr r11
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11bf00e8: 4e 80 04 20 bctr
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0*11bf00ac <.*plt_branch.*>:
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11bf00ac: 3d 82 05 7e addis r12,r2,1406
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11bf00b0: e9 6c 80 30 ld r11,-32720\(r12\)
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11bf00b4: 7d 69 03 a6 mtctr r11
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11bf00b8: 4e 80 04 20 bctr
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\.\.\.
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0*137e00ec <far>:
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137e00ec: 4e 80 00 20 blr
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0*137e00bc <far>:
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137e00bc: 4e 80 00 20 blr
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\.\.\.
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0*13bf00c8 <far2far>:
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13bf00c8: 4e 80 00 20 blr
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0*13bf0098 <far2far>:
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13bf0098: 4e 80 00 20 blr
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\.\.\.
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0*157e00cc <huge>:
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157e00cc: 4e 80 00 20 blr
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0*157e009c <huge>:
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157e009c: 4e 80 00 20 blr
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