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[DWARF] Sync GCC dwarf.def change on AArch64
include/ * dwarf2.def: Sync with mainline gcc sources.
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@ -1,3 +1,13 @@
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2017-01-04 Jiong Wang <jiong.wang@arm.com>
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* dwarf2.def: Sync with mainline gcc sources.
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2017-01-04 Richard Earnshaw <rearnsha@arm.com>
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Jiong Wang <jiong.wang@arm.com>
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* dwarf2.def (DW_OP_AARCH64_operation): Reserve the number 0xea.
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(DW_CFA_GNU_window_save): Comments the multiplexing on AArch64.
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2017-01-04 Szabolcs Nagy <szabolcs.nagy@arm.com>
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2017-01-04 Szabolcs Nagy <szabolcs.nagy@arm.com>
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* opcode/aarch64.h (AARCH64_FEATURE_RCPC): Define.
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* opcode/aarch64.h (AARCH64_FEATURE_RCPC): Define.
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@ -685,6 +685,12 @@ DW_OP (DW_OP_HP_unmod_range, 0xe5)
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DW_OP (DW_OP_HP_tls, 0xe6)
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DW_OP (DW_OP_HP_tls, 0xe6)
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/* PGI (STMicroelectronics) extensions. */
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/* PGI (STMicroelectronics) extensions. */
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DW_OP (DW_OP_PGI_omp_thread_num, 0xf8)
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DW_OP (DW_OP_PGI_omp_thread_num, 0xf8)
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/* AARCH64 extensions.
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DW_OP_AARCH64_operation takes one mandatory unsigned LEB128 operand.
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Bits[6:0] of this operand is the action code, all others bits are initialized
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to 0 except explicitly documented for one action. Please refer AArch64 DWARF
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ABI documentation for details. */
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DW_OP (DW_OP_AARCH64_operation, 0xea)
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DW_END_OP
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DW_END_OP
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DW_FIRST_ATE (DW_ATE_void, 0x0)
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DW_FIRST_ATE (DW_ATE_void, 0x0)
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@ -766,7 +772,8 @@ DW_CFA (DW_CFA_hi_user, 0x3f)
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/* SGI/MIPS specific. */
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/* SGI/MIPS specific. */
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DW_CFA (DW_CFA_MIPS_advance_loc8, 0x1d)
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DW_CFA (DW_CFA_MIPS_advance_loc8, 0x1d)
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/* GNU extensions. */
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/* GNU extensions.
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NOTE: DW_CFA_GNU_window_save is multiplexed on Sparc and AArch64. */
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DW_CFA (DW_CFA_GNU_window_save, 0x2d)
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DW_CFA (DW_CFA_GNU_window_save, 0x2d)
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DW_CFA (DW_CFA_GNU_args_size, 0x2e)
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DW_CFA (DW_CFA_GNU_args_size, 0x2e)
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DW_CFA (DW_CFA_GNU_negative_offset_extended, 0x2f)
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DW_CFA (DW_CFA_GNU_negative_offset_extended, 0x2f)
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