mirror of
https://github.com/darlinghq/darling-gdb.git
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Add support for disabling alignment checks when performing GDB interface
calls or SWI emulaiton routines. (Alignment checking code has not yet been contributed).
This commit is contained in:
parent
3078eca931
commit
917bca4f21
@ -1,3 +1,33 @@
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2001-02-27 Nick Clifton <nickc@redhat.com>
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* armvirt.c (GetWord): Add new parameter - check - to enable or
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disable the alignment checking.
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(PutWord): Add new parameter - check - to enable or disable the
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alignment checking.
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(ARMul_ReLoadInstr): Pass extra parameter to GetWord.
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(ARMul_ReadWord): Pass extra parameter to GetWord.
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(ARMul_WriteWord): Pass extra parameter to PutWord.
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(ARMul_StoreHalfWord): Pass extra parameter to PutWord.
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(ARMul_WriteByte): Pass extra parameter to GetWord.
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(ARMul_SwapWord): Pass extra parameter to PutWord.
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(ARMul_SafeReadByte): New Function: Read a byte but do not abort.
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(ARMul_SafeWriteByte): New Function: Write a byte but do not abort.
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* armdefs.h: Add prototypes for ARMul_SafeReadByte and
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ARMul_SafeWriteByte.
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* wrapper.c (sim_write): Use ARMul_SafeWriteByte.
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(sim_read): Use ARMul_SafeReadByte.
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* armos.c (in_SWI_handler): Remove.
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(SWIWrite0): Use ARMul_SafeReadByte.
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(WriteCommandLineTo): Use ARMul_SafeWriteByte.
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(SWIopen): Use ARMul_SafeReadByte.
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(SWIread): Use ARMul_SafeWriteByte.
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(SWIwrite): Use ARMul_SafeReadByte.
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(ARMul_OSHandleSWI): Remove use of is_SWI_handler.
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(ARMul_OSException): Remove use of is_SWI_handler.
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2001-02-16 Nick Clifton <nickc@redhat.com>
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* armemu.c: Remove Prefetch abort for breakpoints. Instead set
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@ -16,6 +16,7 @@
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Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
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#include "armdefs.h"
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#include "armos.h"
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#include "armemu.h"
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#include "ansidecl.h"
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@ -211,7 +212,7 @@ check_cp15_access (ARMul_State * state,
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/* Store a value into one of coprocessor 15's registers. */
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void
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write_cp15_reg (unsigned reg, unsigned opcode_2, unsigned CRm, ARMword value)
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write_cp15_reg (ARMul_State * state, unsigned reg, unsigned opcode_2, unsigned CRm, ARMword value)
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{
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if (opcode_2)
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{
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@ -324,9 +325,9 @@ write_cp15_reg (unsigned reg, unsigned opcode_2, unsigned CRm, ARMword value)
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return;
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}
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/* Return the value in a cp13 register. */
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/* Return the value in a cp15 register. */
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static ARMword
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ARMword
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read_cp15_reg (unsigned reg, unsigned opcode_2, unsigned CRm)
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{
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if (opcode_2 == 0)
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@ -364,7 +365,7 @@ XScale_cp15_LDC (ARMul_State * state, unsigned type, ARMword instr, ARMword data
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result = check_cp15_access (state, reg, 0, 0, 0);
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if (result == ARMul_DONE && type == ARMul_DATA)
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write_cp15_reg (reg, 0, 0, data);
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write_cp15_reg (state, reg, 0, 0, data);
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return result;
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}
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@ -416,7 +417,7 @@ XScale_cp15_MCR (ARMul_State * state,
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result = check_cp15_access (state, reg, CRm, BITS (21, 23), opcode_2);
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if (result == ARMul_DONE)
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write_cp15_reg (reg, opcode_2, CRm, value);
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write_cp15_reg (state, reg, opcode_2, CRm, value);
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return result;
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}
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@ -440,7 +441,7 @@ XScale_cp15_write_reg (ARMul_State * state ATTRIBUTE_UNUSED,
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{
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/* FIXME: Not sure what to do about the alternative register set
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here. For now default to just accessing CRm == 0 registers. */
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write_cp15_reg (reg, 0, 0, value);
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write_cp15_reg (state, reg, 0, 0, value);
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return TRUE;
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}
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@ -317,10 +317,13 @@ extern void ARMul_Ccycles (ARMul_State * state, unsigned number,
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extern ARMword ARMul_ReadWord (ARMul_State * state, ARMword address);
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extern ARMword ARMul_ReadByte (ARMul_State * state, ARMword address);
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extern ARMword ARMul_SafeReadByte (ARMul_State * state, ARMword address);
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extern void ARMul_WriteWord (ARMul_State * state, ARMword address,
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ARMword data);
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extern void ARMul_WriteByte (ARMul_State * state, ARMword address,
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ARMword data);
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extern void ARMul_SafeWriteByte (ARMul_State * state, ARMword address,
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ARMword data);
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extern ARMword ARMul_MemAccess (ARMul_State * state, ARMword, ARMword,
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ARMword, ARMword, ARMword, ARMword, ARMword,
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@ -1369,8 +1369,8 @@ ARMul_Emulate26 (register ARMul_State * state)
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value |= 0xc;
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write_cp14_reg (10, value);
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write_cp15_reg (5, 0, 0, 0x200); /* Set FSR. */
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write_cp15_reg (6, 0, 0, pc); /* Set FAR. */
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write_cp15_reg (state, 5, 0, 0, 0x200); /* Set FSR. */
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write_cp15_reg (state, 6, 0, 0, pc); /* Set FAR. */
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}
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else
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break;
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@ -491,6 +491,6 @@ extern void ARMul_CoProAttach (ARMul_State *, unsigned, ARMul_CPInits *, ARM
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ARMul_LDCs *, ARMul_STCs *, ARMul_MRCs *, ARMul_MCRs *,
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ARMul_CDPs *, ARMul_CPReads *, ARMul_CPWrites *);
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extern void ARMul_CoProDetach (ARMul_State *, unsigned);
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extern void write_cp15_reg (unsigned, unsigned, unsigned, ARMword);
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extern void write_cp15_reg (ARMul_State *, unsigned, unsigned, unsigned, ARMword);
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extern void write_cp14_reg (unsigned, ARMword);
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extern ARMword read_cp14_reg (unsigned);
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@ -139,9 +139,6 @@ static ARMword softvectorcode[] =
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0xe1a0f00e /* Default handler */
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};
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/* Set to prevent aborts when emulating SWI routines. */
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static int in_SWI_handler = 0;
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/* Time for the Operating System to initialise itself. */
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unsigned
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@ -260,7 +257,7 @@ SWIWrite0 (ARMul_State * state, ARMword addr)
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ARMword temp;
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struct OSblock *OSptr = (struct OSblock *) state->OSptr;
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while ((temp = ARMul_ReadByte (state, addr++)) != 0)
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while ((temp = ARMul_SafeReadByte (state, addr++)) != 0)
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(void) fputc ((char) temp, stdout);
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OSptr->ErrorNo = errno;
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@ -277,7 +274,7 @@ WriteCommandLineTo (ARMul_State * state, ARMword addr)
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do
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{
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temp = (ARMword) * cptr++;
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ARMul_WriteByte (state, addr++, temp);
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ARMul_SafeWriteByte (state, addr++, temp);
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}
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while (temp != 0);
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}
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@ -290,7 +287,7 @@ SWIopen (ARMul_State * state, ARMword name, ARMword SWIflags)
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int flags;
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int i;
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for (i = 0; (dummy[i] = ARMul_ReadByte (state, name + i)); i++)
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for (i = 0; (dummy[i] = ARMul_SafeReadByte (state, name + i)); i++)
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;
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/* Now we need to decode the Demon open mode. */
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@ -329,7 +326,7 @@ SWIread (ARMul_State * state, ARMword f, ARMword ptr, ARMword len)
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res = read (f, local, len);
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if (res > 0)
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for (i = 0; i < res; i++)
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ARMul_WriteByte (state, ptr + i, local[i]);
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ARMul_SafeWriteByte (state, ptr + i, local[i]);
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free (local);
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state->Reg[0] = res == -1 ? -1 : len - res;
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@ -352,7 +349,7 @@ SWIwrite (ARMul_State * state, ARMword f, ARMword ptr, ARMword len)
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}
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for (i = 0; i < len; i++)
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local[i] = ARMul_ReadByte (state, ptr + i);
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local[i] = ARMul_SafeReadByte (state, ptr + i);
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res = write (f, local, len);
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state->Reg[0] = res == -1 ? -1 : len - res;
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@ -393,8 +390,6 @@ ARMul_OSHandleSWI (ARMul_State * state, ARMword number)
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ARMword saved_number = 0;
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struct OSblock * OSptr = (struct OSblock *) state->OSptr;
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in_SWI_handler = 1;
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/* Intel do not want DEMON SWI support. */
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if (state->is_XScale)
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switch (number)
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@ -516,7 +511,6 @@ ARMul_OSHandleSWI (ARMul_State * state, ARMword number)
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case AngelSWI_Reason_EnterSVC:
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default:
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state->Emulate = FALSE;
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in_SWI_handler = 0;
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return FALSE;
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case AngelSWI_Reason_Clock:
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@ -539,7 +533,7 @@ ARMul_OSHandleSWI (ARMul_State * state, ARMword number)
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break;
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case AngelSWI_Reason_WriteC:
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(void) fputc ((int) ARMul_ReadByte (state, addr), stdout);
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(void) fputc ((int) ARMul_SafeReadByte (state, addr), stdout);
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OSptr->ErrorNo = errno;
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/* Fall thgrough. */
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@ -633,8 +627,6 @@ ARMul_OSHandleSWI (ARMul_State * state, ARMword number)
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break;
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default:
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in_SWI_handler = 0;
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/* If there is a SWI vector installed use it. */
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if (state->is_XScale && saved_number != -1)
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number = saved_number;
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@ -665,7 +657,6 @@ ARMul_OSHandleSWI (ARMul_State * state, ARMword number)
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}
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}
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in_SWI_handler = 0;
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return TRUE;
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}
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@ -682,11 +673,7 @@ ARMul_OSException (ARMul_State * state ATTRIBUTE_UNUSED,
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ARMword vector ATTRIBUTE_UNUSED,
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ARMword pc ATTRIBUTE_UNUSED)
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{
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/* If we are inside a SWI handler routine, then ignore any exceptions.
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They could be caused by data exceptions for misaligned reads, for
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example, but for the purposes of emulating a SWI, we do not care. */
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return in_SWI_handler;
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return FALSE;
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}
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#endif
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@ -24,6 +24,7 @@ freed as they might be needed again. A single area of memory may be
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defined to generate aborts. */
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#include "armopts.h"
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#include "armos.h"
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#include "armdefs.h"
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#include "ansidecl.h"
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@ -56,7 +57,7 @@ int SWI_vector_installed = FALSE;
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\***************************************************************************/
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static ARMword
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GetWord (ARMul_State * state, ARMword address)
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GetWord (ARMul_State * state, ARMword address, int check)
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{
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ARMword page;
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ARMword offset;
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@ -89,7 +90,7 @@ GetWord (ARMul_State * state, ARMword address)
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\***************************************************************************/
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static void
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PutWord (ARMul_State * state, ARMword address, ARMword data)
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PutWord (ARMul_State * state, ARMword address, ARMword data, int check)
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{
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ARMword page;
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ARMword offset;
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@ -191,8 +192,8 @@ ARMul_ReLoadInstr (ARMul_State * state, ARMword address, ARMword isize)
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if ((isize == 2) && (address & 0x2))
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{
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/* We return the next two halfwords: */
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ARMword lo = GetWord (state, address);
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ARMword hi = GetWord (state, address + 4);
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ARMword lo = GetWord (state, address, TRUE);
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ARMword hi = GetWord (state, address + 4, TRUE);
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if (state->bigendSig == HIGH)
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return (lo << 16) | (hi >> 16);
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@ -200,7 +201,7 @@ ARMul_ReLoadInstr (ARMul_State * state, ARMword address, ARMword isize)
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return ((hi & 0xFFFF) << 16) | (lo >> 16);
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}
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return GetWord (state, address);
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return GetWord (state, address, TRUE);
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}
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/***************************************************************************\
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@ -250,7 +251,7 @@ ARMword ARMul_ReadWord (ARMul_State * state, ARMword address)
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}
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#endif
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return GetWord (state, address);
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return GetWord (state, address, TRUE);
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}
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/***************************************************************************\
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@ -335,7 +336,7 @@ ARMul_WriteWord (ARMul_State * state, ARMword address, ARMword data)
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}
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#endif
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PutWord (state, address, data);
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PutWord (state, address, data, TRUE);
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}
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/***************************************************************************\
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@ -388,7 +389,8 @@ ARMul_StoreHalfWord (ARMul_State * state, ARMword address, ARMword data)
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offset = (((ARMword) state->bigendSig * 2) ^ (address & 2)) << 3; /* bit offset into the word */
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PutWord (state, address,
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(temp & ~(0xffffL << offset)) | ((data & 0xffffL) << offset));
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(temp & ~(0xffffL << offset)) | ((data & 0xffffL) << offset),
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TRUE);
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}
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/***************************************************************************\
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@ -404,7 +406,8 @@ ARMul_WriteByte (ARMul_State * state, ARMword address, ARMword data)
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offset = (((ARMword) state->bigendSig * 3) ^ (address & 3)) << 3; /* bit offset into the word */
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PutWord (state, address,
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(temp & ~(0xffL << offset)) | ((data & 0xffL) << offset));
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(temp & ~(0xffL << offset)) | ((data & 0xffL) << offset),
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TRUE);
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}
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/***************************************************************************\
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@ -444,7 +447,7 @@ ARMword ARMul_SwapWord (ARMul_State * state, ARMword address, ARMword data)
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state->NumNcycles++;
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PutWord (state, address, data);
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PutWord (state, address, data, TRUE);
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return temp;
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}
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@ -484,3 +487,30 @@ ARMul_Ccycles (ARMul_State * state, unsigned number, ARMword address ATTRIBUTE_U
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state->NumCcycles += number;
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ARMul_CLEARABORT;
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}
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/* Read a byte. Do not check for alignment or access errors. */
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ARMword
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ARMul_SafeReadByte (ARMul_State * state, ARMword address)
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{
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ARMword temp, offset;
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temp = GetWord (state, address, FALSE);
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offset = (((ARMword) state->bigendSig * 3) ^ (address & 3)) << 3;
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return (temp >> offset & 0xffL);
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}
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void
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ARMul_SafeWriteByte (ARMul_State * state, ARMword address, ARMword data)
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{
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ARMword temp, offset;
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temp = GetWord (state, address, FALSE);
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offset = (((ARMword) state->bigendSig * 3) ^ (address & 3)) << 3;
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PutWord (state, address,
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(temp & ~(0xffL << offset)) | ((data & 0xffL) << offset),
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FALSE);
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}
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@ -1,5 +1,5 @@
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/* run front end support for arm
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Copyright (C) 1995, 1996, 1997, 2000 Free Software Foundation, Inc.
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Copyright (C) 1995, 1996, 1997, 2000, 2001 Free Software Foundation, Inc.
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This file is part of ARM SIM.
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@ -126,7 +126,7 @@ sim_write (sd, addr, buffer, size)
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init ();
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for (i = 0; i < size; i++)
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ARMul_WriteByte (state, addr + i, buffer[i]);
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ARMul_SafeWriteByte (state, addr + i, buffer[i]);
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return size;
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}
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@ -139,11 +139,11 @@ sim_read (sd, addr, buffer, size)
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int size;
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{
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int i;
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init ();
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for (i = 0; i < size; i++)
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{
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buffer[i] = ARMul_ReadByte (state, addr + i);
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}
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buffer[i] = ARMul_SafeReadByte (state, addr + i);
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return size;
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}
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