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2007-05-22 Paul Brook <paul@codesourcery.com>
ld/testsuite/ * ld-arm/arm-pic-veneer.d: Update expected output. * ld-arm/arm-call.d: Ditto. bfd/ * elf32-arm.c (output_arch_syminfo): Replace plt_shndx and plt_offset with sec and sec_shndx. (elf32_arm_ouput_plt_map_sym): Use them. (elf32_arm_output_arch_local_syms): Output mapping symbols for interworking glue.
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@ -1,3 +1,11 @@
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2007-05-22 Paul Brook <paul@codesourcery.com>
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* elf32-arm.c (output_arch_syminfo): Replace plt_shndx and plt_offset
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with sec and sec_shndx.
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(elf32_arm_ouput_plt_map_sym): Use them.
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(elf32_arm_output_arch_local_syms): Output mapping symbols for
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interworking glue.
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2007-05-18 Paul Brook <paul@codesourcery.com>
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* elf32-arm.c (ARM2THUMB_V5_STATIC_GLUE_SIZE): Define.
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@ -10045,8 +10045,8 @@ typedef struct
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{
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void *finfo;
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struct bfd_link_info *info;
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int plt_shndx;
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bfd_vma plt_offset;
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asection *sec;
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int sec_shndx;
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bfd_boolean (*func) (void *, const char *, Elf_Internal_Sym *,
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asection *, struct elf_link_hash_entry *);
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} output_arch_syminfo;
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@ -10071,12 +10071,14 @@ elf32_arm_ouput_plt_map_sym (output_arch_syminfo *osi,
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Elf_Internal_Sym sym;
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htab = elf32_arm_hash_table (osi->info);
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sym.st_value = osi->plt_offset + offset;
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sym.st_value = osi->sec->output_section->vma
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+ osi->sec->output_offset
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+ offset;
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sym.st_size = 0;
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sym.st_other = 0;
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sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
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sym.st_shndx = osi->plt_shndx;
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if (!osi->func (osi->finfo, names[type], &sym, htab->splt, NULL))
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sym.st_shndx = osi->sec_shndx;
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if (!osi->func (osi->finfo, names[type], &sym, osi->sec, NULL))
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return FALSE;
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return TRUE;
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}
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@ -10157,7 +10159,7 @@ elf32_arm_output_plt_map (struct elf_link_hash_entry *h, void *inf)
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}
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/* Output mapping symbols for the PLT. */
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/* Output mapping symbols for linker generated sections. */
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static bfd_boolean
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elf32_arm_output_arch_local_syms (bfd *output_bfd,
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@ -10169,19 +10171,63 @@ elf32_arm_output_arch_local_syms (bfd *output_bfd,
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{
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output_arch_syminfo osi;
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struct elf32_arm_link_hash_table *htab;
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bfd_vma offset;
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bfd_size_type size;
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htab = elf32_arm_hash_table (info);
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if (!htab->splt || htab->splt->size == 0)
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return TRUE;
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check_use_blx(htab);
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osi.finfo = finfo;
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osi.info = info;
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osi.func = func;
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osi.plt_shndx = _bfd_elf_section_from_bfd_section (output_bfd,
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htab->splt->output_section);
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osi.plt_offset = htab->splt->output_section->vma;
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/* ARM->Thumb glue. */
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if (htab->arm_glue_size > 0)
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{
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osi.sec = bfd_get_section_by_name (htab->bfd_of_glue_owner,
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ARM2THUMB_GLUE_SECTION_NAME);
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osi.sec_shndx = _bfd_elf_section_from_bfd_section
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(output_bfd, osi.sec->output_section);
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if (info->shared || htab->root.is_relocatable_executable
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|| htab->pic_veneer)
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size = ARM2THUMB_PIC_GLUE_SIZE;
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else if (htab->use_blx)
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size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
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else
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size = ARM2THUMB_STATIC_GLUE_SIZE;
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for (offset = 0; offset < htab->arm_glue_size; offset += size)
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{
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elf32_arm_ouput_plt_map_sym (&osi, ARM_MAP_ARM, offset);
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elf32_arm_ouput_plt_map_sym (&osi, ARM_MAP_DATA, offset + size - 4);
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}
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}
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/* Thumb->ARM glue. */
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if (htab->thumb_glue_size > 0)
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{
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osi.sec = bfd_get_section_by_name (htab->bfd_of_glue_owner,
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THUMB2ARM_GLUE_SECTION_NAME);
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osi.sec_shndx = _bfd_elf_section_from_bfd_section
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(output_bfd, osi.sec->output_section);
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size = THUMB2ARM_GLUE_SIZE;
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for (offset = 0; offset < htab->thumb_glue_size; offset += size)
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{
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elf32_arm_ouput_plt_map_sym (&osi, ARM_MAP_THUMB, offset);
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elf32_arm_ouput_plt_map_sym (&osi, ARM_MAP_ARM, offset + 4);
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}
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}
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/* Finally, output mapping symbols for the PLT. */
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if (!htab->splt || htab->splt->size == 0)
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return TRUE;
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osi.sec_shndx = _bfd_elf_section_from_bfd_section (output_bfd,
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htab->splt->output_section);
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osi.sec = htab->splt;
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/* Output mapping symbols for the plt header. SymbianOS does not have a
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plt header. */
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if (htab->vxworks_p)
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@ -1,3 +1,8 @@
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2007-05-22 Paul Brook <paul@codesourcery.com>
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* ld-arm/arm-pic-veneer.d: Update expected output.
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* ld-arm/arm-call.d: Ditto.
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2007-05-22 Paul Brook <paul@codesourcery.com>
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* ld-arm-mixed-lib.d: Update expected output.
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@ -49,8 +49,8 @@ Disassembly of section .text:
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0000805c <__t1_from_arm>:
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805c: e51ff004 ldr pc, \[pc, #-4\] ; 8060 <__t1_from_arm\+0x4>
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8060: 00008041 andeq r8, r0, r1, asr #32
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8060: 00008041 .word 0x00008041
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00008064 <__t2_from_arm>:
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8064: e51ff004 ldr pc, \[pc, #-4\] ; 8068 <__t2_from_arm\+0x4>
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8068: 00008043 andeq r8, r0, r3, asr #32
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8068: 00008043 .word 0x00008043
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@ -14,4 +14,4 @@ Disassembly of section .text:
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8008: e59fc004 ldr ip, \[pc, #4\] ; 8014 <__foo_from_arm\+0xc>
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800c: e08cc00f add ip, ip, pc
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8010: e12fff1c bx ip
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8014: fffffff1 undefined instruction 0xfffffff1
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8014: fffffff1 .word 0xfffffff1
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