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Wed Nov 18 21:36:37 1998 Dave Brolley <brolley@cygnus.com>
* fr30-opc.c: Regenerated. * fr30-opc.h: Regenerated.
This commit is contained in:
Dave Brolley
parent
27c12d6196
commit
9225e69cb3
@ -1,3 +1,10 @@
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start-sanitize-fr30
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Wed Nov 18 21:36:37 1998 Dave Brolley <brolley@cygnus.com>
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* fr30-opc.c: Regenerated.
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* fr30-opc.h: Regenerated.
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end-sanitize-fr30
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1998-11-18 Doug Evans <devans@casey.cygnus.com>
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* cgen-asm.in (insert_1): Replace calls to bfd_getb8/putb8.
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@ -209,6 +209,7 @@ static const CGEN_ATTR_ENTRY MACH_attr[] =
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const CGEN_ATTR_TABLE fr30_cgen_hardware_attr_table[] =
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{
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{ "CACHE-ADDR", NULL },
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{ "FUN-ACCESS", NULL },
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{ "PC", NULL },
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{ "PROFILE", NULL },
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{ 0, 0 }
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@ -288,7 +289,7 @@ CGEN_KEYWORD fr30_cgen_opval_h_dr =
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CGEN_KEYWORD_ENTRY fr30_cgen_opval_h_ps_entries[] =
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{
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{ "ps", 1 }
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{ "ps", 0 }
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};
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CGEN_KEYWORD fr30_cgen_opval_h_ps =
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@ -299,7 +300,7 @@ CGEN_KEYWORD fr30_cgen_opval_h_ps =
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CGEN_KEYWORD_ENTRY fr30_cgen_opval_h_r13_entries[] =
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{
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{ "r13", 13 }
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{ "r13", 0 }
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};
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CGEN_KEYWORD fr30_cgen_opval_h_r13 =
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@ -310,7 +311,7 @@ CGEN_KEYWORD fr30_cgen_opval_h_r13 =
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CGEN_KEYWORD_ENTRY fr30_cgen_opval_h_r14_entries[] =
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{
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{ "r14", 14 }
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{ "r14", 0 }
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};
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CGEN_KEYWORD fr30_cgen_opval_h_r14 =
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@ -321,7 +322,7 @@ CGEN_KEYWORD fr30_cgen_opval_h_r14 =
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CGEN_KEYWORD_ENTRY fr30_cgen_opval_h_r15_entries[] =
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{
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{ "r15", 15 }
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{ "r15", 0 }
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};
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CGEN_KEYWORD fr30_cgen_opval_h_r15 =
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@ -344,7 +345,7 @@ static const CGEN_HW_ENTRY fr30_cgen_hw_entries[] =
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{ HW_H_IADDR, & HW_ENT (HW_H_IADDR + 1), "h-iaddr", CGEN_ASM_KEYWORD, (PTR) 0, { 0, 0, { 0 } } },
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{ HW_H_GR, & HW_ENT (HW_H_GR + 1), "h-gr", CGEN_ASM_KEYWORD, (PTR) & fr30_cgen_opval_h_gr, { 0, 0|(1<<CGEN_HW_CACHE_ADDR)|(1<<CGEN_HW_PROFILE), { 0 } } },
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{ HW_H_DR, & HW_ENT (HW_H_DR + 1), "h-dr", CGEN_ASM_KEYWORD, (PTR) & fr30_cgen_opval_h_dr, { 0, 0, { 0 } } },
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{ HW_H_PS, & HW_ENT (HW_H_PS + 1), "h-ps", CGEN_ASM_KEYWORD, (PTR) & fr30_cgen_opval_h_ps, { 0, 0, { 0 } } },
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{ HW_H_PS, & HW_ENT (HW_H_PS + 1), "h-ps", CGEN_ASM_KEYWORD, (PTR) & fr30_cgen_opval_h_ps, { 0, 0|(1<<CGEN_HW_FUN_ACCESS), { 0 } } },
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{ HW_H_R13, & HW_ENT (HW_H_R13 + 1), "h-r13", CGEN_ASM_KEYWORD, (PTR) & fr30_cgen_opval_h_r13, { 0, 0, { 0 } } },
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{ HW_H_R14, & HW_ENT (HW_H_R14 + 1), "h-r14", CGEN_ASM_KEYWORD, (PTR) & fr30_cgen_opval_h_r14, { 0, 0, { 0 } } },
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{ HW_H_R15, & HW_ENT (HW_H_R15 + 1), "h-r15", CGEN_ASM_KEYWORD, (PTR) & fr30_cgen_opval_h_r15, { 0, 0, { 0 } } },
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@ -352,6 +353,8 @@ static const CGEN_HW_ENTRY fr30_cgen_hw_entries[] =
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{ HW_H_ZBIT, & HW_ENT (HW_H_ZBIT + 1), "h-zbit", CGEN_ASM_KEYWORD, (PTR) 0, { 0, 0, { 0 } } },
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{ HW_H_VBIT, & HW_ENT (HW_H_VBIT + 1), "h-vbit", CGEN_ASM_KEYWORD, (PTR) 0, { 0, 0, { 0 } } },
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{ HW_H_CBIT, & HW_ENT (HW_H_CBIT + 1), "h-cbit", CGEN_ASM_KEYWORD, (PTR) 0, { 0, 0, { 0 } } },
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{ HW_H_IBIT, & HW_ENT (HW_H_IBIT + 1), "h-ibit", CGEN_ASM_KEYWORD, (PTR) 0, { 0, 0, { 0 } } },
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{ HW_H_SBIT, & HW_ENT (HW_H_SBIT + 1), "h-sbit", CGEN_ASM_KEYWORD, (PTR) 0, { 0, 0, { 0 } } },
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{ 0 }
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};
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@ -440,18 +443,24 @@ const CGEN_OPERAND fr30_cgen_operand_table[MAX_OPERANDS] =
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/* cc: condition codes */
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{ "cc", & HW_ENT (HW_H_UINT), 4, 4,
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{ 0, 0|(1<<CGEN_OPERAND_UNSIGNED), { 0 } } },
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/* nbit: negative bit */
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/* nbit: negative bit */
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{ "nbit", & HW_ENT (HW_H_NBIT), 0, 0,
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{ 0, 0|(1<<CGEN_OPERAND_SEM_ONLY), { 0 } } },
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/* vbit: overflow bit */
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/* vbit: overflow bit */
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{ "vbit", & HW_ENT (HW_H_VBIT), 0, 0,
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{ 0, 0|(1<<CGEN_OPERAND_SEM_ONLY), { 0 } } },
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/* zbit: zero bit */
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/* zbit: zero bit */
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{ "zbit", & HW_ENT (HW_H_ZBIT), 0, 0,
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{ 0, 0|(1<<CGEN_OPERAND_SEM_ONLY), { 0 } } },
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/* cbit: carry bit */
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/* cbit: carry bit */
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{ "cbit", & HW_ENT (HW_H_CBIT), 0, 0,
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{ 0, 0|(1<<CGEN_OPERAND_SEM_ONLY), { 0 } } },
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/* ibit: interrupt bit */
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{ "ibit", & HW_ENT (HW_H_IBIT), 0, 0,
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{ 0, 0|(1<<CGEN_OPERAND_SEM_ONLY), { 0 } } },
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/* sbit: stack bit */
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{ "sbit", & HW_ENT (HW_H_SBIT), 0, 0,
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{ 0, 0|(1<<CGEN_OPERAND_SEM_ONLY), { 0 } } },
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};
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/* Operand references. */
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@ -601,6 +610,38 @@ static const CGEN_OPERAND_INSTANCE fmt_ldi32_ops[] = {
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{ 0 }
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};
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static const CGEN_OPERAND_INSTANCE fmt_mov2dr_ops[] = {
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{ INPUT, "Ri", & HW_ENT (HW_H_GR), CGEN_MODE_SI, & OP_ENT (RI), 0, 0 },
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{ OUTPUT, "Rs1", & HW_ENT (HW_H_DR), CGEN_MODE_USI, & OP_ENT (RS1), 0, 0 },
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{ 0 }
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};
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static const CGEN_OPERAND_INSTANCE fmt_int_ops[] = {
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{ INPUT, "h_dr_2", & HW_ENT (HW_H_DR), CGEN_MODE_USI, 0, 2, 0 },
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{ INPUT, "ps", & HW_ENT (HW_H_PS), CGEN_MODE_USI, 0, 0, 0 },
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{ INPUT, "pc", & HW_ENT (HW_H_PC), CGEN_MODE_USI, 0, 0, 0 },
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{ INPUT, "u8", & HW_ENT (HW_H_UINT), CGEN_MODE_SI, & OP_ENT (U8), 0, 0 },
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{ OUTPUT, "h_dr_2", & HW_ENT (HW_H_DR), CGEN_MODE_USI, 0, 2, 0 },
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{ OUTPUT, "h_memory_reg__VM_h_dr_2", & HW_ENT (HW_H_MEMORY), CGEN_MODE_USI, 0, 0, 0 },
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{ OUTPUT, "ibit", & HW_ENT (HW_H_IBIT), CGEN_MODE_BI, 0, 0, 0 },
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{ OUTPUT, "sbit", & HW_ENT (HW_H_SBIT), CGEN_MODE_BI, 0, 0, 0 },
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{ OUTPUT, "pc", & HW_ENT (HW_H_PC), CGEN_MODE_SI, 0, 0, 0 },
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{ 0 }
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};
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static const CGEN_OPERAND_INSTANCE fmt_reti_ops[] = {
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{ INPUT, "sbit", & HW_ENT (HW_H_SBIT), CGEN_MODE_BI, 0, 0, 0 },
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{ INPUT, "h_dr_2", & HW_ENT (HW_H_DR), CGEN_MODE_USI, 0, 2, COND_REF },
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{ INPUT, "h_memory_reg__VM_h_dr_2", & HW_ENT (HW_H_MEMORY), CGEN_MODE_USI, 0, 0, COND_REF },
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{ INPUT, "h_dr_3", & HW_ENT (HW_H_DR), CGEN_MODE_USI, 0, 3, COND_REF },
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{ INPUT, "h_memory_reg__VM_h_dr_3", & HW_ENT (HW_H_MEMORY), CGEN_MODE_USI, 0, 0, COND_REF },
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{ OUTPUT, "pc", & HW_ENT (HW_H_PC), CGEN_MODE_USI, 0, 0, COND_REF },
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{ OUTPUT, "h_dr_2", & HW_ENT (HW_H_DR), CGEN_MODE_USI, 0, 2, COND_REF },
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{ OUTPUT, "ps", & HW_ENT (HW_H_PS), CGEN_MODE_USI, 0, 0, COND_REF },
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{ OUTPUT, "h_dr_3", & HW_ENT (HW_H_DR), CGEN_MODE_USI, 0, 3, COND_REF },
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{ 0 }
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};
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#undef INPUT
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#undef OUTPUT
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#undef COND_REF
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@ -1372,7 +1413,7 @@ const CGEN_INSN fr30_cgen_insn_table_entries[MAX_INSNS] =
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FR30_INSN_MOV2DR, "mov2dr", "mov",
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{ { MNEM, ' ', OP (RI), ',', OP (RS1), 0 } },
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{ 16, 16, 0xff00 }, 0xb300,
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(PTR) 0,
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(PTR) & fmt_mov2dr_ops[0],
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{ 0, 0, { 0 } }
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},
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/* mov $Ri,$ps */
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@ -1462,8 +1503,8 @@ const CGEN_INSN fr30_cgen_insn_table_entries[MAX_INSNS] =
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FR30_INSN_INT, "int", "int",
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{ { MNEM, ' ', OP (U8), 0 } },
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{ 16, 16, 0xff00 }, 0x1f00,
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(PTR) 0,
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{ 0, 0, { 0 } }
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(PTR) & fmt_int_ops[0],
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{ 0, 0|A(UNCOND_CTI), { 0 } }
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},
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/* inte */
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{
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@ -1480,8 +1521,8 @@ const CGEN_INSN fr30_cgen_insn_table_entries[MAX_INSNS] =
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FR30_INSN_RETI, "reti", "reti",
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{ { MNEM, 0 } },
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{ 16, 16, 0xffff }, 0x9730,
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(PTR) 0,
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{ 0, 0, { 0 } }
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(PTR) & fmt_reti_ops[0],
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{ 0, 0|A(COND_CTI)|A(COND_CTI), { 0 } }
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},
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/* bra $label9 */
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{
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@ -115,22 +115,22 @@ typedef enum h_dr {
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/* Enum declaration for program status. */
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typedef enum h_ps {
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H_PS_PS = 1
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H_PS_PS
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} H_PS;
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/* Enum declaration for General Register 13 explicitely required. */
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typedef enum h_r13 {
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H_R13_R13 = 13
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H_R13_R13
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} H_R13;
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/* Enum declaration for General Register 14 explicitely required. */
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typedef enum h_r14 {
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H_R14_R14 = 14
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H_R14_R14
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} H_R14;
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/* Enum declaration for General Register 15 explicitely required. */
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typedef enum h_r15 {
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H_R15_R15 = 15
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H_R15_R15
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} H_R15;
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/* Enum declaration for fr30 operand types. */
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@ -142,7 +142,8 @@ typedef enum cgen_operand_type {
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, FR30_OPERAND_DISP10, FR30_OPERAND_S10, FR30_OPERAND_U10, FR30_OPERAND_I32
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, FR30_OPERAND_DIR8, FR30_OPERAND_DIR9, FR30_OPERAND_DIR10, FR30_OPERAND_LABEL9
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, FR30_OPERAND_LABEL12, FR30_OPERAND_CC, FR30_OPERAND_NBIT, FR30_OPERAND_VBIT
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, FR30_OPERAND_ZBIT, FR30_OPERAND_CBIT, FR30_OPERAND_MAX
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, FR30_OPERAND_ZBIT, FR30_OPERAND_CBIT, FR30_OPERAND_IBIT, FR30_OPERAND_SBIT
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, FR30_OPERAND_MAX
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} CGEN_OPERAND_TYPE;
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/* Non-boolean attributes. */
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@ -159,13 +160,13 @@ typedef enum mach_attr {
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#define MAX_OPERANDS ((int) FR30_OPERAND_MAX)
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/* Maximum number of operands referenced by any insn. */
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#define MAX_OPERAND_INSTANCES 8
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#define MAX_OPERAND_INSTANCES 9
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/* Hardware, operand and instruction attribute indices. */
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/* Enum declaration for cgen_hw attrs. */
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typedef enum cgen_hw_attr {
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CGEN_HW_CACHE_ADDR, CGEN_HW_PC, CGEN_HW_PROFILE
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CGEN_HW_CACHE_ADDR, CGEN_HW_FUN_ACCESS, CGEN_HW_PC, CGEN_HW_PROFILE
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} CGEN_HW_ATTR;
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/* Number of non-boolean elements in cgen_hw. */
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@ -287,7 +288,7 @@ typedef enum hw_type {
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, HW_H_ADDR, HW_H_IADDR, HW_H_GR, HW_H_DR
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, HW_H_PS, HW_H_R13, HW_H_R14, HW_H_R15
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, HW_H_NBIT, HW_H_ZBIT, HW_H_VBIT, HW_H_CBIT
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, HW_MAX
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, HW_H_IBIT, HW_H_SBIT, HW_MAX
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} HW_TYPE;
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#define MAX_HW ((int) HW_MAX)
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