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Support for more portable alignment handling in assembly code, based on patches
from Bryan Ford <baford@schirf.cs.utah.edu>: * read.c (potable): Added balign and p2align, for aligning by bytes or powers of two independent of what ".align" does for a given target. * doc/as.texinfo: Document them.
This commit is contained in:
Ken Raeburn
parent
094a7e4392
commit
931a8fab1b
@ -1,3 +1,12 @@
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Wed Apr 26 15:54:10 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
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Support for more portable alignment handling in assembly code,
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based on patches from Bryan Ford <baford@schirf.cs.utah.edu>:
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* read.c (potable): Added balign and p2align, for aligning by
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bytes or powers of two independent of what ".align" does for a
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given target.
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* doc/as.texinfo: Document them.
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Tue Apr 25 11:12:04 1995 Rob Savoye <rob@thepub.cygnus.com>
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* configure, configure.in: Look for m68k-*-vxworks* rather than
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@ -208,7 +208,7 @@ Here is a brief summary of how to invoke @code{@value{AS}}. For details,
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@c HPPA has no machine-dependent assembler options (yet).
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@end ifset
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@ifset SPARC
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[ -Av6 | -Av7 | -Av8 | -Asparclite | -bump ]
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[ -Av6 | -Av7 | -Av8 | -Av9 | -Asparclite | -bump ]
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@end ifset
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@ifset Z8000
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@c Z8000 has no machine-dependent assembler options
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@ -367,7 +367,7 @@ The following options are available when @code{@value{AS}} is configured
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for the SPARC architecture:
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@table @code
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@item -Av6 | -Av7 | -Av8 | -Asparclite
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@item -Av6 | -Av7 | -Av8 | -Av9 | -Asparclite
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Explicitly select a variant of the SPARC architecture.
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@item -bump
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@ -2653,6 +2653,7 @@ Some machine configurations provide additional directives.
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* App-File:: @code{.app-file @var{string}}
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* Ascii:: @code{.ascii "@var{string}"}@dots{}
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* Asciz:: @code{.asciz "@var{string}"}@dots{}
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* Balign:: @code{.balign @var{abs-expr} , @var{abs-expr}}
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* Byte:: @code{.byte @var{expressions}}
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* Comm:: @code{.comm @var{symbol} , @var{length} }
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* Data:: @code{.data @var{subsection}}
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@ -2704,6 +2705,7 @@ Some machine configurations provide additional directives.
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* Nolist:: @code{.nolist}
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* Octa:: @code{.octa @var{bignums}}
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* Org:: @code{.org @var{new-lc} , @var{fill}}
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* P2align:: @code{.p2align @var{abs-expr} , @var{abs-expr}}
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* Psize:: @code{.psize @var{lines}, @var{columns}}
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* Quad:: @code{.quad @var{bignums}}
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* Sbttl:: @code{.sbttl "@var{subheading}"}
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@ -2774,21 +2776,29 @@ but ignores it.
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@cindex @code{align} directive
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Pad the location counter (in the current subsection) to a particular
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storage boundary. The first expression (which must be absolute) is the
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alignment required, as described below.
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The second expression (also absolute) gives the value to be stored in
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the padding bytes. It (and the comma) may be omitted. If it is
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omitted, the padding bytes are zero.
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The way the required alignment is specified varies from system to system.
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For the a29k, HPPA, m86k, m88k, w65, sparc, and i386 using ELF format,
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the first expression is the
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alignment request in bytes. For example @samp{.align 8} advances
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the location counter until it is a multiple of 8. If the location counter
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is already a multiple of 8, no change is needed.
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For other systems, including the i386 using a.out format, it is the
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number of low-order zero bits the location counter must have after
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advancement. For example @samp{.align 3} advances the location
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counter until it a multiple of 8. If the location counter is already a
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multiple of 8, no change is needed.
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@ifset HPPA
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For the HPPA, the first expression (which must be absolute) is the
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alignment request in bytes. For example @samp{.align 8} advances
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the location counter until it is a multiple of 8. If the location counter
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is already a multiple of 8, no change is needed.
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@end ifset
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The second expression (also absolute) gives the value to be stored in
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the padding bytes. It (and the comma) may be omitted. If it is
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omitted, the padding bytes are zero.
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This inconsistency is due to the different behaviors of the various
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native assemblers for these systems which GAS must emulate.
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GAS also provides @code{.balign} and @code{.p2align} directives,
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described later, which have a consistent behavior across all
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architectures (but are specific to GAS).
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@node App-File
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@section @code{.app-file @var{string}}
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@ -2826,6 +2836,21 @@ trailing zero byte) into consecutive addresses.
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@code{.asciz} is just like @code{.ascii}, but each string is followed by
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a zero byte. The ``z'' in @samp{.asciz} stands for ``zero''.
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@node Balign
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@section @code{.balign @var{abs-expr} , @var{abs-expr}}
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@cindex padding the location counter given number of bytes
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@cindex @code{balign} directive
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Pad the location counter (in the current subsection) to a particular
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storage boundary. The first expression (which must be absolute) is the
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alignment request in bytes. For example @samp{.balign 8} advances
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the location counter until it is a multiple of 8. If the location counter
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is already a multiple of 8, no change is needed.
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The second expression (also absolute) gives the value to be stored in
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the padding bytes. It (and the comma) may be omitted. If it is
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omitted, the padding bytes are zero.
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@node Byte
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@section @code{.byte @var{expressions}}
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@ -3378,6 +3403,22 @@ intervening bytes are filled with @var{fill} which should be an
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absolute expression. If the comma and @var{fill} are omitted,
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@var{fill} defaults to zero.
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@node P2align
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@section @code{.p2align @var{abs-expr} , @var{abs-expr}}
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@cindex padding the location counter given a power of two
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@cindex @code{p2align} directive
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Pad the location counter (in the current subsection) to a particular
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storage boundary. The first expression (which must be absolute) is the
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number of low-order zero bits the location counter must have after
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advancement. For example @samp{.p2align 3} advances the location
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counter until it a multiple of 8. If the location counter is already a
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multiple of 8, no change is needed.
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The second expression (also absolute) gives the value to be stored in
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the padding bytes. It (and the comma) may be omitted. If it is
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omitted, the padding bytes are zero.
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@node Psize
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@section @code{.psize @var{lines} , @var{columns}}
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@ -5912,42 +5953,42 @@ The following addressing modes are understood:
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@samp{#@var{digits}}
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@item Data Register
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@samp{d0} through @samp{d7}
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@samp{%d0} through @samp{%d7}
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@item Address Register
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@samp{a0} through @samp{a7}@*
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@samp{a7} is also known as @samp{sp}, i.e. the Stack Pointer. @code{a6}
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is also known as @samp{fp}, the Frame Pointer.
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@samp{%a0} through @samp{%a7}@*
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@samp{%a7} is also known as @samp{%sp}, i.e. the Stack Pointer. @code{%a6}
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is also known as @samp{%fp}, the Frame Pointer.
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@item Address Register Indirect
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@samp{a0@@} through @samp{a7@@}
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@samp{%a0@@} through @samp{%a7@@}
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@item Address Register Postincrement
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@samp{a0@@+} through @samp{a7@@+}
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@samp{%a0@@+} through @samp{%a7@@+}
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@item Address Register Predecrement
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@samp{a0@@-} through @samp{a7@@-}
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@samp{%a0@@-} through @samp{%a7@@-}
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@item Indirect Plus Offset
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@samp{@var{apc}@@(@var{digits})}
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@samp{%@var{apc}@@(@var{digits})}
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@item Index
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@samp{@var{apc}@@(@var{digits},@var{register}:@var{size}:@var{scale})}
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@samp{%@var{apc}@@(@var{digits},%@var{register}:@var{size}:@var{scale})}
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or @samp{@var{apc}@@(@var{register}:@var{size}:@var{scale})}
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or @samp{%@var{apc}@@(%@var{register}:@var{size}:@var{scale})}
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@item Postindex
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@samp{@var{apc}@@(@var{digits})@@(@var{digits},@var{register}:@var{size}:@var{scale})}
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@samp{%@var{apc}@@(@var{digits})@@(@var{digits},%@var{register}:@var{size}:@var{scale})}
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or @samp{@var{apc}@@(@var{digits})@@(@var{register}:@var{size}:@var{scale})}
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or @samp{%@var{apc}@@(@var{digits})@@(%@var{register}:@var{size}:@var{scale})}
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@item Preindex
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@samp{@var{apc}@@(@var{digits},@var{register}:@var{size}:@var{scale})@@(@var{digits})}
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@samp{%@var{apc}@@(@var{digits},%@var{register}:@var{size}:@var{scale})@@(@var{digits})}
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or @samp{@var{apc}@@(@var{register}:@var{size}:@var{scale})@@(@var{digits})}
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or @samp{%@var{apc}@@(%@var{register}:@var{size}:@var{scale})@@(@var{digits})}
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@item Memory Indirect
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@samp{@var{apc}@@(@var{digits})@@(@var{digits})}
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@samp{%@var{apc}@@(@var{digits})@@(@var{digits})}
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@item Absolute
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@samp{@var{symbol}}, or @samp{@var{digits}}
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@ -5959,13 +6000,12 @@ by @samp{:b}, @samp{:w}, or @samp{:l}.
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@end ignore
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@end table
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For some configurations, especially those where the compiler normally
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does not prepend an underscore to the names of user variables, the
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assembler requires a @samp{%} before any use of a register name. This
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is intended to let the assembler distinguish between user variables and
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registers named @samp{a0} through @samp{a7}, and so on. The @samp{%} is
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always accepted, but is only required for some configurations, notably
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@samp{m68k-coff}.
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For some configurations, especially those where the compiler normally does not
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prepend an underscore to the names of user variables, the assembler requires a
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@samp{%} before any use of a register name. This is intended to let the
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assembler distinguish between C variables and registers named @samp{a0} through
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@samp{a7}, and so on. The @samp{%} is always accepted, but is not required for
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certain configurations, notably @samp{sun3}.
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@node M68K-Moto-Syntax
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@section Motorola Syntax
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@ -5973,53 +6013,43 @@ always accepted, but is only required for some configurations, notably
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@cindex Motorola syntax for the 680x0
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@cindex alternate syntax for the 680x0
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The standard Motorola syntax for this chip differs from the syntax
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already discussed (@pxref{M68K-Syntax,,Syntax}). @code{@value{AS}} can
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accept some forms of Motorola syntax for operands, even if @sc{mit} syntax is
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used for other operands in the same instruction. The
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two kinds of syntax are fully compatible; our support for Motorola syntax is
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simply incomplete at present.
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@ignore
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@c FIXME! I can't figure out what this means. Surely the "always" is in some
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@c restricted context, for instance. It's not necessary for the preceding text
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@c to explain this, so just ignore it for now; re-enable someday when someone
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@c has time to explain it better.
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, because the Motorola syntax never uses
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the @samp{@@} character and the @sc{mit} syntax always does, except in
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cases where the syntaxes are identical.
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@end ignore
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The standard Motorola syntax for this chip differs from the syntax already
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discussed (@pxref{M68K-Syntax,,Syntax}). @code{@value{AS}} can accept some
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forms of Motorola syntax for operands, even if @sc{mit} syntax is used for
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other operands in the same instruction. The two kinds of syntax are fully
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compatible; our support for Motorola syntax is simply incomplete at present.
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@cindex M680x0 syntax
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@cindex syntax, M680x0
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In particular, you may write or generate M68K assembler with the
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following conventions:
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(In the following table @dfn{apc} stands for any of the address
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registers (@samp{a0} through @samp{a7}), nothing, (@samp{}), the
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Program Counter (@samp{pc}), or the zero-address relative to the
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program counter (@samp{zpc}).)
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(In the following table @dfn{%apc} stands for any of the address registers
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(@samp{%a0} through @samp{%a7}), nothing (@samp{}), the Program Counter
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(@samp{%pc}), or the zero-address relative to the program counter
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(@samp{%zpc}).)
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@cindex M680x0 addressing modes
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@cindex addressing modes, M680x0
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The following additional addressing modes are understood:
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@table @dfn
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@item Address Register Indirect
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@samp{a0} through @samp{a7}@*
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@samp{a7} is also known as @samp{sp}, i.e. the Stack Pointer. @code{a6}
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is also known as @samp{fp}, the Frame Pointer.
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@samp{%a0} through @samp{%a7}@*
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@samp{%a7} is also known as @samp{%sp}, i.e. the Stack Pointer. @code{%a6}
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is also known as @samp{%fp}, the Frame Pointer.
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@item Address Register Postincrement
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@samp{(a0)+} through @samp{(a7)+}
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@samp{(%a0)+} through @samp{(%a7)+}
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@item Address Register Predecrement
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@samp{-(a0)} through @samp{-(a7)}
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@samp{-(%a0)} through @samp{-(%a7)}
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@item Indirect Plus Offset
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@samp{@var{digits}(@var{apc})}
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@samp{@var{digits}(%@var{apc})}
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@item Index
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@samp{@var{digits}(@var{apc},(@var{register}.@var{size}*@var{scale}))}@*
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or @samp{(@var{apc},@var{register}.@var{size}*@var{scale})}@*
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@samp{@var{digits}(%@var{apc},(%@var{register}.@var{size}*@var{scale}))}@*
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or @samp{(%@var{apc},%@var{register}.@var{size}*@var{scale})}@*
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In either case, @var{size} and @var{scale} are optional
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(@var{scale} defaults to @samp{1}, @var{size} defaults to @samp{l}).
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@var{scale} can be @samp{1}, @samp{2}, @samp{4}, or @samp{8}.
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@ -6284,10 +6314,11 @@ successively higher architectures as it encounters instructions that
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only exist in the higher levels.
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@table @code
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@item -Av6 | -Av7 | -Av8 | -Asparclite
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@item -Av6 | -Av7 | -Av8 | -Av9 | -Asparclite
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@kindex -Av6
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@kindex Av7
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@kindex -Av8
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@kindex -Av9
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@kindex -Asparclite
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Use one of the @samp{-A} options to select one of the SPARC
|
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architectures explicitly. If you select an architecture explicitly,
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@ -6322,6 +6353,10 @@ The Sparc version of @code{@value{AS}} supports the following additional
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machine directives:
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@table @code
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@item .align
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@cindex @code{align} directive, SPARC
|
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This must be followed by the desired alignment in bytes.
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@item .common
|
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@cindex @code{common} directive, SPARC
|
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This must be followed by a symbol name, a positive number, and
|
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@ -6355,8 +6390,13 @@ This is functionally identical to the @code{.space} directive.
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@item .word
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@cindex @code{word} directive, SPARC
|
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On the Sparc, the .word directive produces 32 bit values,
|
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On the Sparc, the @code{.word} directive produces 32 bit values,
|
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instead of the 16 bit values it produces on many other machines.
|
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|
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@item .xword
|
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@cindex @code{xword} directive, SPARC
|
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On the Sparc V9 processor, the @code{.xword} directive produces
|
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64 bit values.
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@end table
|
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|
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@end ifset
|
||||
@ -6382,6 +6422,7 @@ instead of the 16 bit values it produces on many other machines.
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* i386-Memory:: Memory References
|
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* i386-jumps:: Handling of Jump Instructions
|
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* i386-Float:: Floating Point
|
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* i386-16bit:: Writing 16-bit Code
|
||||
* i386-Notes:: Notes
|
||||
@end menu
|
||||
|
||||
@ -6758,6 +6799,51 @@ of the @samp{fn@dots{}} instructions. For example, @samp{fsave} and
|
||||
instructions are made equivalent to @samp{f@dots{}} instructions. If
|
||||
@samp{fwait} is desired it must be explicitly coded.
|
||||
|
||||
@node i386-16bit
|
||||
@section Writing 16-bit Code
|
||||
|
||||
@cindex i386 16-bit code
|
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@cindex 16-bit code, i386
|
||||
@cindex real-mode code, i386
|
||||
@cindex @code{code16} directive, i386
|
||||
@cindex @code{code32} directive, i386
|
||||
While GAS normally writes only ``pure'' 32-bit i386 code, it has limited
|
||||
support for writing code to run in real mode or in 16-bit protected mode
|
||||
code segments. To do this, insert a @samp{.code16} directive before the
|
||||
assembly language instructions to be run in 16-bit mode. You can switch
|
||||
GAS back to writing normal 32-bit code with the @samp{.code32} directive.
|
||||
|
||||
GAS understands exactly the same assembly language syntax in 16-bit mode as
|
||||
in 32-bit mode. The function of any given instruction is exactly the same
|
||||
regardless of mode, as long as the resulting object code is executed in the
|
||||
mode for which GAS wrote it. So, for example, the @samp{ret} mnemonic
|
||||
produces a 32-bit return instruction regardless of whether it is to be run
|
||||
in 16-bit or 32-bit mode. (If GAS is in 16-bit mode, it will add an
|
||||
operand size prefix to the instruction to force it to be a 32-bit return.)
|
||||
|
||||
This means, for one thing, that you can use GNU CC to write code to be run
|
||||
in real mode or 16-bit protected mode. Just insert the statement
|
||||
@samp{asm(".code16");} at the beginning of your C source file, and while
|
||||
GNU CC will still be generating 32-bit code, GAS will automatically add all
|
||||
the necessary size prefixes to make that code run in 16-bit mode. Of
|
||||
course, since GNU CC only writes small-model code (it doesn't know how to
|
||||
attach segment selectors to pointers like native x86 compilers do), any
|
||||
16-bit code you write with GNU CC will essentially be limited to a 64K
|
||||
address space. Also, there will be a code size and performance penalty
|
||||
due to all the extra address and operand size prefixes GAS has to add to
|
||||
the instructions.
|
||||
|
||||
Note that placing GAS in 16-bit mode does not mean that the resulting
|
||||
code will necessarily run on a 16-bit pre-80386 processor. To write code
|
||||
that runs on such a processor, you would have to refrain from using
|
||||
@emph{any} 32-bit constructs which require GAS to output address or
|
||||
operand size prefixes. At the moment this would be rather difficult,
|
||||
because GAS currently supports @emph{only} 32-bit addressing modes: when
|
||||
writing 16-bit code, it @emph{always} outputs address size prefixes for any
|
||||
instruction that uses a non-register addressing mode. So you can write
|
||||
code that runs on 16-bit processors, but only if that code never references
|
||||
memory.
|
||||
|
||||
@node i386-Notes
|
||||
@section Notes
|
||||
|
||||
|
||||
28
gas/read.c
28
gas/read.c
@ -195,6 +195,7 @@ static const pseudo_typeS potable[] =
|
||||
{"align", s_align_ptwo, 0},
|
||||
{"ascii", stringer, 0},
|
||||
{"asciz", stringer, 1},
|
||||
{"balign", s_align_bytes, 0},
|
||||
/* block */
|
||||
{"byte", cons, 1},
|
||||
{"comm", s_comm, 0},
|
||||
@ -238,6 +239,7 @@ static const pseudo_typeS potable[] =
|
||||
{"nolist", listing_list, 0}, /* Turn listing off */
|
||||
{"octa", cons, 16},
|
||||
{"org", s_org, 0},
|
||||
{"p2align", s_align_ptwo, 0},
|
||||
{"psize", listing_psize, 0}, /* set paper size */
|
||||
/* print */
|
||||
{"quad", cons, 8},
|
||||
@ -988,11 +990,18 @@ s_app_line (ignore)
|
||||
|
||||
/* The given number is that of the next line. */
|
||||
l = get_absolute_expression () - 1;
|
||||
new_logical_line ((char *) NULL, l);
|
||||
if (l < 0)
|
||||
/* Some of the back ends can't deal with non-positive line numbers.
|
||||
Besides, it's silly. */
|
||||
as_warn ("Line numbers must be positive; line number %d rejected.", l+1);
|
||||
else
|
||||
{
|
||||
new_logical_line ((char *) NULL, l);
|
||||
#ifdef LISTING
|
||||
if (listing)
|
||||
listing_source_line (l);
|
||||
if (listing)
|
||||
listing_source_line (l);
|
||||
#endif
|
||||
}
|
||||
demand_empty_rest_of_line ();
|
||||
}
|
||||
|
||||
@ -1426,14 +1435,12 @@ s_space (mult)
|
||||
int mult;
|
||||
{
|
||||
expressionS exp;
|
||||
long temp_repeat, temp_fill;
|
||||
long temp_fill;
|
||||
char *p = 0;
|
||||
|
||||
/* Just like .fill, but temp_size = 1 */
|
||||
expression (&exp);
|
||||
if (exp.X_op == O_constant
|
||||
/* for testing purposes */
|
||||
&& 0)
|
||||
if (exp.X_op == O_constant)
|
||||
{
|
||||
long repeat;
|
||||
|
||||
@ -1450,7 +1457,7 @@ s_space (mult)
|
||||
|
||||
if (!need_pass_2)
|
||||
p = frag_var (rs_fill, 1, 1, (relax_substateT) 0, (symbolS *) 0,
|
||||
temp_repeat, (char *) 0);
|
||||
repeat, (char *) 0);
|
||||
}
|
||||
else
|
||||
{
|
||||
@ -1458,13 +1465,14 @@ s_space (mult)
|
||||
p = frag_var (rs_space, 1, 1, (relax_substateT) 0,
|
||||
make_expr_symbol (&exp), 0L, (char *) 0);
|
||||
}
|
||||
if (get_absolute_expression_and_terminator (&temp_repeat) == ',')
|
||||
SKIP_WHITESPACE ();
|
||||
if (*input_line_pointer == ',')
|
||||
{
|
||||
input_line_pointer++;
|
||||
temp_fill = get_absolute_expression ();
|
||||
}
|
||||
else
|
||||
{
|
||||
input_line_pointer--; /* Backup over what was not a ','. */
|
||||
temp_fill = 0;
|
||||
}
|
||||
if (p)
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user