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* config/tc-s390.c (md_parse_option): Add cpu type z990.
(md_begin): Add minimal cpu type logic for instructions with different binary format depending on the cpu. (md_assemble): Remove check for minimal cpu. (s390_insert_operand): Add support for long displacements. (md_gather_operands): Likewise. (tc_s390_fix_adjustable): Likewise. (tc_s390_force_relocation): Likewise. (md_apply_fix3): Likewise.
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@ -1,3 +1,15 @@
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2003-07-01 Martin Schwidefsky <schwidefsky@de.ibm.com>
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* config/tc-s390.c (md_parse_option): Add cpu type z990.
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(md_begin): Add minimal cpu type logic for instructions with different
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binary format depending on the cpu.
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(md_assemble): Remove check for minimal cpu.
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(s390_insert_operand): Add support for long displacements.
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(md_gather_operands): Likewise.
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(tc_s390_fix_adjustable): Likewise.
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(tc_s390_force_relocation): Likewise.
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(md_apply_fix3): Likewise.
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2003-06-30 Chris Demetriou <cgd@broadcom.com>
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* config/tc-mips.c (s_mipsset): Implement -march= handling
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@ -403,6 +403,8 @@ md_parse_option (c, arg)
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current_cpu = S390_OPCODE_G6;
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else if (strcmp (arg + 5, "z900") == 0)
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current_cpu = S390_OPCODE_Z900;
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else if (strcmp (arg + 5, "z990") == 0)
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current_cpu = S390_OPCODE_Z990;
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else
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{
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as_bad (_("invalid switch -m%s"), arg);
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@ -500,14 +502,18 @@ md_begin ()
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op_end = s390_opcodes + s390_num_opcodes;
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for (op = s390_opcodes; op < op_end; op++)
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{
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retval = hash_insert (s390_opcode_hash, op->name, (PTR) op);
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if (retval != (const char *) NULL)
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{
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as_bad (_("Internal assembler error for instruction %s"), op->name);
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dup_insn = TRUE;
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}
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}
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if (op->min_cpu <= current_cpu)
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{
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retval = hash_insert (s390_opcode_hash, op->name, (PTR) op);
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if (retval != (const char *) NULL)
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{
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as_bad (_("Internal assembler error for instruction %s"),
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op->name);
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dup_insn = TRUE;
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}
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while (op < op_end - 1 && strcmp (op->name, op[1].name) == 0)
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op++;
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}
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if (dup_insn)
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abort ();
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@ -585,6 +591,9 @@ s390_insert_operand (insn, operand, val, file, line)
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}
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/* val is ok, now restrict it to operand->bits bits. */
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uval = (addressT) val & ((((addressT) 1 << (operand->bits-1)) << 1) - 1);
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/* val is restrict, now check for special case. */
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if (operand->bits == 20 && operand->shift == 20)
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uval = (uval >> 12) | ((uval & 0xfff) << 8);
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}
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else
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{
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@ -1255,8 +1264,12 @@ md_gather_operands (str, insn, opcode)
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if (suffix == ELF_SUFFIX_GOT)
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{
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if (operand->flags & S390_OPERAND_DISP)
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if ((operand->flags & S390_OPERAND_DISP) &&
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(operand->bits == 12))
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reloc = BFD_RELOC_390_GOT12;
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else if ((operand->flags & S390_OPERAND_DISP) &&
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(operand->bits == 20))
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reloc = BFD_RELOC_390_GOT20;
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else if ((operand->flags & S390_OPERAND_SIGNED)
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&& (operand->bits == 16))
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reloc = BFD_RELOC_390_GOT16;
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@ -1308,6 +1321,9 @@ md_gather_operands (str, insn, opcode)
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if ((operand->flags & S390_OPERAND_DISP)
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&& (operand->bits == 12))
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reloc = BFD_RELOC_390_TLS_GOTIE12;
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else if ((operand->flags & S390_OPERAND_DISP)
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&& (operand->bits == 20))
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reloc = BFD_RELOC_390_TLS_GOTIE20;
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}
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else if (suffix == ELF_SUFFIX_TLS_IE)
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{
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@ -1482,6 +1498,7 @@ md_gather_operands (str, insn, opcode)
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because fixup_segment will signal an overflow for large 4 byte
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quantities for GOT12 relocations. */
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if ( fixups[i].reloc == BFD_RELOC_390_GOT12
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|| fixups[i].reloc == BFD_RELOC_390_GOT20
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|| fixups[i].reloc == BFD_RELOC_390_GOT16)
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fixP->fx_no_overflow = 1;
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}
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@ -1522,12 +1539,6 @@ md_assemble (str)
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as_bad ("Opcode %s not available in this mode", str);
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return;
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}
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else if (opcode->min_cpu > current_cpu)
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{
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as_bad ("Opcode %s not available for this cpu", str);
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return;
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}
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memcpy (insn, opcode->opcode, sizeof (insn));
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md_gather_operands (s, insn, opcode);
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}
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@ -1866,12 +1877,14 @@ tc_s390_fix_adjustable (fixP)
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|| fixP->fx_r_type == BFD_RELOC_390_PLT32DBL
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|| fixP->fx_r_type == BFD_RELOC_390_PLT64
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|| fixP->fx_r_type == BFD_RELOC_390_GOT12
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|| fixP->fx_r_type == BFD_RELOC_390_GOT20
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|| fixP->fx_r_type == BFD_RELOC_390_GOT16
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|| fixP->fx_r_type == BFD_RELOC_32_GOT_PCREL
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|| fixP->fx_r_type == BFD_RELOC_390_GOT64
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|| fixP->fx_r_type == BFD_RELOC_390_GOTENT
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|| fixP->fx_r_type == BFD_RELOC_390_GOTPLT12
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|| fixP->fx_r_type == BFD_RELOC_390_GOTPLT16
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|| fixP->fx_r_type == BFD_RELOC_390_GOTPLT20
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|| fixP->fx_r_type == BFD_RELOC_390_GOTPLT32
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|| fixP->fx_r_type == BFD_RELOC_390_GOTPLT64
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|| fixP->fx_r_type == BFD_RELOC_390_GOTPLTENT
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@ -1881,6 +1894,7 @@ tc_s390_fix_adjustable (fixP)
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|| fixP->fx_r_type == BFD_RELOC_390_TLS_GD32
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|| fixP->fx_r_type == BFD_RELOC_390_TLS_GD64
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|| fixP->fx_r_type == BFD_RELOC_390_TLS_GOTIE12
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|| fixP->fx_r_type == BFD_RELOC_390_TLS_GOTIE20
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|| fixP->fx_r_type == BFD_RELOC_390_TLS_GOTIE32
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|| fixP->fx_r_type == BFD_RELOC_390_TLS_GOTIE64
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|| fixP->fx_r_type == BFD_RELOC_390_TLS_LDM32
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@ -1912,6 +1926,7 @@ tc_s390_force_relocation (fixp)
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switch (fixp->fx_r_type)
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{
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case BFD_RELOC_390_GOT12:
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case BFD_RELOC_390_GOT20:
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case BFD_RELOC_32_GOT_PCREL:
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case BFD_RELOC_32_GOTOFF:
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case BFD_RELOC_390_GOTOFF64:
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@ -1929,6 +1944,7 @@ tc_s390_force_relocation (fixp)
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case BFD_RELOC_390_PLT64:
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case BFD_RELOC_390_GOTPLT12:
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case BFD_RELOC_390_GOTPLT16:
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case BFD_RELOC_390_GOTPLT20:
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case BFD_RELOC_390_GOTPLT32:
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case BFD_RELOC_390_GOTPLT64:
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case BFD_RELOC_390_GOTPLTENT:
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@ -2006,6 +2022,12 @@ md_apply_fix3 (fixP, valP, seg)
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fixP->fx_where += 4;
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fixP->fx_r_type = BFD_RELOC_390_12;
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}
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else if (operand->bits == 20 && operand->shift == 20)
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{
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fixP->fx_size = 2;
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fixP->fx_where += 2;
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fixP->fx_r_type = BFD_RELOC_390_20;
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}
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else if (operand->bits == 8 && operand->shift == 8)
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{
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fixP->fx_size = 1;
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@ -2072,6 +2094,19 @@ md_apply_fix3 (fixP, valP, seg)
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}
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break;
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case BFD_RELOC_390_20:
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case BFD_RELOC_390_GOT20:
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case BFD_RELOC_390_GOTPLT20:
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if (fixP->fx_done)
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{
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unsigned int mop;
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mop = bfd_getb32 ((unsigned char *) where);
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mop |= (unsigned int) ((value & 0xfff) << 8 |
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(value & 0xff000) >> 12);
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bfd_putb32 ((bfd_vma) mop, (unsigned char *) where);
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}
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break;
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case BFD_RELOC_16:
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case BFD_RELOC_GPREL16:
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case BFD_RELOC_16_GOT_PCREL:
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@ -2175,6 +2210,7 @@ md_apply_fix3 (fixP, valP, seg)
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case BFD_RELOC_390_TLS_GD32:
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case BFD_RELOC_390_TLS_GD64:
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case BFD_RELOC_390_TLS_GOTIE12:
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case BFD_RELOC_390_TLS_GOTIE20:
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case BFD_RELOC_390_TLS_GOTIE32:
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case BFD_RELOC_390_TLS_GOTIE64:
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case BFD_RELOC_390_TLS_LDM32:
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