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* eCos->devo merge; am30 sanitization tags removed
1998-12-29 Frank Ch. Eigler <fche@cygnus.com> * Makefile.in (WITH_COMMON_OBJS): Build also dv-sockser.o. * interp.c (sim_open): Add stub mn103002 cache control memory regions. Set OPERATING_ENVIRONMENT on "stdeval1" board. (mn10300_core_signal): New function to intercept memory errors. (program_interrupt): New function to dispatch to exception vector (mn10300_exception_*): New functions to snapshot pre/post exception state. * sim-main.h (SIM_CORE_SIGNAL): Define hook - call mn10300_core_signal. (SIM_ENGINE_HALT_HOOK): Do nothing. (SIM_CPU_EXCEPTION*): Define hooks to call mn10300_cpu_exception*(). (_sim_cpu): Add exc_* fields to store register value snapshots. * dv-mn103ser.c (*): Support dv-sockser backend for UART I/O. Various endianness and warning fixes. * mn10300.igen (illegal): Call program_interrupt on error. (break): Call program_interrupt on breakpoint Several changes from <janczyn@cygnus.com> and <cagney@cygnus.com> merged in: * dv-mn103int.c (mn103int_ioctl): New function for NMI generation. (mn103int_finish): Install it as ioctl handler. * dv-mn103tim.c: Support timer 6 specially. Endianness fixes.
This commit is contained in:
Frank Ch. Eigler
parent
617ca17ed2
commit
9b27cf7bbb
@ -52,6 +52,7 @@ mn10300.dc
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sim-main.h
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sim-main.c
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op_utils.c
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tconfig.in
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Things-to-lose:
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@ -13,10 +13,8 @@ SIM_AC_OPTION_WARNINGS
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SIM_AC_OPTION_RESERVED_BITS
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SIM_AC_OPTION_BITSIZE(32,31)
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SIM_AC_OPTION_INLINE()
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# start-sanitize-am30
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SIM_AC_OPTION_HARDWARE(yes,,mn103cpu mn103int mn103tim mn103ser mn103iop)
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# end-sanitize-am30
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AC_CHECK_FUNCS(time chmod utime fork execve execv chown)
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AC_CHECK_HEADERS(unistd.h stdlib.h string.h strings.h utime.h time.h)
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@ -3,9 +3,7 @@
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#if WITH_COMMON
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#include "sim-main.h"
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#include "sim-options.h"
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/* start-sanitize-am30 */
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#include "sim-hw.h"
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/* end-sanitize-am30 */
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#else
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#include "mn10300_sim.h"
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#endif
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@ -40,6 +38,7 @@
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host_callback *mn10300_callback;
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int mn10300_debug;
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struct _state State;
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/* simulation target board. NULL=default configuration */
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@ -78,13 +77,11 @@ mn10300_option_handler (sd, cpu, opt, arg, is_command)
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static const OPTION mn10300_options[] =
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{
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/* start-sanitize-am30 */
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#define BOARD_AM32 "stdeval1"
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{ {"board", required_argument, NULL, OPTION_BOARD},
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'\0', "none" /* rely on compile-time string concatenation for other options */
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"|" BOARD_AM32
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, "Customize simulation for a particular board.", mn10300_option_handler },
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/* end-sanitize-am30 */
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{ {NULL, no_argument, NULL, 0}, '\0', NULL, NULL, NULL }
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};
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@ -887,6 +884,7 @@ sim_stop_reason (sd, reason, sigrc)
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*reason = sim_exited;
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else
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*reason = sim_stopped;
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if (State.exception == SIGQUIT)
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*sigrc = 0;
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else
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@ -973,7 +971,7 @@ sim_open (kind, cb, abfd, argv)
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/* Allocate core managed memory */
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sim_do_command (sd, "memory region 0,0x100000");
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sim_do_command (sd, "memory region 0x40000000,0x100000");
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sim_do_command (sd, "memory region 0x40000000,0x200000");
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/* getopt will print the error message so we just have to exit if this fails.
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FIXME: Hmmm... in the case of gdb we need getopt to call
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@ -986,118 +984,144 @@ sim_open (kind, cb, abfd, argv)
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return 0;
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}
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/* start-sanitize-am30 */
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if ( NULL != board
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&& (strcmp(board, BOARD_AM32) == 0 ) )
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{
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/* device support for mn1030002 */
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/* interrupt controller */
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{
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/* environment */
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STATE_ENVIRONMENT (sd) = OPERATING_ENVIRONMENT;
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sim_hw_parse (sd, "/mn103int@0x34000100/reg 0x34000100 0x7C 0x34000200 0x8 0x34000280 0x8");
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sim_do_command (sd, "memory region 0x44000000,0x40000");
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sim_do_command (sd, "memory region 0x48000000,0x400000");
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/* DEBUG: NMI input's */
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sim_hw_parse (sd, "/glue@0x30000000/reg 0x30000000 12");
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sim_hw_parse (sd, "/glue@0x30000000 > int0 nmirq /mn103int");
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sim_hw_parse (sd, "/glue@0x30000000 > int1 watchdog /mn103int");
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sim_hw_parse (sd, "/glue@0x30000000 > int2 syserr /mn103int");
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/* device support for mn1030002 */
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/* interrupt controller */
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/* DEBUG: ACK input */
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sim_hw_parse (sd, "/glue@0x30002000/reg 0x30002000 4");
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sim_hw_parse (sd, "/glue@0x30002000 > int ack /mn103int");
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/* DEBUG: LEVEL output */
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sim_hw_parse (sd, "/glue@0x30004000/reg 0x30004000 8");
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sim_hw_parse (sd, "/mn103int > nmi int0 /glue@0x30004000");
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sim_hw_parse (sd, "/mn103int > level int1 /glue@0x30004000");
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sim_hw_parse (sd, "/mn103int@0x34000100/reg 0x34000100 0x7C 0x34000200 0x8 0x34000280 0x8");
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/* DEBUG: A bunch of interrupt inputs */
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sim_hw_parse (sd, "/glue@0x30006000/reg 0x30006000 32");
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sim_hw_parse (sd, "/glue@0x30006000 > int0 irq-0 /mn103int");
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sim_hw_parse (sd, "/glue@0x30006000 > int1 irq-1 /mn103int");
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sim_hw_parse (sd, "/glue@0x30006000 > int2 irq-2 /mn103int");
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sim_hw_parse (sd, "/glue@0x30006000 > int3 irq-3 /mn103int");
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sim_hw_parse (sd, "/glue@0x30006000 > int4 irq-4 /mn103int");
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sim_hw_parse (sd, "/glue@0x30006000 > int5 irq-5 /mn103int");
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sim_hw_parse (sd, "/glue@0x30006000 > int6 irq-6 /mn103int");
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sim_hw_parse (sd, "/glue@0x30006000 > int7 irq-7 /mn103int");
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/* DEBUG: NMI input's */
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sim_hw_parse (sd, "/glue@0x30000000/reg 0x30000000 12");
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sim_hw_parse (sd, "/glue@0x30000000 > int0 nmirq /mn103int");
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sim_hw_parse (sd, "/glue@0x30000000 > int1 watchdog /mn103int");
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sim_hw_parse (sd, "/glue@0x30000000 > int2 syserr /mn103int");
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/* DEBUG: ACK input */
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sim_hw_parse (sd, "/glue@0x30002000/reg 0x30002000 4");
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sim_hw_parse (sd, "/glue@0x30002000 > int ack /mn103int");
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/* DEBUG: LEVEL output */
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sim_hw_parse (sd, "/glue@0x30004000/reg 0x30004000 8");
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sim_hw_parse (sd, "/mn103int > nmi int0 /glue@0x30004000");
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sim_hw_parse (sd, "/mn103int > level int1 /glue@0x30004000");
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/* DEBUG: A bunch of interrupt inputs */
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sim_hw_parse (sd, "/glue@0x30006000/reg 0x30006000 32");
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sim_hw_parse (sd, "/glue@0x30006000 > int0 irq-0 /mn103int");
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sim_hw_parse (sd, "/glue@0x30006000 > int1 irq-1 /mn103int");
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sim_hw_parse (sd, "/glue@0x30006000 > int2 irq-2 /mn103int");
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sim_hw_parse (sd, "/glue@0x30006000 > int3 irq-3 /mn103int");
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sim_hw_parse (sd, "/glue@0x30006000 > int4 irq-4 /mn103int");
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sim_hw_parse (sd, "/glue@0x30006000 > int5 irq-5 /mn103int");
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sim_hw_parse (sd, "/glue@0x30006000 > int6 irq-6 /mn103int");
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sim_hw_parse (sd, "/glue@0x30006000 > int7 irq-7 /mn103int");
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/* processor interrupt device */
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/* the device */
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sim_hw_parse (sd, "/mn103cpu@0x20000000");
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sim_hw_parse (sd, "/mn103cpu@0x20000000/reg 0x20000000 0x42");
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/* DEBUG: ACK output wired upto a glue device */
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sim_hw_parse (sd, "/glue@0x20002000");
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sim_hw_parse (sd, "/glue@0x20002000/reg 0x20002000 4");
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sim_hw_parse (sd, "/mn103cpu > ack int0 /glue@0x20002000");
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/* DEBUG: RESET/NMI/LEVEL wired up to a glue device */
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sim_hw_parse (sd, "/glue@0x20004000");
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sim_hw_parse (sd, "/glue@0x20004000/reg 0x20004000 12");
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sim_hw_parse (sd, "/glue@0x20004000 > int0 reset /mn103cpu");
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sim_hw_parse (sd, "/glue@0x20004000 > int1 nmi /mn103cpu");
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sim_hw_parse (sd, "/glue@0x20004000 > int2 level /mn103cpu");
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/* REAL: The processor wired up to the real interrupt controller */
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sim_hw_parse (sd, "/mn103cpu > ack ack /mn103int");
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sim_hw_parse (sd, "/mn103int > level level /mn103cpu");
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sim_hw_parse (sd, "/mn103int > nmi nmi /mn103cpu");
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/* PAL */
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/* the device */
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sim_hw_parse (sd, "/pal@0x31000000");
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sim_hw_parse (sd, "/pal@0x31000000/reg 0x31000000 64");
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sim_hw_parse (sd, "/pal@0x31000000/poll? true");
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/* DEBUG: PAL wired up to a glue device */
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sim_hw_parse (sd, "/glue@0x31002000");
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sim_hw_parse (sd, "/glue@0x31002000/reg 0x31002000 16");
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sim_hw_parse (sd, "/pal@0x31000000 > countdown int0 /glue@0x31002000");
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sim_hw_parse (sd, "/pal@0x31000000 > timer int1 /glue@0x31002000");
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sim_hw_parse (sd, "/pal@0x31000000 > int int2 /glue@0x31002000");
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sim_hw_parse (sd, "/glue@0x31002000 > int0 int3 /glue@0x31002000");
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sim_hw_parse (sd, "/glue@0x31002000 > int1 int3 /glue@0x31002000");
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sim_hw_parse (sd, "/glue@0x31002000 > int2 int3 /glue@0x31002000");
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/* REAL: The PAL wired up to the real interrupt controller */
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sim_hw_parse (sd, "/pal@0x31000000 > countdown irq-0 /mn103int");
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sim_hw_parse (sd, "/pal@0x31000000 > timer irq-1 /mn103int");
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sim_hw_parse (sd, "/pal@0x31000000 > int irq-2 /mn103int");
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/* 8 and 16 bit timers */
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sim_hw_parse (sd, "/mn103tim@0x34001000/reg 0x34001000 36 0x34001080 100 0x34004000 16");
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/* processor interrupt device */
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/* Hook timer interrupts up to interrupt controller */
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sim_hw_parse (sd, "/mn103tim > timer-0-underflow timer-0-underflow /mn103int");
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sim_hw_parse (sd, "/mn103tim > timer-1-underflow timer-1-underflow /mn103int");
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sim_hw_parse (sd, "/mn103tim > timer-2-underflow timer-2-underflow /mn103int");
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sim_hw_parse (sd, "/mn103tim > timer-3-underflow timer-3-underflow /mn103int");
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sim_hw_parse (sd, "/mn103tim > timer-4-underflow timer-4-underflow /mn103int");
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sim_hw_parse (sd, "/mn103tim > timer-5-underflow timer-5-underflow /mn103int");
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sim_hw_parse (sd, "/mn103tim > timer-6-underflow timer-6-underflow /mn103int");
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sim_hw_parse (sd, "/mn103tim > timer-6-compare-a timer-6-compare-a /mn103int");
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sim_hw_parse (sd, "/mn103tim > timer-6-compare-b timer-6-compare-b /mn103int");
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/* Serial devices 0,1,2 */
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sim_hw_parse (sd, "/mn103ser@0x34000800/reg 0x34000800 48");
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sim_hw_parse (sd, "/mn103ser@0x34000800/poll? true");
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/* Hook serial interrupts up to interrupt controller */
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sim_hw_parse (sd, "/mn103ser > serial-0-receive serial-0-receive /mn103int");
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sim_hw_parse (sd, "/mn103ser > serial-0-transmit serial-0-transmit /mn103int");
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sim_hw_parse (sd, "/mn103ser > serial-1-receive serial-1-receive /mn103int");
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sim_hw_parse (sd, "/mn103ser > serial-1-transmit serial-1-transmit /mn103int");
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sim_hw_parse (sd, "/mn103ser > serial-2-receive serial-2-receive /mn103int");
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sim_hw_parse (sd, "/mn103ser > serial-2-transmit serial-2-transmit /mn103int");
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sim_hw_parse (sd, "/mn103iop@0x36008000/reg 0x36008000 8 0x36008020 8 0x36008040 0xc 0x36008060 8 0x36008080 8");
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/* the device */
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sim_hw_parse (sd, "/mn103cpu@0x20000000");
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sim_hw_parse (sd, "/mn103cpu@0x20000000/reg 0x20000000 0x42");
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/* DEBUG: ACK output wired upto a glue device */
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sim_hw_parse (sd, "/glue@0x20002000");
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sim_hw_parse (sd, "/glue@0x20002000/reg 0x20002000 4");
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sim_hw_parse (sd, "/mn103cpu > ack int0 /glue@0x20002000");
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/* DEBUG: RESET/NMI/LEVEL wired up to a glue device */
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sim_hw_parse (sd, "/glue@0x20004000");
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sim_hw_parse (sd, "/glue@0x20004000/reg 0x20004000 12");
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sim_hw_parse (sd, "/glue@0x20004000 > int0 reset /mn103cpu");
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sim_hw_parse (sd, "/glue@0x20004000 > int1 nmi /mn103cpu");
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sim_hw_parse (sd, "/glue@0x20004000 > int2 level /mn103cpu");
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/* REAL: The processor wired up to the real interrupt controller */
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sim_hw_parse (sd, "/mn103cpu > ack ack /mn103int");
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sim_hw_parse (sd, "/mn103int > level level /mn103cpu");
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sim_hw_parse (sd, "/mn103int > nmi nmi /mn103cpu");
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/* PAL */
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/* the device */
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sim_hw_parse (sd, "/pal@0x31000000");
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sim_hw_parse (sd, "/pal@0x31000000/reg 0x31000000 64");
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sim_hw_parse (sd, "/pal@0x31000000/poll? true");
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/* DEBUG: PAL wired up to a glue device */
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sim_hw_parse (sd, "/glue@0x31002000");
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sim_hw_parse (sd, "/glue@0x31002000/reg 0x31002000 16");
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sim_hw_parse (sd, "/pal@0x31000000 > countdown int0 /glue@0x31002000");
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sim_hw_parse (sd, "/pal@0x31000000 > timer int1 /glue@0x31002000");
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sim_hw_parse (sd, "/pal@0x31000000 > int int2 /glue@0x31002000");
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sim_hw_parse (sd, "/glue@0x31002000 > int0 int3 /glue@0x31002000");
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sim_hw_parse (sd, "/glue@0x31002000 > int1 int3 /glue@0x31002000");
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sim_hw_parse (sd, "/glue@0x31002000 > int2 int3 /glue@0x31002000");
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/* REAL: The PAL wired up to the real interrupt controller */
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sim_hw_parse (sd, "/pal@0x31000000 > countdown irq-0 /mn103int");
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sim_hw_parse (sd, "/pal@0x31000000 > timer irq-1 /mn103int");
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sim_hw_parse (sd, "/pal@0x31000000 > int irq-2 /mn103int");
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/* 8 and 16 bit timers */
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sim_hw_parse (sd, "/mn103tim@0x34001000/reg 0x34001000 36 0x34001080 100");
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/* Memory control registers */
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sim_do_command (sd, "memory region 0x32000020,0x30");
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/* Cache control register */
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sim_do_command (sd, "memory region 0x20000070,0x4");
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/* Cache purge regions */
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sim_do_command (sd, "memory region 0x28400000,0x800");
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sim_do_command (sd, "memory region 0x28401000,0x800");
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/* DMA registers */
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sim_do_command (sd, "memory region 0x32000100,0xF");
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sim_do_command (sd, "memory region 0x32000200,0xF");
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sim_do_command (sd, "memory region 0x32000400,0xF");
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sim_do_command (sd, "memory region 0x32000800,0xF");
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}
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else
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{
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if ( NULL != board )
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{
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printf("Error: invalid --board option.\n");
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return 0;
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}
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}
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/* Hook timer interrupts up to interrupt controller */
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sim_hw_parse (sd, "/mn103tim > timer-0-underflow timer-0-underflow /mn103int");
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sim_hw_parse (sd, "/mn103tim > timer-1-underflow timer-1-underflow /mn103int");
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sim_hw_parse (sd, "/mn103tim > timer-2-underflow timer-2-underflow /mn103int");
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sim_hw_parse (sd, "/mn103tim > timer-3-underflow timer-3-underflow /mn103int");
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sim_hw_parse (sd, "/mn103tim > timer-4-underflow timer-4-underflow /mn103int");
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sim_hw_parse (sd, "/mn103tim > timer-5-underflow timer-5-underflow /mn103int");
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sim_hw_parse (sd, "/mn103tim > timer-6-underflow timer-6-underflow /mn103int");
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sim_hw_parse (sd, "/mn103tim > timer-6-compare-a timer-6-compare-a /mn103int");
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sim_hw_parse (sd, "/mn103tim > timer-6-compare-b timer-6-compare-b /mn103int");
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/* Serial devices 0,1,2 */
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sim_hw_parse (sd, "/mn103ser@0x34000800/reg 0x34000800 48");
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sim_hw_parse (sd, "/mn103ser@0x34000800/poll? true");
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/* Hook serial interrupts up to interrupt controller */
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sim_hw_parse (sd, "/mn103ser > serial-0-receive serial-0-receive /mn103int");
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sim_hw_parse (sd, "/mn103ser > serial-0-transmit serial-0-transmit /mn103int");
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sim_hw_parse (sd, "/mn103ser > serial-1-receive serial-0-receive /mn103int");
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sim_hw_parse (sd, "/mn103ser > serial-1-transmit serial-0-transmit /mn103int");
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sim_hw_parse (sd, "/mn103ser > serial-2-receive serial-0-receive /mn103int");
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sim_hw_parse (sd, "/mn103ser > serial-2-transmit serial-0-transmit /mn103int");
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sim_hw_parse (sd, "/mn103iop@0x36008000/reg 0x36008000 8 0x36008020 8 0x36008040 0xc 0x36008060 8 0x36008080 8");
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}
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/* end-sanitize-am30 */
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/* check for/establish the a reference program image */
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if (sim_analyze_program (sd,
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@ -1259,3 +1283,120 @@ sim_store_register (sd, rn, memory, length)
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State.regs[rn] = get_word (memory);
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return -1;
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||||
}
|
||||
|
||||
|
||||
void
|
||||
mn10300_core_signal (SIM_DESC sd,
|
||||
sim_cpu *cpu,
|
||||
sim_cia cia,
|
||||
unsigned map,
|
||||
int nr_bytes,
|
||||
address_word addr,
|
||||
transfer_type transfer,
|
||||
sim_core_signals sig)
|
||||
{
|
||||
const char *copy = (transfer == read_transfer ? "read" : "write");
|
||||
address_word ip = CIA_ADDR (cia);
|
||||
|
||||
switch (sig)
|
||||
{
|
||||
case sim_core_unmapped_signal:
|
||||
sim_io_eprintf (sd, "mn10300-core: %d byte %s to unmapped address 0x%lx at 0x%lx\n",
|
||||
nr_bytes, copy,
|
||||
(unsigned long) addr, (unsigned long) ip);
|
||||
program_interrupt(sd, cpu, cia, SIM_SIGSEGV);
|
||||
break;
|
||||
|
||||
case sim_core_unaligned_signal:
|
||||
sim_io_eprintf (sd, "mn10300-core: %d byte %s to unaligned address 0x%lx at 0x%lx\n",
|
||||
nr_bytes, copy,
|
||||
(unsigned long) addr, (unsigned long) ip);
|
||||
program_interrupt(sd, cpu, cia, SIM_SIGBUS);
|
||||
break;
|
||||
|
||||
default:
|
||||
sim_engine_abort (sd, cpu, cia,
|
||||
"mn10300_core_signal - internal error - bad switch");
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
void
|
||||
program_interrupt (SIM_DESC sd,
|
||||
sim_cpu *cpu,
|
||||
sim_cia cia,
|
||||
SIM_SIGNAL sig)
|
||||
{
|
||||
int status;
|
||||
struct hw *device;
|
||||
|
||||
#ifdef SIM_CPU_EXCEPTION_TRIGGER
|
||||
SIM_CPU_EXCEPTION_TRIGGER(sd,cpu,cia);
|
||||
#endif
|
||||
|
||||
/* copy NMI handler code from dv-mn103cpu.c */
|
||||
/* XXX: possible infinite recursion if these store_*() calls fail! */
|
||||
store_word (SP - 4, CIA_GET (cpu));
|
||||
store_half (SP - 8, PSW);
|
||||
PSW &= ~PSW_IE;
|
||||
SP = SP - 8;
|
||||
CIA_SET (cpu, 0x40000008);
|
||||
|
||||
sim_engine_halt(sd, cpu, NULL, cia, sim_stopped, sig);
|
||||
}
|
||||
|
||||
|
||||
void
|
||||
mn10300_cpu_exception_trigger(SIM_DESC sd, sim_cpu* cpu, address_word cia)
|
||||
{
|
||||
ASSERT(cpu != NULL);
|
||||
|
||||
if(State.exc_suspended > 0)
|
||||
sim_io_eprintf(sd, "Warning, nested exception triggered (%d)\n", State.exc_suspended);
|
||||
|
||||
CIA_SET (cpu, cia);
|
||||
memcpy(State.exc_trigger_regs, State.regs, sizeof(State.exc_trigger_regs));
|
||||
State.exc_suspended = 0;
|
||||
}
|
||||
|
||||
void
|
||||
mn10300_cpu_exception_suspend(SIM_DESC sd, sim_cpu* cpu, int exception)
|
||||
{
|
||||
ASSERT(cpu != NULL);
|
||||
|
||||
if(State.exc_suspended > 0)
|
||||
sim_io_eprintf(sd, "Warning, nested exception signal (%d then %d)\n",
|
||||
State.exc_suspended, exception);
|
||||
|
||||
memcpy(State.exc_suspend_regs, State.regs, sizeof(State.exc_suspend_regs));
|
||||
memcpy(State.regs, State.exc_trigger_regs, sizeof(State.regs));
|
||||
CIA_SET (cpu, PC); /* copy PC back from new State.regs */
|
||||
State.exc_suspended = exception;
|
||||
}
|
||||
|
||||
void
|
||||
mn10300_cpu_exception_resume(SIM_DESC sd, sim_cpu* cpu, int exception)
|
||||
{
|
||||
ASSERT(cpu != NULL);
|
||||
|
||||
if(exception == 0 && State.exc_suspended > 0)
|
||||
{
|
||||
if(State.exc_suspended != SIGTRAP) /* warn not for breakpoints */
|
||||
sim_io_eprintf(sd, "Warning, resuming but ignoring pending exception signal (%d)\n",
|
||||
State.exc_suspended);
|
||||
}
|
||||
else if(exception != 0 && State.exc_suspended > 0)
|
||||
{
|
||||
if(exception != State.exc_suspended)
|
||||
sim_io_eprintf(sd, "Warning, resuming with unmatching exception signal (%d vs %d)\n",
|
||||
State.exc_suspended, exception);
|
||||
|
||||
memcpy(State.regs, State.exc_suspend_regs, sizeof(State.regs));
|
||||
CIA_SET (cpu, PC); /* copy PC back from new State.regs */
|
||||
}
|
||||
else if(exception != 0 && State.exc_suspended == 0)
|
||||
{
|
||||
sim_io_eprintf(sd, "Warning, ignoring spontanous exception signal (%d)\n", exception);
|
||||
}
|
||||
State.exc_suspended = 0;
|
||||
}
|
||||
|
||||
Loading…
Reference in New Issue
Block a user