mirror of
https://github.com/darlinghq/darling-gdb.git
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bfd/
* elf32-spu.h (spu_elf_params): Add member emit_fixups. (spu_elf_size_sections): Declare prototype. * elf32-spu.c (spu_link_hash_table): Add member sfixup. (FIXUP_RECORD_SIZE, FIXUP_GET, FIXUP_PUT): New macros. (spu_elf_emit_fixup): New function. (spu_elf_relocate_section): Emit fixup for each SPU_ADDR32. (spu_elf_size_sections): New function. ld/ * emulparams/elf32_spu.sh (OTHER_READONLY_SECTIONS): Add .fixup section and __fixup_start symbol. * emultempl/spuelf.em (params): Initialize emit_fixups member. (spu_before_allocation): Call spu_elf_size_sections. (OPTION_SPU_EMIT_FIXUPS): Define. (PARSE_AND_LIST_LONGOPTS): Add --emit-fixups. (PARSE_AND_LIST_ARGS_CASES): Handle --emit-fixups. * ld.texinfo (--emit-fixups): Document. ld/testsuite/ * ld-spu/fixup.d: New. * ld-spu/fixup.s: New.
This commit is contained in:
Trevor Smigiel
parent
99e008fef7
commit
9cc305ec20
@ -1,3 +1,13 @@
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2009-08-05 Trevor Smigiel <Trevor_Smigiel@playstation.sony.com>
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* elf32-spu.h (spu_elf_params): Add member emit_fixups.
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(spu_elf_size_sections): Declare prototype.
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* elf32-spu.c (spu_link_hash_table): Add member sfixup.
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(FIXUP_RECORD_SIZE, FIXUP_GET, FIXUP_PUT): New macros.
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(spu_elf_emit_fixup): New function.
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(spu_elf_relocate_section): Emit fixup for each SPU_ADDR32.
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(spu_elf_size_sections): New function.
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2009-08-05 Nathan Sidwell <nathan@codesourcery.com>
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* elf32-arm.c (elf32_arm_stub_type): Add arm_stub_a8_veneer_lwm.
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135
bfd/elf32-spu.c
135
bfd/elf32-spu.c
@ -344,6 +344,9 @@ struct spu_link_hash_table
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/* Count of overlay stubs needed in non-overlay area. */
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unsigned int non_ovly_stub;
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/* Pointer to the fixup section */
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asection *sfixup;
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/* Set on error. */
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unsigned int stub_err : 1;
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};
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@ -558,6 +561,7 @@ get_sym_h (struct elf_link_hash_entry **hp,
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bfd_boolean
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spu_elf_create_sections (struct bfd_link_info *info)
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{
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struct spu_link_hash_table *htab = spu_hash_table (info);
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bfd *ibfd;
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for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link_next)
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@ -600,6 +604,19 @@ spu_elf_create_sections (struct bfd_link_info *info)
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s->contents = data;
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}
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if (htab->params->emit_fixups)
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{
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asection *s;
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flagword flags;
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ibfd = info->input_bfds;
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flags = SEC_LOAD | SEC_ALLOC | SEC_READONLY | SEC_HAS_CONTENTS
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| SEC_IN_MEMORY;
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s = bfd_make_section_anyway_with_flags (ibfd, ".fixup", flags);
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if (s == NULL || !bfd_set_section_alignment (ibfd, s, 2))
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return FALSE;
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htab->sfixup = s;
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}
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return TRUE;
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}
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@ -4718,6 +4735,48 @@ spu_elf_count_relocs (struct bfd_link_info *info, asection *sec)
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return count;
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}
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/* Functions for adding fixup records to .fixup */
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#define FIXUP_RECORD_SIZE 4
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#define FIXUP_PUT(output_bfd,htab,index,addr) \
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bfd_put_32 (output_bfd, addr, \
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htab->sfixup->contents + FIXUP_RECORD_SIZE * (index))
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#define FIXUP_GET(output_bfd,htab,index) \
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bfd_get_32 (output_bfd, \
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htab->sfixup->contents + FIXUP_RECORD_SIZE * (index))
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/* Store OFFSET in .fixup. This assumes it will be called with an
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increasing OFFSET. When this OFFSET fits with the last base offset,
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it just sets a bit, otherwise it adds a new fixup record. */
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static void
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spu_elf_emit_fixup (bfd * output_bfd, struct bfd_link_info *info,
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bfd_vma offset)
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{
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struct spu_link_hash_table *htab = spu_hash_table (info);
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asection *sfixup = htab->sfixup;
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bfd_vma qaddr = offset & ~(bfd_vma) 15;
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bfd_vma bit = ((bfd_vma) 8) >> ((offset & 15) >> 2);
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if (sfixup->reloc_count == 0)
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{
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FIXUP_PUT (output_bfd, htab, 0, qaddr | bit);
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sfixup->reloc_count++;
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}
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else
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{
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bfd_vma base = FIXUP_GET (output_bfd, htab, sfixup->reloc_count - 1);
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if (qaddr != (base & ~(bfd_vma) 15))
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{
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if ((sfixup->reloc_count + 1) * FIXUP_RECORD_SIZE > sfixup->size)
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(*_bfd_error_handler) (_("fatal error while creating .fixup"));
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FIXUP_PUT (output_bfd, htab, sfixup->reloc_count, qaddr | bit);
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sfixup->reloc_count++;
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}
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else
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FIXUP_PUT (output_bfd, htab, sfixup->reloc_count - 1, base | bit);
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}
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}
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/* Apply RELOCS to CONTENTS of INPUT_SECTION from INPUT_BFD. */
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static int
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@ -4910,6 +4969,16 @@ spu_elf_relocate_section (bfd *output_bfd,
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}
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}
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if (htab->params->emit_fixups && !info->relocatable
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&& (input_section->flags & SEC_ALLOC) != 0
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&& r_type == R_SPU_ADDR32)
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{
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bfd_vma offset;
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offset = rel->r_offset + input_section->output_section->vma
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+ input_section->output_offset;
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spu_elf_emit_fixup (output_bfd, info, offset);
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}
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if (unresolved_reloc)
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;
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else if (r_type == R_SPU_PPU32 || r_type == R_SPU_PPU64)
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@ -5305,6 +5374,72 @@ spu_elf_modify_program_headers (bfd *abfd, struct bfd_link_info *info)
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return TRUE;
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}
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bfd_boolean
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spu_elf_size_sections (bfd * output_bfd, struct bfd_link_info *info)
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{
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struct spu_link_hash_table *htab = spu_hash_table (info);
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if (htab->params->emit_fixups)
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{
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asection *sfixup = htab->sfixup;
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int fixup_count = 0;
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bfd *ibfd;
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size_t size;
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for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link_next)
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{
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asection *isec;
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if (bfd_get_flavour (ibfd) != bfd_target_elf_flavour)
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continue;
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/* Walk over each section attached to the input bfd. */
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for (isec = ibfd->sections; isec != NULL; isec = isec->next)
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{
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Elf_Internal_Rela *internal_relocs, *irelaend, *irela;
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bfd_vma base_end;
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/* If there aren't any relocs, then there's nothing more
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to do. */
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if ((isec->flags & SEC_RELOC) == 0
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|| isec->reloc_count == 0)
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continue;
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/* Get the relocs. */
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internal_relocs =
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_bfd_elf_link_read_relocs (ibfd, isec, NULL, NULL,
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info->keep_memory);
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if (internal_relocs == NULL)
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return FALSE;
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/* 1 quadword can contain up to 4 R_SPU_ADDR32
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relocations. They are stored in a single word by
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saving the upper 28 bits of the address and setting the
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lower 4 bits to a bit mask of the words that have the
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relocation. BASE_END keeps track of the next quadword. */
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irela = internal_relocs;
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irelaend = irela + isec->reloc_count;
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base_end = 0;
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for (; irela < irelaend; irela++)
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if (ELF32_R_TYPE (irela->r_info) == R_SPU_ADDR32
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&& irela->r_offset >= base_end)
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{
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base_end = (irela->r_offset & ~(bfd_vma) 15) + 16;
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fixup_count++;
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}
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}
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}
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/* We always have a NULL fixup as a sentinel */
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size = (fixup_count + 1) * FIXUP_RECORD_SIZE;
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if (!bfd_set_section_size (output_bfd, sfixup, size))
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return FALSE;
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sfixup->contents = (bfd_byte *) bfd_zalloc (info->input_bfds, size);
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if (sfixup->contents == NULL)
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return FALSE;
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}
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return TRUE;
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}
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#define TARGET_BIG_SYM bfd_elf32_spu_vec
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#define TARGET_BIG_NAME "elf32-spu"
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#define ELF_ARCH bfd_arch_spu
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@ -57,6 +57,9 @@ struct spu_elf_params
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/* Set if non-icache code should be allowed in icache lines. */
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unsigned int non_ia_text : 1;
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/* Set when the .fixup section should be generated. */
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unsigned int emit_fixups : 1;
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/* Range of valid addresses for loadable sections. */
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bfd_vma local_store_lo;
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bfd_vma local_store_hi;
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@ -114,6 +117,7 @@ extern void spu_elf_plugin (int);
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extern bfd_boolean spu_elf_open_builtin_lib (bfd **,
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const struct _ovl_stream *);
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extern bfd_boolean spu_elf_create_sections (struct bfd_link_info *);
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extern bfd_boolean spu_elf_size_sections (bfd *, struct bfd_link_info *);
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extern int spu_elf_find_overlays (struct bfd_link_info *);
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extern int spu_elf_size_stubs (struct bfd_link_info *);
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extern void spu_elf_place_overlay_data (struct bfd_link_info *);
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11
ld/ChangeLog
11
ld/ChangeLog
@ -1,3 +1,14 @@
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2009-08-05 Trevor Smigiel <Trevor_Smigiel@playstation.sony.com>
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* emulparams/elf32_spu.sh (OTHER_READONLY_SECTIONS): Add .fixup
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section and __fixup_start symbol.
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* emultempl/spuelf.em (params): Initialize emit_fixups member.
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(spu_before_allocation): Call spu_elf_size_sections.
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(OPTION_SPU_EMIT_FIXUPS): Define.
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(PARSE_AND_LIST_LONGOPTS): Add --emit-fixups.
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(PARSE_AND_LIST_ARGS_CASES): Handle --emit-fixups.
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* ld.texinfo (--emit-fixups): Document.
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2009-08-04 Alan Modra <amodra@bigpond.net.au>
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PR 10474
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@ -20,3 +20,8 @@ DATA_ADDR="ALIGN(${MAXPAGESIZE})"
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OTHER_BSS_SECTIONS=".toe ALIGN(128) : { *(.toe) } = 0"
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OTHER_SECTIONS=".note.spu_name 0 : { KEEP(*(.note.spu_name)) }
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._ea 0 : { KEEP(*(._ea)) KEEP(*(._ea.*)) }"
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OTHER_READONLY_SECTIONS="
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.fixup ${RELOCATING-0} : {
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PROVIDE (__fixup_start = .);
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KEEP(*(.fixup))
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}"
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@ -37,7 +37,7 @@ static struct spu_elf_params params =
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&spu_elf_load_ovl_mgr,
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&spu_elf_open_overlay_script,
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&spu_elf_relink,
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0, ovly_normal, 0, 0, 0, 0, 0, 0, 0,
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0, ovly_normal, 0, 0, 0, 0, 0, 0, 0, 0,
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0, 0x3ffff,
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1, 0, 16, 0, 0, 2000
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};
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@ -316,6 +316,10 @@ spu_before_allocation (void)
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lang_reset_memory_regions ();
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}
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if (is_spu_target ()
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&& !link_info.relocatable)
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spu_elf_size_sections (link_info.output_bfd, &link_info);
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gld${EMULATION_NAME}_before_allocation ();
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}
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@ -600,6 +604,7 @@ PARSE_AND_LIST_PROLOGUE='
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#define OPTION_SPU_RESERVED_SPACE (OPTION_SPU_FIXED_SPACE + 1)
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#define OPTION_SPU_EXTRA_STACK (OPTION_SPU_RESERVED_SPACE + 1)
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#define OPTION_SPU_NO_AUTO_OVERLAY (OPTION_SPU_EXTRA_STACK + 1)
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#define OPTION_SPU_EMIT_FIXUPS (OPTION_SPU_NO_AUTO_OVERLAY + 1)
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'
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PARSE_AND_LIST_LONGOPTS='
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@ -625,6 +630,7 @@ PARSE_AND_LIST_LONGOPTS='
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{ "reserved-space", required_argument, NULL, OPTION_SPU_RESERVED_SPACE },
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{ "extra-stack-space", required_argument, NULL, OPTION_SPU_EXTRA_STACK },
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{ "no-auto-overlay", optional_argument, NULL, OPTION_SPU_NO_AUTO_OVERLAY },
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{ "emit-fixups", optional_argument, NULL, OPTION_SPU_EMIT_FIXUPS },
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'
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PARSE_AND_LIST_OPTIONS='
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@ -812,6 +818,10 @@ PARSE_AND_LIST_ARGS_CASES='
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break;
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}
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break;
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case OPTION_SPU_EMIT_FIXUPS:
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params.emit_fixups = 1;
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break;
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'
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LDEMUL_AFTER_OPEN=spu_after_open
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@ -1,3 +1,8 @@
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2009-08-05 Trevor Smigiel <Trevor_Smigiel@playstation.sony.com>
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* ld-spu/fixup.d: New.
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* ld-spu/fixup.s: New.
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2009-08-05 Nathan Sidwell <nathan@codesourcery.com>
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* ld-arm/cortex-a8-far-1.s: New.
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20
ld/testsuite/ld-spu/fixup.d
Normal file
20
ld/testsuite/ld-spu/fixup.d
Normal file
@ -0,0 +1,20 @@
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#source: fixup.s
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#ld: --emit-fixups
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#objdump: -s
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.*elf32-spu
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Contents of section .text:
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0000 00000000 ....
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Contents of section .fixup:
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0004 0000008b 00000091 000000c1 00000000 ................
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Contents of section .data:
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0080 000000d0 00000000 00000000 000000c0 ................
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0090 00000000 00000000 00000000 000000b0 ................
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00a0 00000001 00000000 00000000 00000000 ................
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00b0 00000002 00000000 00000000 00000000 ................
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00c0 00000000 00000000 00000000 00000080 ................
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Contents of section .note.spu_name:
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.*
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.*
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#pass
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24
ld/testsuite/ld-spu/fixup.s
Normal file
24
ld/testsuite/ld-spu/fixup.s
Normal file
@ -0,0 +1,24 @@
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.global _end
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.global _start
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.global glob
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.global after
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.global before
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.weak undef
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.section .text,"ax"
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_start:
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stop
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.data
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.p2align 4
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before:
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.long _end, 0, _start, after
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.long 0, 0, 0, glob
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loc:
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.long 1,0,0,0
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glob:
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.long 2,0,0,0
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after:
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.long 0, 0, 0, before
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