mirror of
https://github.com/darlinghq/darling-gdb.git
synced 2025-02-17 16:09:47 +00:00
* gencode.c: Fix various indention & style problems.
Remove test code. Remove #if 0 code.
* interp.c: Provide prototypes for all static functions.
Fix minor indention problems.
(sim_open, sim_resume): Remove unused variables.
(sim_read): Return type is "int".
* simops.c: Remove unused variables.
(divh): Make result of divide-by-zero zero.
(setf): Initialize result to keep compiler quiet.
(sar instructions): These just clear the overflow bit.
* v850_sim.h: Provide prototypes for put_byte, put_half
and put_word.
Cleaning up.
This commit is contained in:
Jeff Law
parent
eb5c28e173
commit
9fca2fd3c6
@ -1,5 +1,18 @@
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Tue Sep 3 10:20:30 1996 Jeffrey A Law (law@cygnus.com)
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* gencode.c: Fix various indention & style problems.
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Remove test code. Remove #if 0 code.
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* interp.c: Provide prototypes for all static functions.
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Fix minor indention problems.
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(sim_open, sim_resume): Remove unused variables.
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(sim_read): Return type is "int".
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* simops.c: Remove unused variables.
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(divh): Make result of divide-by-zero zero.
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(setf): Initialize result to keep compiler quiet.
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(sar instructions): These just clear the overflow bit.
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* v850_sim.h: Provide prototypes for put_byte, put_half
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and put_word.
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* interp.c: OP should be an array of 32bit operands!
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(v850_callback): Declare.
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(do_format_5): Fix extraction of OP[0].
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@ -4,14 +4,17 @@ static void write_header PARAMS ((void));
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static void write_opcodes PARAMS ((void));
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static void write_template PARAMS ((void));
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long Opcodes[512];
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static int curop=0;
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int
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main (argc, argv)
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int argc;
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char *argv[];
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{
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if ((argc > 1) && (strcmp (argv[1],"-h") == 0))
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if ((argc > 1) && (strcmp (argv[1], "-h") == 0))
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write_header();
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else if ((argc > 1) && (strcmp (argv[1],"-t") == 0))
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else if ((argc > 1) && (strcmp (argv[1], "-t") == 0))
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write_template ();
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else
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write_opcodes();
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@ -25,7 +28,8 @@ write_header ()
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struct v850_opcode *opcode;
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for (opcode = (struct v850_opcode *)v850_opcodes; opcode->name; opcode++)
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printf("void OP_%X PARAMS ((void));\t\t/* %s */\n",opcode->opcode, opcode->name);
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printf("void OP_%X PARAMS ((void));\t\t/* %s */\n",
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opcode->opcode, opcode->name);
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}
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@ -43,7 +47,7 @@ write_template ()
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for (opcode = (struct v850_opcode *)v850_opcodes; opcode->name; opcode++)
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{
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printf("/* %s */\nvoid\nOP_%X ()\n{\n",opcode->name,opcode->opcode);
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printf("/* %s */\nvoid\nOP_%X ()\n{\n", opcode->name, opcode->opcode);
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/* count operands */
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j = 0;
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@ -57,38 +61,26 @@ write_template ()
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switch (j)
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{
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case 0:
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printf ("printf(\" %s\\n\");\n",opcode->name);
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printf ("printf(\" %s\\n\");\n", opcode->name);
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break;
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case 1:
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printf ("printf(\" %s\\t%%x\\n\",OP[0]);\n",opcode->name);
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printf ("printf(\" %s\\t%%x\\n\", OP[0]);\n", opcode->name);
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break;
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case 2:
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printf ("printf(\" %s\\t%%x,%%x\\n\",OP[0],OP[1]);\n",opcode->name);
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printf ("printf(\" %s\\t%%x,%%x\\n\",OP[0],OP[1]);\n",
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opcode->name);
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break;
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case 3:
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printf ("printf(\" %s\\t%%x,%%x,%%x\\n\",OP[0],OP[1],OP[2]);\n",opcode->name);
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printf ("printf(\" %s\\t%%x,%%x,%%x\\n\",OP[0],OP[1],OP[2]);\n",
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opcode->name);
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break;
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default:
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fprintf (stderr,"Too many operands: %d\n",j);
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fprintf (stderr,"Too many operands: %d\n", j);
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}
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printf ("}\n\n");
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}
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}
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long Opcodes[512];
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static int curop=0;
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check_opcodes( long op)
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{
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int i;
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for (i=0;i<curop;i++)
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if (Opcodes[i] == op)
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fprintf(stderr,"DUPLICATE OPCODES: %x\n",op);
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}
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static void
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write_opcodes ()
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{
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@ -105,8 +97,6 @@ write_opcodes ()
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printf (" { %ld,%ld,OP_%X,",
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opcode->opcode, opcode->mask, opcode->opcode);
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/* REMOVE ME */
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check_opcodes (opcode->opcode);
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Opcodes[curop++] = opcode->opcode;
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/* count operands */
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@ -130,11 +120,8 @@ write_opcodes ()
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{
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if (j)
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printf (", ");
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#if 0
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if ((flags & OPERAND_REG) && (opcode->format == LONG_L))
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shift += 15;
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#endif
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printf ("%d,%d,%d",shift,v850_operands[opcode->operands[i]].bits,flags);
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printf ("%d,%d,%d", shift,
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v850_operands[opcode->operands[i]].bits,flags);
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j = 1;
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}
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}
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@ -6,7 +6,7 @@
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void
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OP_300 ()
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{
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unsigned int op0, op1, op2;
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unsigned int op2;
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int result, temp;
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temp = OP[1];
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@ -21,7 +21,7 @@ OP_300 ()
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void
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OP_400 ()
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{
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unsigned int op0, op1, op2;
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unsigned int op2;
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int result, temp;
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temp = OP[1];
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@ -36,7 +36,7 @@ OP_400 ()
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void
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OP_500 ()
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{
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unsigned int op0, op1, op2;
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unsigned int op2;
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int result, temp;
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temp = OP[1];
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@ -50,8 +50,8 @@ OP_500 ()
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void
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OP_380 ()
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{
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unsigned int op0, op1, op2;
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int result, temp;
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unsigned int op0, op1;
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int temp;
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op0 = State.regs[OP[0]];
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temp = OP[1];
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@ -64,8 +64,8 @@ OP_380 ()
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void
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OP_480 ()
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{
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unsigned int op0, op1, op2;
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int result, temp;
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unsigned int op0, op1;
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int temp;
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op0 = State.regs[OP[0]];
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temp = OP[1];
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@ -78,8 +78,8 @@ OP_480 ()
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void
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OP_501 ()
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{
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unsigned int op0, op1, op2;
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int result, temp;
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unsigned int op0, op1;
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int temp;
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op0 = State.regs[OP[0]];
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temp = OP[1];
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@ -92,7 +92,7 @@ OP_501 ()
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void
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OP_700 ()
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{
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unsigned int op0, op1, op2;
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unsigned int op0, op2;
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int result, temp;
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op0 = State.regs[OP[0]];
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@ -108,7 +108,7 @@ OP_700 ()
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void
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OP_720 ()
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{
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unsigned int op0, op1, op2;
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unsigned int op0, op2;
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int result, temp;
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op0 = State.regs[OP[0]];
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@ -125,7 +125,7 @@ OP_720 ()
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void
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OP_10720 ()
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{
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unsigned int op0, op1, op2;
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unsigned int op0, op2;
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int result, temp;
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op0 = State.regs[OP[0]];
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@ -142,7 +142,7 @@ void
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OP_740 ()
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{
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unsigned int op0, op1, op2;
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int result, temp;
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int temp;
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op0 = State.regs[OP[0]];
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op1 = State.regs[OP[1]];
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@ -157,7 +157,7 @@ void
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OP_760 ()
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{
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unsigned int op0, op1, op2;
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int result, temp;
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int temp;
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op0 = State.regs[OP[0]];
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op1 = State.regs[OP[1]];
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@ -173,7 +173,7 @@ void
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OP_10760 ()
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{
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unsigned int op0, op1, op2;
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int result, temp;
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int temp;
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op0 = State.regs[OP[0]];
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op1 = State.regs[OP[1]];
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@ -189,7 +189,6 @@ void
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OP_580 ()
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{
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unsigned int op0, psw;
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int temp;
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op0 = ((signed)OP[0] << 23) >> 23;
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psw = State.sregs[5];
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@ -205,7 +204,6 @@ void
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OP_581 ()
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{
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unsigned int op0, psw;
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int temp;
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op0 = ((signed)OP[0] << 23) >> 23;
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psw = State.sregs[5];
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@ -221,7 +219,6 @@ void
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OP_582 ()
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{
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unsigned int op0, psw;
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int temp;
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op0 = ((signed)OP[0] << 23) >> 23;
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psw = State.sregs[5];
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@ -237,7 +234,6 @@ void
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OP_583 ()
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{
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unsigned int op0, psw;
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int temp;
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op0 = ((signed)OP[0] << 23) >> 23;
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psw = State.sregs[5];
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@ -253,7 +249,6 @@ void
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OP_584 ()
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{
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unsigned int op0, psw;
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int temp;
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op0 = ((signed)OP[0] << 23) >> 23;
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psw = State.sregs[5];
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@ -269,7 +264,6 @@ void
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OP_585 ()
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{
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unsigned int op0;
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int temp;
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op0 = ((signed)OP[0] << 23) >> 23;
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State.pc += op0;
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@ -280,7 +274,6 @@ void
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OP_586 ()
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{
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unsigned int op0, psw;
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int temp;
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op0 = ((signed)OP[0] << 23) >> 23;
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psw = State.sregs[5];
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@ -296,7 +289,6 @@ void
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OP_587 ()
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{
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unsigned int op0, psw;
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int temp;
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op0 = ((signed)OP[0] << 23) >> 23;
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psw = State.sregs[5];
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@ -313,7 +305,6 @@ void
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OP_588 ()
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{
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unsigned int op0, psw;
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int temp;
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op0 = ((signed)OP[0] << 23) >> 23;
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psw = State.sregs[5];
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@ -329,7 +320,6 @@ void
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OP_589 ()
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{
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unsigned int op0, psw;
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int temp;
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op0 = ((signed)OP[0] << 23) >> 23;
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psw = State.sregs[5];
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@ -345,7 +335,6 @@ void
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OP_58A ()
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{
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unsigned int op0, psw;
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int temp;
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op0 = ((signed)OP[0] << 23) >> 23;
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psw = State.sregs[5];
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@ -361,7 +350,6 @@ void
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OP_58B ()
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{
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unsigned int op0, psw;
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int temp;
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op0 = ((signed)OP[0] << 23) >> 23;
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psw = State.sregs[5];
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@ -377,7 +365,6 @@ void
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OP_58C ()
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{
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unsigned int op0, psw;
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int temp;
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op0 = ((signed)OP[0] << 23) >> 23;
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psw = State.sregs[5];
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@ -393,7 +380,6 @@ void
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OP_58D ()
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{
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unsigned int op0, psw;
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int temp;
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op0 = ((signed)OP[0] << 23) >> 23;
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psw = State.sregs[5];
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@ -409,7 +395,6 @@ void
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OP_58E ()
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{
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unsigned int op0, psw;
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int temp;
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op0 = ((signed)OP[0] << 23) >> 23;
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psw = State.sregs[5];
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@ -425,7 +410,6 @@ void
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OP_58F ()
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{
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unsigned int op0, psw;
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int temp;
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op0 = ((signed)OP[0] << 23) >> 23;
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psw = State.sregs[5];
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@ -651,7 +635,7 @@ OP_6E0 ()
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void
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OP_40 ()
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{
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unsigned int op0, op1, result, z, s, cy, ov;
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unsigned int op0, op1, result, ov, s, z;
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int temp;
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/* Compute the result. */
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@ -671,7 +655,10 @@ OP_40 ()
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ov = 0;
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}
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else
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ov = 1;
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{
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result = 0x0;
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ov = 1;
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}
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/* Compute the condition codes. */
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z = (result == 0);
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@ -741,7 +728,7 @@ OP_7E0 ()
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{
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/* Hack alert. We turn off a bit in op0 since we really only
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wanted 4 bits. */
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unsigned int op0, psw, result;
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unsigned int op0, psw, result = 0;
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op0 = OP[0] & 0xf;
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psw = State.sregs[5];
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@ -978,7 +965,7 @@ OP_80 ()
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void
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OP_160 ()
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{
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unsigned int op0, op1, result, z, s, cy, ov;
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unsigned int op0, op1, result, z, s;
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/* Compute the result. */
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op0 = State.regs[OP[0]];
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@ -1038,7 +1025,7 @@ OP_640 ()
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void
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OP_2A0 ()
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{
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unsigned int op0, op1, result, z, s, cy, ov;
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unsigned int op0, op1, result, z, s, cy;
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op0 = OP[0] & 0x1f;
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op1 = State.regs[OP[1]];
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@ -1053,14 +1040,14 @@ OP_2A0 ()
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State.regs[OP[1]] = result;
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State.sregs[5] &= ~(PSW_Z | PSW_S | PSW_OV | PSW_CY);
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State.sregs[5] |= ((z ? PSW_Z : 0) | (s ? PSW_S : 0)
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| (cy ? PSW_CY : 0) | (ov ? PSW_OV : 0));
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| (cy ? PSW_CY : 0));
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}
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/* sar reg1, reg2 */
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void
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OP_A007E0 ()
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{
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unsigned int op0, op1, result, z, s, cy, ov;
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unsigned int op0, op1, result, z, s, cy;
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op0 = State.regs[OP[0]] & 0x1f;
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op1 = State.regs[OP[1]];
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@ -1082,7 +1069,7 @@ OP_A007E0 ()
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void
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OP_2C0 ()
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{
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unsigned int op0, op1, result, z, s, cy, ov;
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unsigned int op0, op1, result, z, s, cy;
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op0 = OP[0] & 0x1f;
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op1 = State.regs[OP[1]];
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@ -1104,7 +1091,7 @@ OP_2C0 ()
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void
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OP_C007E0 ()
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{
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unsigned int op0, op1, result, z, s, cy, ov;
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unsigned int op0, op1, result, z, s, cy;
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op0 = State.regs[OP[0]] & 0x1f;
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op1 = State.regs[OP[1]];
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@ -1126,7 +1113,7 @@ OP_C007E0 ()
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void
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OP_280 ()
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{
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unsigned int op0, op1, result, z, s, cy, ov;
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unsigned int op0, op1, result, z, s, cy;
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op0 = OP[0] & 0x1f;
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op1 = State.regs[OP[1]];
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@ -1148,7 +1135,7 @@ OP_280 ()
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void
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OP_8007E0 ()
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{
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unsigned int op0, op1, result, z, s, cy, ov;
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unsigned int op0, op1, result, z, s, cy;
|
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op0 = State.regs[OP[0]] & 0x1f;
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op1 = State.regs[OP[1]];
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@ -1170,7 +1157,7 @@ OP_8007E0 ()
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void
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OP_100 ()
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{
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unsigned int op0, op1, result, z, s, cy, ov;
|
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unsigned int op0, op1, result, z, s;
|
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/* Compute the result. */
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op0 = State.regs[OP[0]];
|
||||
@ -1191,7 +1178,7 @@ OP_100 ()
|
||||
void
|
||||
OP_680 ()
|
||||
{
|
||||
unsigned int op0, op1, result, z, s, cy, ov;
|
||||
unsigned int op0, op1, result, z, s;
|
||||
|
||||
op0 = OP[0] & 0xffff;
|
||||
op1 = State.regs[OP[1]];
|
||||
@ -1211,7 +1198,7 @@ OP_680 ()
|
||||
void
|
||||
OP_140 ()
|
||||
{
|
||||
unsigned int op0, op1, result, z, s, cy, ov;
|
||||
unsigned int op0, op1, result, z, s;
|
||||
|
||||
/* Compute the result. */
|
||||
op0 = State.regs[OP[0]];
|
||||
@ -1232,7 +1219,7 @@ OP_140 ()
|
||||
void
|
||||
OP_6C0 ()
|
||||
{
|
||||
unsigned int op0, op1, result, z, s, cy, ov;
|
||||
unsigned int op0, op1, result, z;
|
||||
|
||||
op0 = OP[0] & 0xffff;
|
||||
op1 = State.regs[OP[1]];
|
||||
@ -1251,7 +1238,7 @@ OP_6C0 ()
|
||||
void
|
||||
OP_120 ()
|
||||
{
|
||||
unsigned int op0, op1, result, z, s, cy, ov;
|
||||
unsigned int op0, op1, result, z, s;
|
||||
|
||||
/* Compute the result. */
|
||||
op0 = State.regs[OP[0]];
|
||||
@ -1272,7 +1259,7 @@ OP_120 ()
|
||||
void
|
||||
OP_6A0 ()
|
||||
{
|
||||
unsigned int op0, op1, result, z, s, cy, ov;
|
||||
unsigned int op0, op1, result, z, s;
|
||||
|
||||
op0 = OP[0] & 0xffff;
|
||||
op1 = State.regs[OP[1]];
|
||||
@ -1292,7 +1279,7 @@ OP_6A0 ()
|
||||
void
|
||||
OP_20 ()
|
||||
{
|
||||
unsigned int op0, result, z, s, cy, ov;
|
||||
unsigned int op0, result, z, s;
|
||||
|
||||
/* Compute the result. */
|
||||
op0 = State.regs[OP[0]];
|
||||
@ -1313,7 +1300,7 @@ void
|
||||
OP_7C0 ()
|
||||
{
|
||||
unsigned int op0, op1, op2;
|
||||
int result, temp;
|
||||
int temp;
|
||||
|
||||
op0 = State.regs[OP[0]];
|
||||
op1 = OP[1] & 0x7;
|
||||
@ -1333,7 +1320,7 @@ void
|
||||
OP_47C0 ()
|
||||
{
|
||||
unsigned int op0, op1, op2;
|
||||
int result, temp;
|
||||
int temp;
|
||||
|
||||
op0 = State.regs[OP[0]];
|
||||
op1 = OP[1] & 0x7;
|
||||
@ -1353,7 +1340,7 @@ void
|
||||
OP_87C0 ()
|
||||
{
|
||||
unsigned int op0, op1, op2;
|
||||
int result, temp;
|
||||
int temp;
|
||||
|
||||
op0 = State.regs[OP[0]];
|
||||
op1 = OP[1] & 0x7;
|
||||
@ -1373,7 +1360,7 @@ void
|
||||
OP_C7C0 ()
|
||||
{
|
||||
unsigned int op0, op1, op2;
|
||||
int result, temp;
|
||||
int temp;
|
||||
|
||||
op0 = State.regs[OP[0]];
|
||||
op1 = OP[1] & 0x7;
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user