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2007-01-04 Paul Brook <paul@codesourcery.com>

Browse Source 
gas/
	* config/tc-arm.c (do_cpsi): Set mmod bit for 2 argument form.
	gas/testsuite/
	* gas/arm/archv6.s: Add more cpsie tests.
	* gas/arm/archv6.d: Ditto.
	opcodes/
	* arm-dis.c (arm_opcodes): Fix cpsie and cpsid entries.
This commit is contained in:
Paul Brook 2007-01-04 20:08:36 +00:00
parent aa79a185c9
commit a028a6f534
7 changed files with 27 additions and 5 deletions
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4
gas/ChangeLog
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@ -1,3 +1,7 @@
2007-01-04 Paul Brook <paul@codesourcery.com>
* config/tc-arm.c (do_cpsi): Set mmod bit for 2 argument form.
2007-01-04 H.J. Lu <hongjiu.lu@intel.com>
PR gas/3826

7
gas/config/tc-arm.c
View File

@ -548,6 +548,7 @@ struct asm_opcode
#define INDEX_UP 0x00800000
#define WRITE_BACK 0x00200000
#define LDM_TYPE_2_OR_3 0x00400000
#define CPSI_MMOD 0x00020000
#define LITERAL_MASK 0xf000f000
#define OPCODE_MASK 0xfe1fffff
@ -6828,7 +6829,11 @@ static void
do_cpsi (void)
{
inst.instruction |= inst.operands[0].imm << 6;
inst.instruction |= inst.operands[1].imm;
if (inst.operands[1].present)
{
inst.instruction |= CPSI_MMOD;
inst.instruction |= inst.operands[1].imm;
}
}
static void

5
gas/testsuite/ChangeLog
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@ -1,3 +1,8 @@
2007-01-04 Paul Brook <paul@codesourcery.com>
* gas/arm/archv6.s: Add more cpsie tests.
* gas/arm/archv6.d: Ditto.
2007-01-04 Andreas Schwab <schwab@suse.de>
* gas/m68k/cpu32.[sd]: New test.

2
gas/testsuite/gas/arm/archv6.d
View File

@ -217,3 +217,5 @@ Disassembly of section .text:
0+344 <[^>]*> e6ef2475 ? uxtb r2,r5, ROR #8
0+348 <[^>]*> 16ef2075 ? uxtbne r2,r5
0+34c <[^>]*> 16ef2475 ? uxtbne r2,r5, ROR #8
0+350 <[^>]*> f10a00ca ? cpsie if,#10
0+354 <[^>]*> f10a00d5 ? cpsie if,#21

2
gas/testsuite/gas/arm/archv6.s
View File

@ -214,3 +214,5 @@ label:
uxtb r2, r5, ROR #8
uxtbne r2, r5
uxtbne r2, r5, ROR #8
cpsie if, #10
cpsie if, #21

4
opcodes/ChangeLog
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@ -1,3 +1,7 @@
2007-01-04 Paul Brook <paul@codesourcery.com>
* arm-dis.c (arm_opcodes): Fix cpsie and cpsid entries.
2007-01-04 Andreas Schwab <schwab@suse.de>
* m68k-opc.c: Fix encoding of signed bit in the cpu32 tbls insns.

8
opcodes/arm-dis.c
View File

@ -814,10 +814,10 @@ static const struct opcode32 arm_opcodes[] =
{ARM_EXT_V6K, 0x0320f000, 0x0fffff00, "nop%c\t{%0-7d}"},
/* ARM V6 instructions. */
{ARM_EXT_V6, 0xf1080000, 0xfffdfe3f, "cpsie\t%8'a%7'i%6'f"},
{ARM_EXT_V6, 0xf1080000, 0xfffdfe20, "cpsie\t%8'a%7'i%6'f,#%0-4d"},
{ARM_EXT_V6, 0xf10C0000, 0xfffdfe3f, "cpsid\t%8'a%7'i%6'f"},
{ARM_EXT_V6, 0xf10C0000, 0xfffdfe20, "cpsid\t%8'a%7'i%6'f,#%0-4d"},
{ARM_EXT_V6, 0xf1080000, 0xfffffe3f, "cpsie\t%8'a%7'i%6'f"},
{ARM_EXT_V6, 0xf10a0000, 0xfffffe20, "cpsie\t%8'a%7'i%6'f,#%0-4d"},
{ARM_EXT_V6, 0xf10C0000, 0xfffffe3f, "cpsid\t%8'a%7'i%6'f"},
{ARM_EXT_V6, 0xf10e0000, 0xfffffe20, "cpsid\t%8'a%7'i%6'f,#%0-4d"},
{ARM_EXT_V6, 0xf1000000, 0xfff1fe20, "cps\t#%0-4d"},
{ARM_EXT_V6, 0x06800010, 0x0ff00ff0, "pkhbt%c\t%12-15r, %16-19r, %0-3r"},
{ARM_EXT_V6, 0x06800010, 0x0ff00070, "pkhbt%c\t%12-15r, %16-19r, %0-3r, LSL #%7-11d"},