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* config/tc-v850.h (TC_GENERIC_RELAX_TABLE): Define.
* config/tc-v850.c: Fix some indention problems.
(md_relax_table): Define for D9->D99 branch displacement
relaxing.
(md_convert_frag): Do something useful instead of aborting.
(md_estimate_size_before_relax): Likewise.
(md_assemble): Note if the matching instruction has a relaxable
operand. If it does, allocate frag with frag_var and don't
do any fixups.
So we can do 9bit displacement to 22bit displacement relaxing.
This commit is contained in:
Jeff Law
parent
244558e354
commit
a334533c1b
@ -1,3 +1,24 @@
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start-sanitize-v850
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Tue Oct 29 12:28:16 1996 Jeffrey A Law (law@cygnus.com)
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* config/tc-v850.h (TC_GENERIC_RELAX_TABLE): Define.
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* config/tc-v850.c: Fix some indention problems.
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(md_relax_table): Define for D9->D99 branch displacement
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relaxing.
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(md_convert_frag): Do something useful instead of aborting.
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(md_estimate_size_before_relax): Likewise.
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(md_assemble): Note if the matching instruction has a relaxable
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operand. If it does, allocate frag with frag_var and don't
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do any fixups.
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end-sanitize-v850
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start-sanitize-d10v
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Mon Oct 28 10:48:40 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
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* config/tc-d10v.h (md_cleanup): New function. This is needed to
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write out any buffered instructions when a ".end" is found.
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end-sanitize-d10v
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Mon Oct 28 10:43:45 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
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* read.c (read_a_source_file): New hook md_cleanup().
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@ -56,6 +56,11 @@ const char EXP_CHARS[] = "eE";
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const char FLT_CHARS[] = "dD";
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const relax_typeS md_relax_table[] = {
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{0xff, -0x100, 2, 1},
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{0x1fffff, -0x200000, 6, 0},
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};
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/* local functions */
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static unsigned long v850_insert_operand
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PARAMS ((unsigned long insn, const struct v850_operand *operand,
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@ -410,14 +415,42 @@ md_atof (type, litp, sizep)
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}
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/* Very gross. */
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void
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md_convert_frag (abfd, sec, fragP)
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bfd *abfd;
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asection *sec;
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fragS *fragP;
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{
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/* printf ("call to md_convert_frag \n"); */
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abort ();
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subseg_change (sec, 0);
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if (fragP->fr_subtype == 0)
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{
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fragP->fr_var = 0;
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fragP->fr_fix = 2;
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fix_new (fragP, 0, 2, fragP->fr_symbol,
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fragP->fr_offset, 1, BFD_RELOC_UNUSED + (int)fragP->fr_opcode);
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}
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else if (fragP->fr_subtype == 1)
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{
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fragP->fr_var = 0;
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fragP->fr_fix = 6;
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/* Reverse the condition of the first branch. */
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fragP->fr_literal[0] &= 0xf7;
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/* Mask off all the displacement bits. */
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fragP->fr_literal[0] &= 0x8f;
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fragP->fr_literal[1] &= 0x07;
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/* Now set the displacement bits so that we branch
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around the unconditional branch. */
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fragP->fr_literal[0] |= 0x30;
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/* Now create the unconditional branch + fixup to the final
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target. */
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md_number_to_chars (&fragP->fr_literal[2], 0x00000780, 4);
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fix_new (fragP, 2, 4, fragP->fr_symbol,
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fragP->fr_offset, 1, BFD_RELOC_UNUSED + (int)fragP->fr_opcode + 1);
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}
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else
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abort ();
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}
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valueT
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@ -537,7 +570,7 @@ md_assemble (str)
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struct v850_opcode *opcode;
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struct v850_opcode *next_opcode;
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const unsigned char *opindex_ptr;
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int next_opindex;
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int next_opindex, relaxable;
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unsigned long insn, insn_size;
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char *f;
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int i;
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@ -568,6 +601,7 @@ md_assemble (str)
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{
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const char *errmsg = NULL;
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relaxable = 0;
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fc = 0;
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match = 0;
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next_opindex = 0;
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@ -593,6 +627,9 @@ md_assemble (str)
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while (*str == ' ' || *str == ',' || *str == '[' || *str == ']')
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++str;
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if (operand->flags & V850_OPERAND_RELAX)
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relaxable = 1;
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/* Gather the operand. */
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hold = input_line_pointer;
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input_line_pointer = str;
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@ -647,107 +684,107 @@ md_assemble (str)
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}
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else
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{
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if ((operand->flags & V850_OPERAND_REG) != 0)
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{
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if (!register_name(&ex))
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if ((operand->flags & V850_OPERAND_REG) != 0)
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{
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errmsg = "invalid register name";
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goto error;
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if (!register_name(&ex))
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{
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errmsg = "invalid register name";
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goto error;
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}
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}
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}
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else if ((operand->flags & V850_OPERAND_SRG) != 0)
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{
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if (!system_register_name(&ex))
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else if ((operand->flags & V850_OPERAND_SRG) != 0)
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{
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errmsg = "invalid system register name";
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goto error;
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if (!system_register_name(&ex))
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{
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errmsg = "invalid system register name";
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goto error;
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}
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}
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}
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else if ((operand->flags & V850_OPERAND_EP) != 0)
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{
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char *start = input_line_pointer;
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char c = get_symbol_end ();
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if (strcmp (start, "ep") != 0 && strcmp (start, "r30") != 0)
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else if ((operand->flags & V850_OPERAND_EP) != 0)
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{
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/* Put things back the way we found them. */
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char *start = input_line_pointer;
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char c = get_symbol_end ();
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if (strcmp (start, "ep") != 0 && strcmp (start, "r30") != 0)
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{
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/* Put things back the way we found them. */
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*input_line_pointer = c;
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input_line_pointer = start;
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errmsg = "expected EP register";
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goto error;
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}
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*input_line_pointer = c;
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input_line_pointer = start;
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errmsg = "expected EP register";
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goto error;
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}
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*input_line_pointer = c;
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str = input_line_pointer;
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input_line_pointer = hold;
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str = input_line_pointer;
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input_line_pointer = hold;
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while (*str == ' ' || *str == ',' || *str == '[' || *str == ']')
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++str;
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continue;
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}
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else if ((operand->flags & V850_OPERAND_CC) != 0)
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{
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if (!cc_name(&ex))
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while (*str == ' ' || *str == ',' || *str == '[' || *str == ']')
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++str;
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continue;
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}
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else if ((operand->flags & V850_OPERAND_CC) != 0)
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{
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errmsg = "invalid condition code name";
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if (!cc_name(&ex))
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{
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errmsg = "invalid condition code name";
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goto error;
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}
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}
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else if (register_name (&ex)
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&& (operand->flags & V850_OPERAND_REG) == 0)
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{
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errmsg = "syntax error: register not expected";
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goto error;
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}
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}
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else if (register_name (&ex)
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&& (operand->flags & V850_OPERAND_REG) == 0)
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{
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errmsg = "syntax error: register not expected";
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goto error;
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}
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else if (system_register_name (&ex)
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&& (operand->flags & V850_OPERAND_SRG) == 0)
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{
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errmsg = "syntax error: system register not expected";
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goto error;
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}
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else if (cc_name (&ex)
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&& (operand->flags & V850_OPERAND_CC) == 0)
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{
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errmsg = "syntax error: condition code not expected";
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goto error;
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}
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else
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{
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expression(&ex);
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}
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else if (system_register_name (&ex)
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&& (operand->flags & V850_OPERAND_SRG) == 0)
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{
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errmsg = "syntax error: system register not expected";
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goto error;
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}
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else if (cc_name (&ex)
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&& (operand->flags & V850_OPERAND_CC) == 0)
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{
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errmsg = "syntax error: condition code not expected";
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goto error;
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}
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else
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{
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expression(&ex);
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}
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switch (ex.X_op)
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{
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case O_illegal:
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errmsg = "illegal operand";
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goto error;
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case O_absent:
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errmsg = "missing operand";
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goto error;
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case O_register:
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if ((operand->flags & (V850_OPERAND_REG | V850_OPERAND_SRG)) == 0)
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switch (ex.X_op)
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{
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errmsg = "invalid operand";
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case O_illegal:
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errmsg = "illegal operand";
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goto error;
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}
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case O_absent:
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errmsg = "missing operand";
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goto error;
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case O_register:
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if ((operand->flags & (V850_OPERAND_REG | V850_OPERAND_SRG)) == 0)
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{
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errmsg = "invalid operand";
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goto error;
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}
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insn = v850_insert_operand (insn, operand, ex.X_add_number,
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(char *) NULL, 0);
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break;
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insn = v850_insert_operand (insn, operand, ex.X_add_number,
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(char *) NULL, 0);
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break;
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case O_constant:
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insn = v850_insert_operand (insn, operand, ex.X_add_number,
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(char *) NULL, 0);
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break;
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case O_constant:
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insn = v850_insert_operand (insn, operand, ex.X_add_number,
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(char *) NULL, 0);
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break;
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default:
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/* We need to generate a fixup for this expression. */
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if (fc >= MAX_INSN_FIXUPS)
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as_fatal ("too many fixups");
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fixups[fc].exp = ex;
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fixups[fc].opindex = *opindex_ptr;
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fixups[fc].reloc = BFD_RELOC_UNUSED;
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++fc;
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break;
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}
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default:
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/* We need to generate a fixup for this expression. */
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if (fc >= MAX_INSN_FIXUPS)
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as_fatal ("too many fixups");
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fixups[fc].exp = ex;
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fixups[fc].opindex = *opindex_ptr;
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fixups[fc].reloc = BFD_RELOC_UNUSED;
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++fc;
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break;
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}
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}
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@ -787,12 +824,27 @@ md_assemble (str)
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/* Write out the instruction.
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Four byte insns have an opcode with the two high bits on. */
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if ((insn & 0x0600) == 0x0600)
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insn_size = 4;
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if (relaxable && fc > 0)
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{
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f = frag_var (rs_machine_dependent, 6, 4, 0,
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fixups[0].exp.X_add_symbol, 0, (char *)fixups[0].opindex);
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insn_size = 2;
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md_number_to_chars (f, insn, insn_size);
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md_number_to_chars (f + 2, 0, 4);
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fc = 0;
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}
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else if ((insn & 0x0600) == 0x0600)
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{
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insn_size = 4;
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f = frag_more (insn_size);
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md_number_to_chars (f, insn, insn_size);
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}
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else
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insn_size = 2;
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f = frag_more (insn_size);
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md_number_to_chars (f, insn, insn_size);
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{
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insn_size = 2;
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f = frag_more (insn_size);
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md_number_to_chars (f, insn, insn_size);
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}
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/* Create any fixups. At this point we do not use a
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bfd_reloc_code_real_type, but instead just use the
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@ -867,14 +919,17 @@ tc_gen_reloc (seg, fixp)
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return reloc;
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}
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/* Assume everything will fit in two bytes, then expand as necessary. */
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int
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md_estimate_size_before_relax (fragp, seg)
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fragS *fragp;
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asection *seg;
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{
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return 0;
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fragp->fr_var = 4;
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return 2;
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}
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long
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md_pcrel_from (fixp)
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fixS *fixp;
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@ -52,3 +52,10 @@
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#define tc_fix_adjustable(FIX) \
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(!(FIX)->fx_pcrel && (FIX)->fx_r_type != BFD_RELOC_V850_TDA_OFFSET)
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/* We need to handle lo(), hi(), etc etc in .hword, .word, etc
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directives, so we have to parse "cons" expressions ourselves. */
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#define TC_PARSE_CONS_EXPRESSION(EXP, NBYTES) parse_cons_expression_v850 (EXP)
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#define TC_CONS_FIX_NEW cons_fix_new_v850
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extern const struct relax_type md_relax_table[];
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#define TC_GENERIC_RELAX_TABLE md_relax_table
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