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* m32c.opc (m32c_cgen_insn_supported): Use int, not CGEN_BITSET,

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to represent isa sets.
This commit is contained in:
Jim Blandy 2005-07-16 18:43:55 +00:00
parent 9a20ed6e90
commit aa2608541f
2 changed files with 8 additions and 3 deletions
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5
cpu/ChangeLog
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@ -1,3 +1,8 @@
2005-07-16 Jim Blandy <jimb@redhat.com>
* m32c.opc (m32c_cgen_insn_supported): Use int, not CGEN_BITSET,
to represent isa sets.
2005-07-15 Jim Blandy <jimb@redhat.com> 2005-07-15 Jim Blandy <jimb@redhat.com>
* m32c.cpu, m32c.opc: Fix copyright. * m32c.cpu, m32c.opc: Fix copyright.

6
cpu/m32c.opc
View File

@ -866,14 +866,14 @@ m32c_cgen_insn_supported (CGEN_CPU_DESC cd,
const CGEN_INSN *insn) const CGEN_INSN *insn)
{ {
int machs = CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_MACH); int machs = CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_MACH);
CGEN_BITSET isas = CGEN_INSN_BITSET_ATTR_VALUE (insn, CGEN_INSN_ISA); int isas = CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_ISA);
/* If attributes are absent, assume no restriction. */ /* If attributes are absent, assume no restriction. */
if (machs == 0) if (machs == 0)
machs = ~0; machs = ~0;
return (machs & cd->machs) return ((machs & cd->machs)
&& cgen_bitset_intersect_p (& isas, cd->isas); && (isas & cd->isas));
} }
/* Parse a set of registers, R0,R1,A0,A1,SB,FB. */ /* Parse a set of registers, R0,R1,A0,A1,SB,FB. */