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2012-10-26 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>

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* s390-mkopc.c: Accept empty lines in s390-opc.txt.
	* s390-opc.c: Add M_20OPT field. New instruction formats RRF_RURR2 and RRF_RMRR.
	* s390-opc.txt: Add new instructions.  New instruction type for lptea.

2012-10-26  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>

	* gas/testsuite/gas/s390/zarch-z10.d: Refreshed.
	* gas/testsuite/gas/s390/zarch-z10.s: Refreshed.
	* gas/testsuite/gas/s390/zarch-z196.d: Refreshed.
	* gas/testsuite/gas/s390/zarch-z196.s: Refreshed.
	* gas/testsuite/gas/s390/zarch-z9-109.d: Refreshed.
	* gas/testsuite/gas/s390/zarch-z990.d: Refreshed.
	* gas/testsuite/gas/s390/zarch-z990.s: Refreshed.
	* gas/testsuite/gas/s390/zarch-zEC12.d: Refreshed.
	* gas/testsuite/gas/s390/zarch-zEC12.s: Refreshed.
This commit is contained in:
Andreas Krebbel 2012-10-26 09:41:55 +00:00
parent 747a4ac1f4
commit aac129d776
14 changed files with 744 additions and 678 deletions
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12
gas/testsuite/ChangeLog
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@ -1,3 +1,15 @@
2012-10-26 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
* gas/testsuite/gas/s390/zarch-z10.d: Refreshed.
* gas/testsuite/gas/s390/zarch-z10.s: Refreshed.
* gas/testsuite/gas/s390/zarch-z196.d: Refreshed.
* gas/testsuite/gas/s390/zarch-z196.s: Refreshed.
* gas/testsuite/gas/s390/zarch-z9-109.d: Refreshed.
* gas/testsuite/gas/s390/zarch-z990.d: Refreshed.
* gas/testsuite/gas/s390/zarch-z990.s: Refreshed.
* gas/testsuite/gas/s390/zarch-zEC12.d: Refreshed.
* gas/testsuite/gas/s390/zarch-zEC12.s: Refreshed.
2012-10-26 Christian Groessler <chris@groessler.org>
* gas/z8k/z8k.exp: Run translate-ops test.

1
gas/testsuite/gas/s390/zarch-z10.d
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@ -385,4 +385,5 @@ Disassembly of section .text:
.*: b2 e0 00 67 [ ]*scctr %r6,%r7
.*: b2 e1 00 67 [ ]*spctr %r6,%r7
.*: b2 80 6d 05 [ ]*lpp 3333\(%r6\)
.*: b9 28 00 00 [ ]*pckmo
.*: 07 07 [ ]*nopr %r7

1
gas/testsuite/gas/s390/zarch-z10.s
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@ -379,3 +379,4 @@ foo:
scctr %r6,%r7
spctr %r6,%r7
lpp 3333(%r6)
pckmo

4
gas/testsuite/gas/s390/zarch-z196.d
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@ -253,3 +253,7 @@ Disassembly of section .text:
.*: b3 d3 97 35 [ ]*sdtra %f3,%f5,%f9,7
.*: b3 db 57 14 [ ]*sxtra %f1,%f4,%f5,7
.*: b2 b8 7f a0 [ ]*srnmb 4000\(%r7\)
.*: b9 2a 00 56 [ ]*kmf %r5,%r6
.*: b9 2b 00 56 [ ]*kmo %r5,%r6
.*: b9 2c 00 00 [ ]*pcc
.*: b9 2d 90 56 [ ]*kmctr %r5,%r6,%r9

4
gas/testsuite/gas/s390/zarch-z196.s
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@ -255,3 +255,7 @@ foo:
sdtra %f3,%f5,%f9,7
sxtra %f1,%f4,%f5,7
srnmb 4000(%r7)
kmf %r5,%r6
kmo %r5,%r6
pcc
kmctr %r5,%r6,%r9

2
gas/testsuite/gas/s390/zarch-z9-109.d
View File

@ -43,7 +43,7 @@ Disassembly of section .text:
.*: b2 b0 5f ff [ ]*stfle 4095\(%r5\)
.*: b2 7c 5f ff [ ]*stckf 4095\(%r5\)
.*: c8 60 5f ff af ff [ ]*mvcos 4095\(%r5\),4095\(%r10\),%r6
.*: b9 aa 5f 69 [ ]*lptea %r6,%r9,%r5,15
.*: b9 aa 9f 65 [ ]*lptea %r6,%r9,%r5,15
.*: b2 2b f0 69 [ ]*sske %r6,%r9,15
.*: b9 b1 f0 68 [ ]*cu24 %r6,%r8,15
.*: b2 a6 f0 68 [ ]*cu21 %r6,%r8,15

4
gas/testsuite/gas/s390/zarch-z990.d
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@ -128,3 +128,7 @@ Disassembly of section .text:
.*: e3 65 a0 00 80 82 [ ]*xg %r6,-524288\(%r5,%r10\)
.*: eb ff 50 00 80 57 [ ]*xiy -524288\(%r5\),255
.*: e3 65 a0 00 80 57 [ ]*xy %r6,-524288\(%r5,%r10\)
.*: b9 9a 00 60 [ ]*epair %r6
.*: b9 9b 00 60 [ ]*esair %r6
.*: b9 9e 00 65 [ ]*pti %r6,%r5
.*: b9 9f 00 60 [ ]*ssair %r6

4
gas/testsuite/gas/s390/zarch-z990.s
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@ -122,3 +122,7 @@ foo:
xg %r6,-524288(%r5,%r10)
xiy -524288(%r5),255
xy %r6,-524288(%r5,%r10)
epair %r6
esair %r6
pti %r6,%r5
ssair %r6

3
gas/testsuite/gas/s390/zarch-zEC12.d
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@ -51,4 +51,7 @@ Disassembly of section .text:
.*: ed 90 8f a0 4d ab [ ]*cxzt %f4,4000\(10,%r8\),13
.*: ed 90 8f a0 6d a8 [ ]*czdt %f6,4000\(10,%r8\),13
.*: ed 90 8f a0 4d a9 [ ]*czxt %f4,4000\(10,%r8\),13
.*: b2 e8 c0 56 [ ]*ppa %r5,%r6,12
.*: b9 8f 60 59 [ ]*crdte %r5,%r6,%r9,0
.*: b9 8f 61 59 [ ]*crdte %r5,%r6,%r9,1
.*: 07 07 [ ]*nopr %r7

4
gas/testsuite/gas/s390/zarch-zEC12.s
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@ -48,3 +48,7 @@ foo:
cxzt %f4,4000(10,%r8),13
czdt %f6,4000(10,%r8),13
czxt %f4,4000(10,%r8),13
ppa %r5,%r6,12
crdte %r5,%r6,%r9
crdte %r5,%r6,%r9,1

6
opcodes/ChangeLog
View File

@ -1,3 +1,9 @@
2012-10-26 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
* s390-mkopc.c: Accept empty lines in s390-opc.txt.
* s390-opc.c: Add M_20OPT field. New instruction formats RRF_RURR2 and RRF_RMRR.
* s390-opc.txt: Add new instructions. New instruction type for lptea.
2012-10-26 Christian Groessler <chris@groessler.org>
* z8kgen.c (struct op): Fix encoding for translate opcodes (trdb,

2
opcodes/s390-mkopc.c
View File

@ -343,7 +343,7 @@ main (void)
int mode_bits;
char *str;
if (currentLine[0] == '#')
if (currentLine[0] == '#' || currentLine[0] == '\n')
continue;
memset (opcode, 0, 8);
if (sscanf (currentLine, "%15s %15s %15s \"%79[^\"]\" %15s %15s",

6
opcodes/s390-opc.c
View File

@ -230,6 +230,8 @@ const struct s390_operand s390_operands[] =
#define M_16OPT 73 /* 4 bit optional mask starting at 16 */
{ 4, 16, S390_OPERAND_OPTIONAL },
#define M_20OPT 74 /* 4 bit optional mask starting at 20 */
{ 4, 20, S390_OPERAND_OPTIONAL },
};
@ -342,8 +344,10 @@ const struct s390_operand s390_operands[] =
#define INSTR_RRF_FUFF2 4, { F_24,F_28,F_16,U4_20,0,0 } /* e.g. adtra */
#define INSTR_RRF_FEUFEFE2 4, { FE_24,FE_28,FE_16,U4_20,0,0 } /* e.g. axtra */
#define INSTR_RRF_RURR 4, { R_24,R_28,R_16,U4_20,0,0 } /* e.g. .insn */
#define INSTR_RRF_RURR2 4, { R_24,R_16,R_28,U4_20,0,0 } /* e.g. lptea */
#define INSTR_RRF_R0RR 4, { R_24,R_16,R_28,0,0,0 } /* e.g. idte */
#define INSTR_RRF_R0RR2 4, { R_24,R_28,R_16,0,0,0 } /* e.g. ark */
#define INSTR_RRF_RMRR 4, { R_24,R_16,R_28,M_20OPT,0,0 } /* e.g. crdte */
#define INSTR_RRF_U0FF 4, { F_24,U4_16,F_28,0,0,0 } /* e.g. fixr */
#define INSTR_RRF_U0FEFE 4, { FE_24,U4_16,FE_28,0,0,0 } /* e.g. fixbr */
#define INSTR_RRF_U0RF 4, { R_24,U4_16,F_28,0,0,0 } /* e.g. cfebr */
@ -500,8 +504,10 @@ const struct s390_operand s390_operands[] =
#define MASK_RRF_FUFF2 { 0xff, 0xff, 0x00, 0x00, 0x00, 0x00 }
#define MASK_RRF_FEUFEFE2 { 0xff, 0xff, 0x00, 0x00, 0x00, 0x00 }
#define MASK_RRF_RURR { 0xff, 0xff, 0x00, 0x00, 0x00, 0x00 }
#define MASK_RRF_RURR2 { 0xff, 0xff, 0x00, 0x00, 0x00, 0x00 }
#define MASK_RRF_R0RR { 0xff, 0xff, 0x00, 0x00, 0x00, 0x00 }
#define MASK_RRF_R0RR2 { 0xff, 0xff, 0x00, 0x00, 0x00, 0x00 }
#define MASK_RRF_RMRR { 0xff, 0xff, 0x00, 0x00, 0x00, 0x00 }
#define MASK_RRF_U0FF { 0xff, 0xff, 0x0f, 0x00, 0x00, 0x00 }
#define MASK_RRF_U0FEFE { 0xff, 0xff, 0x0f, 0x00, 0x00, 0x00 }
#define MASK_RRF_U0RF { 0xff, 0xff, 0x0f, 0x00, 0x00, 0x00 }

21
opcodes/s390-opc.txt
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@ -715,6 +715,11 @@ b92f kmc RRE_RR "cipher message with chaining" z990 esa,zarch
b93e kimd RRE_RR "compute intermediate message digest" z990 esa,zarch
b93f klmd RRE_RR "compute last message digest" z990 esa,zarch
b91e kmac RRE_RR "compute message authentication code" z990 esa,zarch
b99a epair RRE_R0 "extract primary ASN and instance" z990 esa,zarch
b99b esair RRE_R0 "extract secondary ASN and instance" z990 esa,zarch
b99e pti RRE_RR "program transfer with instance" z990 esa,zarch
b99f ssair RRE_R0 "set secondary ASN with instance" z990 esa,zarch
# z9-109 extended immediate instructions
c209 afi RIL_RI "add immediate 32" z9-109 zarch
c208 agfi RIL_RI "add immediate 64<32" z9-109 zarch
@ -759,7 +764,7 @@ b27c stckf S_RD "store clock fast" z9-109 zarch
# z9-109 move with optional specifications instruction
c800 mvcos SSF_RRDRD "move with optional specifications" z9-109 zarch
# z9-109 load page-table-entry address instruction
b9aa lptea RRF_RURR "load page-table-entry address" z9-109 zarch
b9aa lptea RRF_RURR2 "load page-table-entry address" z9-109 zarch
# z9-109 conditional sske facility, sske instruction entered twice
b22b sske RRF_M0RR "set storage key extended" z9-109 zarch
# z9-109 etf2-enhancement facility, instructions entered twice
@ -857,6 +862,7 @@ ed0000000059 tdgxt RXE_FERRD "test data group extended dfp" z9-ec zarch
010a pfpo E "perform floating point operation" z9-ec zarch
c801 ectg SSF_RRDRD "extract cpu time" z9-ec zarch
c802 csst SSF_RRDRD "compare and swap and store" z9-ec zarch
# The new instructions of the System z10 Enterprise Class
eb000000006a asi SIY_IRD "add immediate (32<8)" z10 zarch
eb000000007a agsi SIY_IRD "add immediate (64<8)" z10 zarch
@ -971,6 +977,9 @@ b286 qsi S_RD "query sampling information" z10 zarch
b2e0 scctr RRE_RR "set cpu counter" z10 zarch
b2e1 spctr RRE_RR "set peripheral counter" z10 zarch
b280 lpp S_RD "load program parameter" z10 zarch
b928 pckmo RRE_00 "perform cryptographic key management operation" z10 zarch
# The new instructions of the IBM zEnterprise z196
b9c8 ahhhr RRF_R0RR2 "add high high" z196 zarch
b9d8 ahhlr RRF_R0RR2 "add high low" z196 zarch
cc08 aih RIL_RI "add immediate high" z196 zarch
@ -992,7 +1001,7 @@ e300000000c4 lhh RXY_RRRD "load halfword high" z196 zarch
e300000000ca lfh RXY_RRRD "load high" z196 zarch
e300000000c2 llch RXY_RRRD "load logical character high" z196 zarch
e300000000c6 llhh RXY_RRRD "load logical halfword high" z196 zarch
ec000000005D risbhg RIE_RRUUU "rotate then insert selected bits high" z196 zarch
ec000000005d risbhg RIE_RRUUU "rotate then insert selected bits high" z196 zarch
ec0000000051 risblg RIE_RRUUU "rotate then insert selected bits low" z196 zarch
e300000000c3 stch RXY_RRRD "store character high" z196 zarch
e300000000c7 sthh RXY_RRRD "store halfword high" z196 zarch
@ -1104,6 +1113,12 @@ b3d8 mxtra RRF_FEUFEFE2 "multiply extended dfp with rounding mode" z196 zarch
b3d3 sdtra RRF_FUFF2 "subtract long dfp with rounding mode" z196 zarch
b3db sxtra RRF_FEUFEFE2 "subtract extended dfp with rounding mode" z196 zarch
b2b8 srnmb S_RD "set 3 bit bfp rounding mode" z196 zarch
b92a kmf RRE_RR "cipher message with CFB" z196 zarch
b92b kmo RRE_RR "cipher message with OFB" z196 zarch
b92c pcc RRE_00 "perform cryptographic computation" z196 zarch
b92d kmctr RRF_R0RR2 "cipher message with counter" z196 zarch
# The new instructions of the IBM zEnterprise EC12
b2ec etnd RRE_R0 "extract transaction nesting depth" zEC12 zarch
e30000000025 ntstg RXY_RRRD "nontransactional store" zEC12 zarch
b2fc tabort S_RD "transaction abort" zEC12 zarch
@ -1112,7 +1127,9 @@ e561 tbeginc SIL_RDU "constrained transaction begin" zEC12 zarch
b2f8 tend S_00 "transaction end" zEC12 zarch
c7 bpp SMI_U0RDP "branch prediction preload" zEC12 zarch
c5 bprp MII_UPI "branch prediction relative preload" zEC12 zarch
b2e8 ppa RRF_U0RR "perform processor assist" zEC12 zarch
b2fa niai IE_UU "next instruction access intent" zEC12 zarch
b98f crdte RRF_RMRR "compare and replace DAT table entry" zEC12 zarch
e3000000009f lat RXY_RRRD "load and trap 32 bit" zEC12 zarch
e30000000085 lgat RXY_RRRD "load and trap 64 bit" zEC12 zarch
e300000000c8 lfhat RXY_RRRD "load high and trap" zEC12 zarch