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https://github.com/darlinghq/darling-gdb.git
synced 2024-12-02 17:16:42 +00:00
* PKE sim unit testing continuing. Starting to run milestone sample.
* sky-pke.h (PKE_MEM_READ): Removed "read" entry from FIFO trace. * sky-pke.c (pke_attach): Set trace file to line buffering iff open. (pke_io_read_buffer, pke_io_write_buffer): Handle erroneous reads/writes by zero-padding. (pke_io_write_buffer): Switch to more bit-field definition macros. (pke_issue): Remove "stalled" entry from FIFO trace. (pke_pc_advance): Correct logic for DMA-tag-skipping, PKEcode classification. (pke_code_mskpath3): Sketch of possible PATH3 masking method. (pke_code_mpg): Keep order of lower/upper VU words as supplied. (pke_code_unpack): Logic change for wl/cl/num unpacking. Weird.
This commit is contained in:
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b4d2f483b3
@ -174,10 +174,9 @@ pke_attach(SIM_DESC sd, struct pke_device* me)
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{
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me->fifo_trace_file = fopen(trace_filename, "w");
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if(me->fifo_trace_file == NULL)
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{
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perror("VIF FIFO trace error on fopen");
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}
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setvbuf(me->fifo_trace_file, NULL, _IOLBF, 0);
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else
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setvbuf(me->fifo_trace_file, NULL, _IOLBF, 0);
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}
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}
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}
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@ -272,14 +271,14 @@ pke_io_read_buffer(device *me_,
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/* copy the bits */
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memcpy(dest, ((unsigned_1*) &result) + reg_byte, nr_bytes);
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/* okay */
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return nr_bytes;
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}
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else
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{
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/* error */
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return 0;
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/* return zero bits */
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memset(dest, 0, nr_bytes);
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}
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return nr_bytes;
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/* NOTREACHED */
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}
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else if(addr >= my_fifo_addr &&
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@ -344,7 +343,7 @@ pke_io_write_buffer(device *me_,
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case PKE_REG_FBRST:
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/* Order these tests from least to most overriding, in case
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multiple bits are set. */
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if(BIT_MASK_GET(input[0], 2, 2)) /* STC bit */
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if(BIT_MASK_GET(input[0], PKE_REG_FBRST_STC_B, PKE_REG_FBRST_STC_E))
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{
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/* clear a bunch of status bits */
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PKE_REG_MASK_SET(me, STAT, PSS, 0);
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@ -356,15 +355,15 @@ pke_io_write_buffer(device *me_,
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me->flags &= ~PKE_FLAG_PENDING_PSS;
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/* will allow resumption of possible stalled instruction */
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}
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if(BIT_MASK_GET(input[0], 2, 2)) /* STP bit */
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if(BIT_MASK_GET(input[0], PKE_REG_FBRST_STP_B, PKE_REG_FBRST_STP_E))
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{
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me->flags |= PKE_FLAG_PENDING_PSS;
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}
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if(BIT_MASK_GET(input[0], 1, 1)) /* FBK bit */
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if(BIT_MASK_GET(input[0], PKE_REG_FBRST_FBK_B, PKE_REG_FBRST_FBK_E))
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{
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PKE_REG_MASK_SET(me, STAT, PFS, 1);
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}
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if(BIT_MASK_GET(input[0], 0, 0)) /* RST bit */
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if(BIT_MASK_GET(input[0], PKE_REG_FBRST_RST_B, PKE_REG_FBRST_RST_E))
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{
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/* clear FIFO by skipping to word after PC: also
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prevents re-execution attempt of possible stalled
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@ -426,17 +425,13 @@ pke_io_write_buffer(device *me_,
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}
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/* perform return */
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if(writeable)
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if(! writeable)
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{
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/* okay */
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return nr_bytes;
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}
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else
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{
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/* error */
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return 0;
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; /* error */
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}
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return nr_bytes;
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/* NOTREACHED */
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}
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else if(addr >= my_fifo_addr &&
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@ -546,14 +541,6 @@ pke_issue(SIM_DESC sd, struct pke_device* me)
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(PKE_REG_MASK_GET(me, STAT, PIS) && !PKE_REG_MASK_GET(me, ERR, MII)))
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{
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/* try again next cycle; no state change */
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/* trace command */
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if(me->fifo_trace_file != NULL)
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{
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fprintf(me->fifo_trace_file, "# stalled STAT: %08lx\n",
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(unsigned long) me->regs[PKE_REG_STAT][0]);
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}
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return;
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}
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@ -654,10 +641,11 @@ pke_pc_advance(struct pke_device* me, int num_words)
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{
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int num = num_words;
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struct fifo_quadword* fq = NULL;
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int skipped = 0;
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ASSERT(num_words >= 0);
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do
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/* printf("pke %d pc_advance num_words %d\n", me->pke_number, num_words); */
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while(1)
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{
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fq = & me->fifo[me->fifo_pc];
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@ -666,49 +654,46 @@ pke_pc_advance(struct pke_device* me, int num_words)
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{
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/* skip by going around loop an extra time */
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num ++;
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skipped = 1;
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}
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else
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skipped = 0;
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if(num > 0) /* increment PC */
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/* nothing left to skip / no DMA tag here */
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if(num == 0)
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break;
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/* one word skipped */
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num --;
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/* point to next word */
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me->qw_pc ++;
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if(me->qw_pc == 4)
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{
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/* one word skipped */
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num --;
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me->qw_pc = 0;
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me->fifo_pc ++;
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/* point to next word */
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me->qw_pc ++;
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if(me->qw_pc == 4)
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/* trace the consumption of the FIFO quadword we just skipped over */
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/* fq still points to it */
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if(me->fifo_trace_file != NULL)
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{
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me->qw_pc = 0;
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me->fifo_pc ++;
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/* assert complete classification */
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ASSERT(fq->word_class[3] != wc_unknown);
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ASSERT(fq->word_class[2] != wc_unknown);
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ASSERT(fq->word_class[1] != wc_unknown);
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ASSERT(fq->word_class[0] != wc_unknown);
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/* trace the consumption of this FIFO quadword */
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if(me->fifo_trace_file != NULL)
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{
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/* assert complete classification */
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ASSERT(fq->word_class[3] != wc_unknown);
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ASSERT(fq->word_class[2] != wc_unknown);
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ASSERT(fq->word_class[1] != wc_unknown);
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ASSERT(fq->word_class[0] != wc_unknown);
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/* print trace record */
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fprintf(me->fifo_trace_file,
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"%d 0x%08x_%08x_%08x_%08x 0x%08x %c%c%c%c\n",
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(me->pke_number == 0 ? 0 : 1),
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(unsigned) fq->data[3], (unsigned) fq->data[2],
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(unsigned) fq->data[1], (unsigned) fq->data[0],
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(unsigned) fq->source_address,
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fq->word_class[3], fq->word_class[2],
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fq->word_class[1], fq->word_class[0]);
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}
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/* print trace record */
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fprintf(me->fifo_trace_file,
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"%d 0x%08x_%08x_%08x_%08x 0x%08x %c%c%c%c\n",
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(me->pke_number == 0 ? 0 : 1),
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(unsigned) fq->data[3], (unsigned) fq->data[2],
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(unsigned) fq->data[1], (unsigned) fq->data[0],
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(unsigned) fq->source_address,
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fq->word_class[3], fq->word_class[2],
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fq->word_class[1], fq->word_class[0]);
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}
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/* XXX: zap old entries in FIFO */
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} /* next quadword */
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} /* increment PC */
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} /* eat num words */
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while(num > 0 || skipped);
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/* XXX: zap old entries in FIFO */
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} /* next quadword */
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}
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/* clear FQC if FIFO is now empty */
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if(me->fifo_num_elements == me->fifo_pc)
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@ -717,6 +702,7 @@ pke_pc_advance(struct pke_device* me, int num_words)
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}
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else /* annote the word where the PC lands as an PKEcode */
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{
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fq = & me->fifo[me->fifo_pc];
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ASSERT(fq->word_class[me->qw_pc] == wc_pkecode ||
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fq->word_class[me->qw_pc] == wc_unknown);
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fq->word_class[me->qw_pc] = wc_pkecode;
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@ -743,6 +729,8 @@ pke_pc_fifo(struct pke_device* me, int operand_num, unsigned_4** operand)
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new_fifo_pc = me->fifo_pc;
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new_qw_pc = me->qw_pc;
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/* printf("pke %d pc_fifo operand_num %d\n", me->pke_number, operand_num); */
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do
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{
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/* one word skipped */
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@ -1002,8 +990,29 @@ pke_code_stmod(struct pke_device* me, unsigned_4 pkecode)
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void
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pke_code_mskpath3(struct pke_device* me, unsigned_4 pkecode)
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{
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ASSERT(0);
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/* XXX: no easy interface toward GPUIF for this purpose */
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#if 0
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/* XXX: pending on patrickm support code */
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int imm = BIT_MASK_GET(pkecode, PKE_OPCODE_IMM_B, PKE_OPCODE_IMM_E);
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unsigned_4 gif_mode;
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/* read old GIF control register */
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ASSERT(sizeof(unsigned_4) == 4);
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PKE_MEM_READ(me, GIF_REG_MODE, & gif_mode, 4);
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/* mask appropriate bit */
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if(BIT_MASK_GET(imm, PKE_REG_MSKPATH3_B, PKE_REG_MSKPATH3_E) != 0)
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gif_mode |= GIF_REG_MODE_M3R_MASK;
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else
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gif_mode &= ~GIF_REG_MODE_M3R_MASK;
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/* write back modified register */
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PKE_MEM_WRITE(me, GIF_REG_MODE, & gif_mode, 4);
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#endif
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/* done */
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pke_pc_advance(me, 1);
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PKE_REG_MASK_SET(me, STAT, PPS, PKE_REG_STAT_PPS_IDLE);
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}
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@ -1427,7 +1436,7 @@ pke_code_mpg(struct pke_device* me, unsigned_4 pkecode)
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/* VU*_MEM0_TRACK : source-addr tracking table */
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vutrack_addr_base = (me->pke_number == 0) ?
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VU0_MEM0_SRCADDR_START : VU1_MEM0_SRCADDR_START;
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vutrack_addr = vu_addr_base + (imm + i) * 4;
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vutrack_addr = vutrack_addr_base + (imm + i) * 4;
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/* Fetch operand words; assume they are already little-endian for VU imem */
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fq = pke_pc_fifo(me, i*2 + 1, & operand);
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@ -1435,15 +1444,15 @@ pke_code_mpg(struct pke_device* me, unsigned_4 pkecode)
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vu_upper_opcode = *pke_pc_operand(me, i*2 + 2);
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/* write data into VU memory */
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/* upper (vector) opcode comes in first word */
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ASSERT(sizeof(unsigned_4) == 4);
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/* lower (scalar) opcode comes in first word */
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PKE_MEM_WRITE(me, vu_addr,
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& vu_upper_opcode,
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4);
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/* lower (scalar) opcode comes in next word */
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PKE_MEM_WRITE(me, vu_addr + 4,
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& vu_lower_opcode,
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4);
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/* upper (vector) opcode comes in second word */
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ASSERT(sizeof(unsigned_4) == 4);
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PKE_MEM_WRITE(me, vu_addr + 4,
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& vu_upper_opcode,
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4);
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/* write tracking address in target byte-order */
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source_addr = H2T_4(fq->source_address);
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@ -1617,8 +1626,8 @@ pke_code_unpack(struct pke_device* me, unsigned_4 pkecode)
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if(cl >= wl)
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{
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/* map zero to max+1 */
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if(wl == 0) wl = 0x0100;
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vu_addr = vu_addr_base + 16*(cl*(vector_num_out/wl) + (vector_num_out%wl));
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int addrwl = (wl == 0) ? 0x0100 : wl;
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vu_addr = vu_addr_base + 16*(cl*(vector_num_out/addrwl) + (vector_num_out%addrwl));
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}
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else
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vu_addr = vu_addr_base + 16*vector_num_out;
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@ -1642,7 +1651,8 @@ pke_code_unpack(struct pke_device* me, unsigned_4 pkecode)
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/* For cyclic unpack, next operand quadword may come from instruction stream
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or be zero. */
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if((cl < wl) && ((vector_num_out % wl) >= cl)) /* wl != 0, set above */
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if((num == 0 && cl == 0 && wl == 0) || /* shortcut clear */
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((cl < wl) && ((vector_num_out % wl) >= cl))) /* wl != 0, set above */
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{
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/* clear operand - used only in a "indeterminate" state */
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for(i = 0; i < 4; i++)
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@ -1701,7 +1711,8 @@ pke_code_unpack(struct pke_device* me, unsigned_4 pkecode)
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if(m) /* use mask register? */
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{
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/* compute index into mask register for this word */
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int mask_index = PKE_LIMIT(vector_num_out % wl, 3); /* wl != 0, set above */
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int addrwl = (wl == 0) ? 0x0100 : wl;
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int mask_index = PKE_LIMIT(vector_num_out % addrwl, 3);
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for(i=0; i<4; i++) /* loop over columns */
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{
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@ -244,6 +244,20 @@ typedef unsigned_4 quadword[4];
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#define PKE_REG_ERR_MII_E 0
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#define PKE_REG_ERR_MII_B 0
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/* FBRST command bitfields */
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#define PKE_REG_FBRST_STC_E 3
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#define PKE_REG_FBRST_STC_B 3
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#define PKE_REG_FBRST_STP_E 2
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#define PKE_REG_FBRST_STP_B 2
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#define PKE_REG_FBRST_FBK_E 1
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#define PKE_REG_FBRST_FBK_B 1
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#define PKE_REG_FBRST_RST_E 0
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#define PKE_REG_FBRST_RST_B 0
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/* MSKPATH3 command bitfields */
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#define PKE_REG_MSKPATH3_E 15
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#define PKE_REG_MSKPATH3_B 15
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/* UNPACK opcodes */
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#define PKE_UNPACK(vn,vl) ((vn) << 2 | (vl))
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@ -396,15 +410,6 @@ struct pke_device
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sim_core_read_aligned_##size(cpu, CIA_GET(cpu), sim_core_read_map, \
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(SIM_ADDR)(addr)); \
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memcpy((unsigned_##size*) (data), (void*) & value, size); \
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if(me->fifo_trace_file != NULL) \
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{ \
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int i; \
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fprintf((me)->fifo_trace_file, "# Read %2d bytes from ", size); \
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fprintf((me)->fifo_trace_file, "0x%08lx: ", (unsigned long)(addr)); \
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for(i=0; i<size; i++) \
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fprintf((me)->fifo_trace_file, " %02x", ((unsigned_1*)(& value))[i]); \
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fprintf((me)->fifo_trace_file, "\n"); \
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} \
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} while(0)
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#define PKE_MEM_WRITE(me,addr,data,size) \
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