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2001-01-08 Bo Thorsen <bo@suse.de>
* config/tc-i386.c (i386_immediate, i386_displacement):
GOTPCREL check fix.
This commit is contained in:
Andreas Jaeger
parent
482e8b3206
commit
b77a7acd1b
@ -1,3 +1,8 @@
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2001-01-08 Bo Thorsen <bo@suse.de>
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* config/tc-i386.c (i386_immediate, i386_displacement):
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GOTPCREL check fix.
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2001-01-07 Ian Lance Taylor <ian@zembu.com>
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* doc/c-i386.texi (i386-Arch): Remove spaces incorrectly inserted
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@ -1,5 +1,5 @@
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/* i386.c -- Assemble code for the Intel 80386
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Copyright (C) 1989, 91, 92, 93, 94, 95, 96, 97, 98, 99, 2000
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Copyright (C) 1989, 91, 92, 93, 94, 95, 96, 97, 98, 99, 2000, 2001
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Free Software Foundation, Inc.
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This file is part of GAS, the GNU Assembler.
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@ -245,7 +245,7 @@ static enum flag_code flag_code;
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static int use_rela_relocations = 0;
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/* The names used to print error messages. */
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static const char *flag_code_names[] =
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static const char *flag_code_names[] =
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{
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"32",
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"16",
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@ -2084,12 +2084,12 @@ md_assemble (line)
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if ((overlap0 & (Imm8 | Imm8S | Imm16 | Imm32 | Imm32S))
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&& overlap0 != Imm8 && overlap0 != Imm8S
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&& overlap0 != Imm16 && overlap0 != Imm32S
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&& overlap0 != Imm32 && overlap0 != Imm64)
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&& overlap0 != Imm32 && overlap0 != Imm64)
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{
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if (i.suffix)
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{
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overlap0 &= (i.suffix == BYTE_MNEM_SUFFIX ? (Imm8 | Imm8S) :
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(i.suffix == WORD_MNEM_SUFFIX ? Imm16 :
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(i.suffix == WORD_MNEM_SUFFIX ? Imm16 :
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(i.suffix == QWORD_MNEM_SUFFIX ? Imm64 | Imm32S : Imm32)));
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}
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else if (overlap0 == (Imm16 | Imm32S | Imm32)
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@ -2110,13 +2110,13 @@ md_assemble (line)
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if ((overlap1 & (Imm8 | Imm8S | Imm16 | Imm32S | Imm32))
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&& overlap1 != Imm8 && overlap1 != Imm8S
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&& overlap1 != Imm16 && overlap1 != Imm32S
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&& overlap1 != Imm32 && overlap1 != Imm64)
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&& overlap1 != Imm32 && overlap1 != Imm64)
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{
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if (i.suffix)
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{
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overlap1 &= (i.suffix == BYTE_MNEM_SUFFIX ? (Imm8 | Imm8S) :
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(i.suffix == WORD_MNEM_SUFFIX ? Imm16 :
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(i.suffix == QWORD_MNEM_SUFFIX ? Imm64 | Imm32S : Imm32)));
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(i.suffix == WORD_MNEM_SUFFIX ? Imm16 :
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(i.suffix == QWORD_MNEM_SUFFIX ? Imm64 | Imm32S : Imm32)));
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}
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else if (overlap1 == (Imm16 | Imm32 | Imm32S)
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|| overlap1 == (Imm16 | Imm32)
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@ -3132,6 +3132,14 @@ i386_immediate (imm_start)
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i.disp_reloc[this_operand] = BFD_RELOC_386_GOTOFF;
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len = 6;
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}
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else if (strncmp (cp + 1, "GOTPCREL", 8) == 0)
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{
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if (flag_code == CODE_64BIT)
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i.disp_reloc[this_operand] = BFD_RELOC_X86_64_GOTPCREL;
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else
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as_bad ("GOTPCREL relocations are supported only in 64bit mode.");
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len = 8;
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}
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else if (strncmp (cp + 1, "GOT", 3) == 0)
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{
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if (flag_code == CODE_64BIT)
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@ -3140,14 +3148,6 @@ i386_immediate (imm_start)
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i.disp_reloc[this_operand] = BFD_RELOC_386_GOT32;
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len = 3;
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}
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else if (strncmp (cp + 1, "GOTPCREL", 3) == 0)
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{
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if (flag_code == CODE_64BIT)
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i.disp_reloc[this_operand] = BFD_RELOC_X86_64_GOTPCREL;
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else
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as_bad ("GOTPCREL relocations are supported only in 64bit mode.");
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len = 3;
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}
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else
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as_bad (_("bad reloc specifier in expression"));
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@ -3370,6 +3370,13 @@ i386_displacement (disp_start, disp_end)
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i.disp_reloc[this_operand] = BFD_RELOC_386_GOTOFF;
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len = 6;
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}
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else if (strncmp (cp + 1, "GOTPCREL", 8) == 0)
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{
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if (flag_code != CODE_64BIT)
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as_bad ("GOTPCREL relocation is supported only in 64bit mode.");
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i.disp_reloc[this_operand] = BFD_RELOC_X86_64_GOTPCREL;
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len = 8;
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}
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else if (strncmp (cp + 1, "GOT", 3) == 0)
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{
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if (flag_code == CODE_64BIT)
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@ -3378,13 +3385,6 @@ i386_displacement (disp_start, disp_end)
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i.disp_reloc[this_operand] = BFD_RELOC_386_GOT32;
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len = 3;
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}
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else if (strncmp (cp + 1, "GOTPCREL", 3) == 0)
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{
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if (flag_code != CODE_64BIT)
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as_bad ("GOTPCREL relocation is supported only in 64bit mode.");
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i.disp_reloc[this_operand] = BFD_RELOC_X86_64_GOTPCREL;
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len = 3;
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}
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else
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as_bad (_("bad reloc specifier in expression"));
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@ -4798,16 +4798,16 @@ tc_coff_sizemachdep (frag)
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dataType BYTE | WORD | DWORD | QWORD | XWORD
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digits decdigit
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| digits decdigit
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| digits hexdigit
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| digits decdigit
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| digits hexdigit
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decdigit [0-9]
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e05 e05 addOp e06
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| e06
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| e06
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e06 e06 mulOp e09
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| e09
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| e09
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e09 OFFSET e10
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| e09 PTR e10
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@ -4815,10 +4815,10 @@ tc_coff_sizemachdep (frag)
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| e10
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e10 e10 [ expr ]
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| e11
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| e11
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e11 ( expr )
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| [ expr ]
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| [ expr ]
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| constant
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| dataType
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| id
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@ -4826,16 +4826,16 @@ tc_coff_sizemachdep (frag)
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| register
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=> expr SHORT e05
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| e05
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| e05
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gpRegister AX | EAX | BX | EBX | CX | ECX | DX | EDX
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| BP | EBP | SP | ESP | DI | EDI | SI | ESI
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| BP | EBP | SP | ESP | DI | EDI | SI | ESI
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hexdigit a | b | c | d | e | f
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| A | B | C | D | E | F
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| A | B | C | D | E | F
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id alpha
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| id alpha
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| id alpha
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| id decdigit
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mulOp * | / | MOD
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@ -4843,13 +4843,13 @@ tc_coff_sizemachdep (frag)
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quote " | '
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register specialRegister
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| gpRegister
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| gpRegister
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| byteRegister
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segmentRegister CS | DS | ES | FS | GS | SS
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specialRegister CR0 | CR2 | CR3
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| DR0 | DR1 | DR2 | DR3 | DR6 | DR7
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| DR0 | DR1 | DR2 | DR3 | DR6 | DR7
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| TR3 | TR4 | TR5 | TR6 | TR7
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We simplify the grammar in obvious places (e.g., register parsing is
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@ -4857,32 +4857,32 @@ tc_coff_sizemachdep (frag)
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to implement a recursive-descent parser.
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expr SHORT e05
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| e05
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| e05
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e05 e06 e05'
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e05' addOp e06 e05'
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| Empty
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| Empty
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e06 e09 e06'
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e06' mulOp e09 e06'
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| Empty
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| Empty
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e09 OFFSET e10 e09'
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| e10 e09'
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| e10 e09'
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e09' PTR e10 e09'
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| : e10 e09'
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| : e10 e09'
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| Empty
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e10 e11 e10'
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e10' [ expr ] e10'
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| Empty
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| Empty
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e11 ( expr )
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| [ expr ]
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| [ expr ]
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| BYTE
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| WORD
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| DWORD
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@ -5020,7 +5020,7 @@ i386_intel_operand (operand_string, got_a_float)
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}
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/* expr SHORT e05
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| e05 */
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| e05 */
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static int
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intel_expr ()
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{
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@ -5068,7 +5068,7 @@ intel_e05_1 ()
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/* e06 e09 e06'
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e06' mulOp e09 e06'
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| Empty */
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| Empty */
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static int
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intel_e06 ()
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{
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@ -5093,10 +5093,10 @@ intel_e06_1 ()
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}
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/* e09 OFFSET e10 e09'
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| e10 e09'
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| e10 e09'
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e09' PTR e10 e09'
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| : e10 e09'
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| : e10 e09'
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| Empty */
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static int
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intel_e09 ()
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@ -5182,7 +5182,7 @@ intel_e09_1 ()
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/* e10 e11 e10'
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e10' [ expr ] e10'
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| Empty */
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| Empty */
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static int
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intel_e10 ()
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{
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@ -5228,7 +5228,7 @@ intel_e10_1 ()
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}
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/* e11 ( expr )
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| [ expr ]
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| [ expr ]
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| BYTE
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| WORD
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| DWORD
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