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Fix minor typos in comments
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Fred Fish
parent
d147d3844f
commit
b7ed1b4b88
@ -35,7 +35,7 @@ extern const struct pd_reg pre_defined_registers[];
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int reg_name_cnt();
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/* the number of control registers */
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#define MAX_CONTROL_REG 16
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#define MAX_CONTROL_REG 64
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/* define the format specifiers */
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#define FM00 0
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@ -81,36 +81,43 @@ struct d30v_opcode
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unsigned char format[4];
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#define SHORT_M 1
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#define SHORT_A 5
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#define SHORT_B1 7
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#define SHORT_B2 8
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#define SHORT_B3 9
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#define SHORT_B3b 11
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#define SHORT_D1 13
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#define SHORT_D2 15
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#define SHORT_U 17 /* unary SHORT_A. ABS for example */
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#define SHORT_F 19 /* SHORT_A with flag registers */
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#define SHORT_AF 21 /* SHORT_A with only the first register a flag register */
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#define SHORT_T 23 /* for trap instruction */
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#define SHORT_A5 24 /* SHORT_A with a 5-bit immediate instead of 6 */
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#define SHORT_CMP 25 /* special form for CMPcc and CMPUcc */
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#define SHORT_A1 27 /* special form of SHORT_A for MACa opcodes where a=1 */
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#define SHORT_AA 29 /* SHORT_A with the first register an accumulator */
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#define SHORT_RA 31 /* SHORT_A with the second register an accumulator */
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#define SHORT_MODINC 33
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#define SHORT_MODDEC 34
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#define SHORT_C1 35
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#define SHORT_C2 36
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#define SHORT_UF 37
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#define SHORT_NONE 38 /* no operands */
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#define LONG 39
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#define LONG_U 40 /* unary LONG */
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#define LONG_AF 41 /* LONG with the first register a flag register */
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#define LONG_CMP 42 /* special form for CMPcc and CMPUcc */
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#define LONG_M 43 /* Memory long for ldb, stb */
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#define LONG_2 44 /* LONG with 2 operands; bratnz */
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#define LONG_2b 45 /* LONG_2 with modifier of 3 */
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#define LONG_D 46 /* for DBRAI*/
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#define SHORT_M2 5 /* for ld2w and st2w */
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#define SHORT_A 9
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#define SHORT_B1 11
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#define SHORT_B2 12
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#define SHORT_B3 13
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#define SHORT_B3b 15
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#define SHORT_D1 17
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#define SHORT_D2 19
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#define SHORT_D2B 21
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#define SHORT_U 23 /* unary SHORT_A. ABS for example */
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#define SHORT_F 25 /* SHORT_A with flag registers */
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#define SHORT_AF 27 /* SHORT_A with only the first register a flag register */
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#define SHORT_T 29 /* for trap instruction */
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#define SHORT_A5 30 /* SHORT_A with a 5-bit immediate instead of 6 */
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#define SHORT_CMP 32 /* special form for CMPcc */
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#define SHORT_CMPU 34 /* special form for CMPUcc */
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#define SHORT_A1 36 /* special form of SHORT_A for MACa opcodes where a=1 */
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#define SHORT_AA 38 /* SHORT_A with the first register an accumulator */
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#define SHORT_RA 40 /* SHORT_A with the second register an accumulator */
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#define SHORT_MODINC 42
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#define SHORT_MODDEC 43
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#define SHORT_C1 44
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#define SHORT_C2 45
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#define SHORT_UF 46
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#define SHORT_A2 47
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#define SHORT_A5S 49
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#define SHORT_NONE 51 /* no operands */
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#define LONG 52
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#define LONG_U 53 /* unary LONG */
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#define LONG_AF 54 /* LONG with the first register a flag register */
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#define LONG_CMP 55 /* special form for CMPcc and CMPUcc */
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#define LONG_M 56 /* Memory long for ldb, stb */
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#define LONG_M2 57 /* Memory long for ld2w, st2w */
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#define LONG_2 58 /* LONG with 2 operands; bratnz */
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#define LONG_2b 59 /* LONG_2 with modifier of 3 */
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#define LONG_D 60 /* for DBRAI*/
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#define LONG_Db 61 /* for repeati*/
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/* the execution unit(s) used */
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int unit;
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@ -120,25 +127,41 @@ struct d30v_opcode
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/* this field is used to decide if two instructions */
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/* can be executed in parallel */
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int flags_used;
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int flags_set;
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#define FLAG_0 (1<<0)
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#define FLAG_1 (1<<1)
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#define FLAG_2 (1<<2)
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#define FLAG_3 (1<<3)
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#define FLAG_4 (1<<4) /* S (saturation) */
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#define FLAG_5 (1<<5) /* V (overflow) */
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#define FLAG_6 (1<<6) /* VA (accumulated overflow) */
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#define FLAG_7 (1<<7) /* C (carry/borrow) */
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#define FLAG_SM (1<<8) /* SM (stack mode) */
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#define FLAG_RP (1<<9) /* RP (repeat emable) */
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#define FLAG_JMP (1<<10) /* instruction is a branch */
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#define FLAG_JSR (1<<11) /* subroutine call. must be aligned */
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#define FLAG_MEM (1<<12) /* reads/writes memory */
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#define FLAG_X (1<<12) /* flag used/set depends on register contents */
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long flags_used;
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long flags_set;
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#define FLAG_0 (1L<<0)
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#define FLAG_1 (1L<<1)
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#define FLAG_2 (1L<<2)
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#define FLAG_3 (1L<<3)
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#define FLAG_4 (1L<<4) /* S (saturation) */
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#define FLAG_5 (1L<<5) /* V (overflow) */
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#define FLAG_6 (1L<<6) /* VA (accumulated overflow) */
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#define FLAG_7 (1L<<7) /* C (carry/borrow) */
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#define FLAG_SM (1L<<8) /* SM (stack mode) */
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#define FLAG_RP (1L<<9) /* RP (repeat enable) */
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#define FLAG_CONTROL (1L<<10) /* control registers */
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#define FLAG_A0 (1L<<11) /* A0 */
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#define FLAG_A1 (1L<<12) /* A1 */
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#define FLAG_JMP (1L<<13) /* instruction is a branch */
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#define FLAG_JSR (1L<<14) /* subroutine call. must be aligned */
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#define FLAG_MEM (1L<<15) /* reads/writes memory */
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#define FLAG_2WORD (1L<<16) /* 2 word/4 byte operation */
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#define FLAG_MUL16 (1L<<17) /* 16 bit multiply */
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#define FLAG_MUL32 (1L<<18) /* 32 bit multiply */
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#define FLAG_ADDSUBppp (1L<<19) /* ADDppp or SUBppp */
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#define FLAG_CVVA (FLAG_5|FLAG_6|FLAG_7)
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#define FLAG_C FLAG_7
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#define FLAG_ALL 0xffffffff
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#define FLAG_C FLAG_7
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#define FLAG_ALL (FLAG_0 | \
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FLAG_1 | \
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FLAG_2 | \
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FLAG_3 | \
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FLAG_4 | \
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FLAG_5 | \
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FLAG_6 | \
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FLAG_7 | \
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FLAG_SM | \
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FLAG_RP | \
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FLAG_CONTROL)
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int reloc_flag;
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#define RELOC_PCREL 1
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@ -161,7 +184,7 @@ struct d30v_operand
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int position;
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/* syntax flags. */
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int flags;
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long flags;
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};
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extern const struct d30v_operand d30v_operand_table[];
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@ -217,6 +240,9 @@ extern const struct d30v_operand d30v_operand_table[];
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/* fake operand for mvtsys and mvfsys */
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#define OPERAND_SPECIAL (0x8000)
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/* let the optimizer know that two registers are affected */
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#define OPERAND_2REG (0x10000)
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/* The format table is an array of struct d30v_format. */
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struct d30v_format
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{
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