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bfd/ChangeLog
2014-08-21 Tony Wang <tony.wang@arm.com> * elf32-arm.c (elf32_arm_final_link_relocate): Implement the veneer routine for R_ARM_THM_JUMP19. (arm_type_of_stub): Add conditional clause for R_ARM_THM_JUMP19 (elf32_arm_size_stub): Ditto. ld/testsuite/ChangeLog 2014-08-21 Tony Wang <tony.wang@arm.com> * ld-arm/jump-reloc-veneers-cond.s: New test. * ld-arm/farcall-cond-thumb-arm.s: Ditto. * ld-arm/jump-reloc-veneers-cond-short.d: Expected output for target without a veneer generation. * ld-arm/jump-reloc-veneers-cond-long.d: Expected output for target with a veneer generation. * ld-arm/farcall-cond-thumb-arm.d: Expected output for inter working veneer generation. * ld-arm/arm-elf.exp: Add tests for conditional branch veneer.
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@ -1,3 +1,10 @@
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2014-08-21 Tony Wang <tony.wang@arm.com>
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* elf32-arm.c (elf32_arm_final_link_relocate): Implement
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the veneer routine for R_ARM_THM_JUMP19.
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(arm_type_of_stub): Add conditional clause for R_ARM_THM_JUMP19
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(elf32_arm_size_stub): Ditto.
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2014-08-20 Roland McGrath <mcgrathr@google.com>
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PR ld/17277
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@ -2283,6 +2283,8 @@ static const bfd_vma elf32_arm_nacl_plt_entry [] =
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#define THM_MAX_BWD_BRANCH_OFFSET (-(1 << 22) + 4)
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#define THM2_MAX_FWD_BRANCH_OFFSET (((1 << 24) - 2) + 4)
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#define THM2_MAX_BWD_BRANCH_OFFSET (-(1 << 24) + 4)
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#define THM2_MAX_FWD_COND_BRANCH_OFFSET (((1 << 20) -2) + 4)
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#define THM2_MAX_BWD_COND_BRANCH_OFFSET (-(1 << 20) + 4)
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enum stub_insn_type
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{
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@ -3667,7 +3669,8 @@ arm_type_of_stub (struct bfd_link_info *info,
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/* ST_BRANCH_TO_ARM is nonsense to thumb-only targets when we
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are considering a function call relocation. */
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if (thumb_only && (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24)
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if (thumb_only && (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24
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|| r_type == R_ARM_THM_JUMP19)
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&& branch_type == ST_BRANCH_TO_ARM)
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branch_type = ST_BRANCH_TO_THUMB;
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@ -3711,7 +3714,7 @@ arm_type_of_stub (struct bfd_link_info *info,
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branch_offset = (bfd_signed_vma)(destination - location);
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if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24
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|| r_type == R_ARM_THM_TLS_CALL)
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|| r_type == R_ARM_THM_TLS_CALL || r_type == R_ARM_THM_JUMP19)
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{
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/* Handle cases where:
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- this call goes too far (different Thumb/Thumb2 max
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@ -3727,10 +3730,15 @@ arm_type_of_stub (struct bfd_link_info *info,
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|| (thumb2
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&& (branch_offset > THM2_MAX_FWD_BRANCH_OFFSET
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|| (branch_offset < THM2_MAX_BWD_BRANCH_OFFSET)))
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|| (thumb2
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&& (branch_offset > THM2_MAX_FWD_COND_BRANCH_OFFSET
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|| (branch_offset < THM2_MAX_BWD_COND_BRANCH_OFFSET))
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&& (r_type == R_ARM_THM_JUMP19))
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|| (branch_type == ST_BRANCH_TO_ARM
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&& (((r_type == R_ARM_THM_CALL
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|| r_type == R_ARM_THM_TLS_CALL) && !globals->use_blx)
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|| (r_type == R_ARM_THM_JUMP24))
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|| (r_type == R_ARM_THM_JUMP24)
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|| (r_type == R_ARM_THM_JUMP19))
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&& !use_plt))
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{
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if (branch_type == ST_BRANCH_TO_THUMB)
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@ -5347,7 +5355,8 @@ elf32_arm_size_stubs (bfd *output_bfd,
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/* For historical reasons, use the existing names for
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ARM-to-Thumb and Thumb-to-ARM stubs. */
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if ((r_type == (unsigned int) R_ARM_THM_CALL
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|| r_type == (unsigned int) R_ARM_THM_JUMP24)
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|| r_type == (unsigned int) R_ARM_THM_JUMP24
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|| r_type == (unsigned int) R_ARM_THM_JUMP19)
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&& branch_type == ST_BRANCH_TO_ARM)
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sprintf (stub_entry->output_name,
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THUMB2ARM_GLUE_ENTRY_NAME, sym_name);
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@ -9125,6 +9134,9 @@ elf32_arm_final_link_relocate (reloc_howto_type * howto,
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bfd_signed_vma reloc_signed_max = 0xffffe;
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bfd_signed_vma reloc_signed_min = -0x100000;
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bfd_signed_vma signed_check;
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enum elf32_arm_stub_type stub_type = arm_stub_none;
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struct elf32_arm_stub_hash_entry *stub_entry;
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struct elf32_arm_link_hash_entry *hash;
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/* Need to refetch the addend, reconstruct the top three bits,
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and squish the two 11 bit pieces together. */
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@ -9156,8 +9168,25 @@ elf32_arm_final_link_relocate (reloc_howto_type * howto,
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*unresolved_reloc_p = FALSE;
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}
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/* ??? Should handle interworking? GCC might someday try to
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use this for tail calls. */
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hash = (struct elf32_arm_link_hash_entry *)h;
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stub_type = arm_type_of_stub (info, input_section, rel,
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st_type, &branch_type,
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hash, value, sym_sec,
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input_bfd, sym_name);
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if (stub_type != arm_stub_none)
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{
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stub_entry = elf32_arm_get_stub_entry (input_section,
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sym_sec, h,
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rel, globals,
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stub_type);
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if (stub_entry != NULL)
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{
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value = (stub_entry->stub_offset
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+ stub_entry->stub_sec->output_offset
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+ stub_entry->stub_sec->output_section->vma);
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}
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}
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relocation = value + signed_addend;
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relocation -= (input_section->output_section->vma
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@ -1,3 +1,15 @@
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2014-08-21 Tony Wang <tony.wang@arm.com>
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* ld-arm/jump-reloc-veneers-cond.s: New test.
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* ld-arm/farcall-cond-thumb-arm.s: Ditto.
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* ld-arm/jump-reloc-veneers-cond-short.d: Expected output
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for target without a veneer generation.
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* ld-arm/jump-reloc-veneers-cond-long.d: Expected output
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for target with a veneer generation.
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* ld-arm/farcall-cond-thumb-arm.d: Expected output for
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inter working veneer generation.
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* ld-arm/arm-elf.exp: Add tests for conditional branch veneer.
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2014-08-20 Roland McGrath <mcgrathr@google.com>
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PR ld/17277
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@ -453,6 +453,16 @@ set armeabitests_nonacl {
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{{objdump -d farcall-thumb-arm-pic-veneer.d}}
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"farcall-thumb-arm-pic-veneer"}
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{"Thumb-ARM farcall cond" "-Ttext 0x8000 --section-start .foo=0x118000" "" "-W" {farcall-cond-thumb-arm.s}
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{{objdump -d farcall-cond-thumb-arm.d}}
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"farcall-cond-thumb-arm"}
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{"Thumb-ARM farcall cond (BE8)" "-Ttext 0x8000 --section-start .foo=0x118000 -EB --be8" "" "-W -EB" {farcall-cond-thumb-arm.s}
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{{objdump -d farcall-cond-thumb-arm.d}}
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"farcall-cond-thumb-arm-be8"}
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{"Thumb-ARM farcall cond (BE)" "-Ttext 0x8000 --section-start .foo=0x118000 -EB" "" "-W -EB" {farcall-cond-thumb-arm.s}
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{{objdump -d farcall-cond-thumb-arm.d}}
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"farcall-cond-thumb-arm-be"}
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{"Multiple farcalls" "-Ttext 0x1000 --section-start .foo=0x2002020" "" "" {farcall-mix.s}
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{{objdump -d farcall-mix.d}}
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"farcall-mix"}
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@ -551,6 +561,31 @@ set armeabitests_nonacl {
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{{objdump -d jump-reloc-veneers-long.d}}
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"jump-reloc-veneers-long"}
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{"R_ARM_THM_JUMP19 Relocation veneers: Short"
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"--section-start destsect=0x000108002 --section-start .text=0x8000" ""
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"-march=armv7-m -mthumb"
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{jump-reloc-veneers-cond.s}
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{{objdump -d jump-reloc-veneers-cond-short.d}}
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"jump-reloc-veneers-cond-short"}
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{"R_ARM_THM_JUMP19 Relocation veneers: Long"
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"--section-start destsect=0x00108004 --section-start .text=0x8000" ""
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"-march=armv7-m -mthumb"
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{jump-reloc-veneers-cond.s}
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{{objdump -d jump-reloc-veneers-cond-long.d}}
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"jump-reloc-veneers-cond-long"}
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{"R_ARM_THM_JUMP19 Relocation veneers: Short backward"
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"--section-start destsect=0x8004 --section-start .text=0x108000" ""
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"-march=armv7-m -mthumb"
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{jump-reloc-veneers-cond.s}
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{{objdump -d jump-reloc-veneers-cond-short-backward.d}}
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"jump-reloc-veneers-cond-short-backward"}
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{"R_ARM_THM_JUMP19 Relocation veneers: Long backward"
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"--section-start destsect=0x8002 --section-start .text=0x108000" ""
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"-march=armv7-m -mthumb"
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{jump-reloc-veneers-cond.s}
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{{objdump -d jump-reloc-veneers-cond-long-backward.d}}
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"jump-reloc-veneers-cond-long-backward"}
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{"Default group size" "-Ttext 0x1000 --section-start .foo=0x2003020" "" "" {farcall-group.s farcall-group2.s}
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{{objdump -d farcall-group.d}}
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"farcall-group-default"}
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18
ld/testsuite/ld-arm/farcall-cond-thumb-arm.d
Normal file
18
ld/testsuite/ld-arm/farcall-cond-thumb-arm.d
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@ -0,0 +1,18 @@
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.*: file format .*
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Disassembly of section .text:
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00008000 <_start>:
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8000: f050 a002 bne.w 58008 <__bar_from_thumb>
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\.\.\.
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58004: f040 8000 bne.w 58008 <__bar_from_thumb>
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00058008 <__bar_from_thumb>:
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58008: 4778 bx pc
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5800a: 46c0 nop ; \(mov r8, r8\)
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5800c: ea02fffb b 118000 <bar>
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Disassembly of section .foo:
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00118000 <bar>:
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118000: e12fff1e bx lr
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27
ld/testsuite/ld-arm/farcall-cond-thumb-arm.s
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27
ld/testsuite/ld-arm/farcall-cond-thumb-arm.s
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@ -0,0 +1,27 @@
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@ Test to ensure that a Thumb to ARM call exceeding 4Mb generates a stub.
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@ Check that we can generate two types of stub in the same section.
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.global _start
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.syntax unified
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@ We will place the section .text at 0x1c01010.
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.text
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.thumb_func
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_start:
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.global bar
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bne bar
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@ This call is close enough to generate a "short branch" stub
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@ or no stub if blx is available.
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.space 0x050000
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bne bar
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@ We will place the section .foo at 0x2001014.
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.section .foo, "xa"
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.arm
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.type bar, %function
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bar:
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bx lr
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ld/testsuite/ld-arm/jump-reloc-veneers-cond-long-backward.d
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24
ld/testsuite/ld-arm/jump-reloc-veneers-cond-long-backward.d
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@ -0,0 +1,24 @@
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.*: file format.*
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Disassembly of section destsect:
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00008002 <[^>]*>:
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8002: f7ff fffe bl 8002 <dest>
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Disassembly of section .text:
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001080.. <[^>]*>:
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1080..: f040 8002 bne.w 108008 <__dest_veneer>
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1080..: 0000 movs r0, r0
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...
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001080.. <[^>]*>:
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1080..: b401 push {r0}
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1080..: 4802 ldr r0, \[pc, #8\] ; \(108014 <__dest_veneer\+0xc>\)
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1080..: 4684 mov ip, r0
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1080..: bc01 pop {r0}
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1080..: 4760 bx ip
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1080..: bf00 nop
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1080..: 00008003 .word 0x00008003
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ld/testsuite/ld-arm/jump-reloc-veneers-cond-long.d
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24
ld/testsuite/ld-arm/jump-reloc-veneers-cond-long.d
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@ -0,0 +1,24 @@
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.*: file format.*
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Disassembly of section destsect:
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00108004 <[^>]*>:
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108004: f7ff fffe bl 108004 <dest>
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Disassembly of section .text:
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000080.. <[^>]*>:
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80..: (8002f040|f0408002) .word 0x(8002f040|f0408002)
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80..: 0000 movs r0, r0
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...
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000080.. <[^>]*>:
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80..: b401 push {r0}
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80..: 4802 ldr r0, \[pc, #8\] ; \(80.. <__dest_veneer\+0xc>\)
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80..: 4684 mov ip, r0
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80..: bc01 pop {r0}
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80..: 4760 bx ip
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80..: bf00 nop
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80..: 00108005 .word 0x00108005
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13
ld/testsuite/ld-arm/jump-reloc-veneers-cond-short-backward.d
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13
ld/testsuite/ld-arm/jump-reloc-veneers-cond-short-backward.d
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@ -0,0 +1,13 @@
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.*: file format.*
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Disassembly of section destsect:
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00008004 <[^>]*>:
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8004: f7ff fffe bl 8004 <dest>
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Disassembly of section .text:
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001080.. <_start>:
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1080..: f440 8000 bne.w 8004 <dest>
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ld/testsuite/ld-arm/jump-reloc-veneers-cond-short.d
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13
ld/testsuite/ld-arm/jump-reloc-veneers-cond-short.d
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@ -0,0 +1,13 @@
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.*: file format.*
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Disassembly of section destsect:
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00108002 <[^>]*>:
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108002: f7ff fffe bl 108002 <dest>
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Disassembly of section .text:
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000080.. <[^>]*>:
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80..: f07f afff bne.w 108002 <dest>
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12
ld/testsuite/ld-arm/jump-reloc-veneers-cond.s
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12
ld/testsuite/ld-arm/jump-reloc-veneers-cond.s
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@ -0,0 +1,12 @@
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.text
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.syntax unified
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.thumb_func
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.global _start
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.type _start,%function
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_start:
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bne dest
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.section destsect, "x"
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.thumb_func
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dest:
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bl dest
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