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* mn10300-opc.c (IMM16_PCREL, SD8N_PCREL, D16_SHIFT): Mark these
as relaxable. For the relaxing assembler.
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@ -1,3 +1,12 @@
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Thu Mar 6 16:51:11 1997 Jeffrey A Law (law@cygnus.com)
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* mn10300-opc.c (IMM16_PCREL, SD8N_PCREL, D16_SHIFT): Mark these
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as relaxable.
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Tue Mar 4 06:10:36 1997 J.T. Conklin <jtc@cygnus.com>
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* m68k-opc.c (m68k_opcodes): Fix last change for the mc68010.
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Mon Mar 3 07:45:20 1997 J.T. Conklin <jtc@cygnus.com>
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* m68k-opc.c (m68k_opcodes): Added entries for the tst insns on
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@ -202,7 +211,7 @@ Thu Jan 30 11:30:45 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
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Wed Jan 29 09:39:17 1997 Jeffrey A Law (law@cygnus.com)
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* mn10200-opc.c (mn10200_operands): Make 8 and 16 bit pc-relative
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branchs relaxable.
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branches relaxable.
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Tue Jan 28 15:57:34 1997 Ian Lance Taylor <ian@cygnus.com>
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@ -84,7 +84,7 @@ const struct mn10300_operand mn10300_operands[] = {
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/* 16 bit pc-relative immediate which may promote to a 16bit
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pc-relative immediate. */
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#define IMM16_PCREL (IMM16+1)
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{16, 0, MN10300_OPERAND_PROMOTE | MN10300_OPERAND_PCREL},
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{16, 0, MN10300_OPERAND_PCREL | MN10300_OPERAND_RELAX | MN10300_OPERAND_SIGNED},
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/* 16bit unsigned dispacement in a memory operation which
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may promote to a 32bit displacement. */
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@ -163,7 +163,7 @@ const struct mn10300_operand mn10300_operands[] = {
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/* 8 bit pc-relative displacement. */
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#define SD8N_PCREL (SD8N+1)
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{8, 0, MN10300_OPERAND_SIGNED | MN10300_OPERAND_PCREL},
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{8, 0, MN10300_OPERAND_SIGNED | MN10300_OPERAND_PCREL | MN10300_OPERAND_RELAX},
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/* 8 bit signed displacement shifted left 8 bits in the instruction. */
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#define SD8N_SHIFT8 (SD8N_PCREL+1)
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@ -192,7 +192,7 @@ const struct mn10300_operand mn10300_operands[] = {
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/* 16bit pc-relative displacement which may promote to 32bit pc-relative
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displacement. */
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#define D16_SHIFT (AN01+1)
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{16, 8, MN10300_OPERAND_PROMOTE | MN10300_OPERAND_PCREL},
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{16, 8, MN10300_OPERAND_PCREL | MN10300_OPERAND_RELAX | MN10300_OPERAND_SIGNED},
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/* 8 bit immediate found in the extension word. */
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#define IMM8E (D16_SHIFT+1)
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