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* NEWS: Mention --vfp11-denorm-fix option.
* ld.texinfo: Document above. * emulparams/armelf_linux.sh (OTHER_TEXT_SECTIONS): Add .vfp11_veneer section. * emulparams/armelf.sh (OTHER_TEXT_SECTIONS): Likewise. * emultempl/armelf.em (vfp11_denorm_fix): New static variable. (arm_elf_before_allocation): Call bfd_elf32_arm_set_vfp11_fix, bfd_elf32_arm_init_maps and bfd_elf32_arm_vfp11_erratum_scan. (arm_elf_after_allocation): New function. Call bfd_elf32_arm_vfp11_fix_veneer_locations for all input statements. (arm_elf_create_output_section_statements): Pass vfp11 fix command line option to BFD. (OPTION_VFP11_DENORM_FIX): New option. (PARSE_AND_LIST_LONGOPTS): Handle new option. (PARSE_AND_LIST_OPTIONS): Likewise. (PARSE_AND_LIST_ARGS_CASES): Likewise. (LDEMUL_AFTER_ALLOCATION): Define.
This commit is contained in:
parent
b785d0e121
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ld/ChangeLog
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ld/ChangeLog
@ -1,3 +1,23 @@
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2006-01-29 Julian Brown <julian@codesourcery.com>
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* NEWS: Mention --vfp11-denorm-fix option.
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* ld.texinfo: Document above.
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* emulparams/armelf_linux.sh (OTHER_TEXT_SECTIONS): Add
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.vfp11_veneer section.
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* emulparams/armelf.sh (OTHER_TEXT_SECTIONS): Likewise.
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* emultempl/armelf.em (vfp11_denorm_fix): New static variable.
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(arm_elf_before_allocation): Call bfd_elf32_arm_set_vfp11_fix,
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bfd_elf32_arm_init_maps and bfd_elf32_arm_vfp11_erratum_scan.
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(arm_elf_after_allocation): New function. Call
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bfd_elf32_arm_vfp11_fix_veneer_locations for all input statements.
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(arm_elf_create_output_section_statements): Pass vfp11 fix command
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line option to BFD.
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(OPTION_VFP11_DENORM_FIX): New option.
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(PARSE_AND_LIST_LONGOPTS): Handle new option.
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(PARSE_AND_LIST_OPTIONS): Likewise.
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(PARSE_AND_LIST_ARGS_CASES): Likewise.
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(LDEMUL_AFTER_ALLOCATION): Define.
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2007-01-24 H.J. Lu <hongjiu.lu@intel.com>
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* ldgram.y (SIZEOF_HEADERS): Remove duplicated one.
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3
ld/NEWS
3
ld/NEWS
@ -26,6 +26,9 @@
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* New switch: --print-gc-sections to list any sections removed by garabge
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collection.
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* ARM: Added --vfp11-denorm-fix option to work around an erratum in current
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VFP11 coprocessors.
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Changes in 2.17:
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* Support for the Infineon XC16X has been added by KPIT Cummins Infosystems.
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@ -6,7 +6,7 @@ LITTLE_OUTPUT_FORMAT="elf32-littlearm"
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TEXT_START_ADDR=0x8000
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TEMPLATE_NAME=elf32
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EXTRA_EM_FILE=armelf
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OTHER_TEXT_SECTIONS='*(.glue_7t) *(.glue_7)'
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OTHER_TEXT_SECTIONS='*(.glue_7t) *(.glue_7) *(.vfp11_veneer)'
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OTHER_BSS_SYMBOLS='__bss_start__ = .;'
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OTHER_BSS_END_SYMBOLS='_bss_end__ = . ; __bss_end__ = . ;'
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OTHER_END_SYMBOLS='__end__ = . ;'
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@ -11,7 +11,7 @@ GENERATE_SHLIB_SCRIPT=yes
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GENERATE_PIE_SCRIPT=yes
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DATA_START_SYMBOLS='__data_start = . ;';
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OTHER_TEXT_SECTIONS='*(.glue_7t) *(.glue_7)'
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OTHER_TEXT_SECTIONS='*(.glue_7t) *(.glue_7) *(.vfp11_veneer)'
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OTHER_BSS_SYMBOLS='__bss_start__ = .;'
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OTHER_BSS_END_SYMBOLS='_bss_end__ = . ; __bss_end__ = . ;'
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OTHER_END_SYMBOLS='__end__ = . ;'
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@ -6,7 +6,7 @@ LITTLE_OUTPUT_FORMAT="elf32-littlearm"
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TEXT_START_ADDR=0x00100000
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TEMPLATE_NAME=elf32
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EXTRA_EM_FILE=armelf
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OTHER_TEXT_SECTIONS='*(.glue_7t) *(.glue_7)'
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OTHER_TEXT_SECTIONS='*(.glue_7t) *(.glue_7) *(.vfp11_veneer)'
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OTHER_BSS_SYMBOLS='__bss_start__ = .;'
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OTHER_BSS_END_SYMBOLS='_bss_end__ = . ; __bss_end__ = . ;'
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OTHER_END_SYMBOLS='__end__ = . ;'
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@ -35,6 +35,7 @@ static int target1_is_rel = 0${TARGET1_IS_REL};
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static char *target2_type = "${TARGET2_TYPE}";
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static int fix_v4bx = 0;
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static int use_blx = 0;
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static bfd_arm_vfp11_fix vfp11_denorm_fix = BFD_ARM_VFP11_FIX_DEFAULT;
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static void
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gld${EMULATION_NAME}_before_parse (void)
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@ -124,6 +125,10 @@ arm_elf_before_allocation (void)
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bfd_elf32_arm_set_byteswap_code (&link_info, byteswap_code);
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/* Choose type of VFP11 erratum fix, or warn if specified fix is unnecessary
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due to architecture version. */
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bfd_elf32_arm_set_vfp11_fix (output_bfd, &link_info);
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/* We should be able to set the size of the interworking stub section. We
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can't do it until later if we have dynamic sections, though. */
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if (! elf_hash_table (&link_info)->dynamic_sections_created)
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@ -131,8 +136,12 @@ arm_elf_before_allocation (void)
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/* Here we rummage through the found bfds to collect glue information. */
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LANG_FOR_EACH_INPUT_STATEMENT (is)
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{
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/* Initialise mapping tables for code/data. */
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bfd_elf32_arm_init_maps (is->the_bfd);
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if (!bfd_elf32_arm_process_before_allocation (is->the_bfd,
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&link_info))
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&link_info)
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|| !bfd_elf32_arm_vfp11_erratum_scan (is->the_bfd, &link_info))
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/* xgettext:c-format */
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einfo (_("Errors encountered processing file %s"), is->filename);
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}
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@ -145,6 +154,22 @@ arm_elf_before_allocation (void)
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bfd_elf32_arm_allocate_interworking_sections (& link_info);
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}
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static void
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arm_elf_after_allocation (void)
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{
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/* Call the standard elf routine. */
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after_allocation_default ();
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{
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LANG_FOR_EACH_INPUT_STATEMENT (is)
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{
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/* Figure out where VFP11 erratum veneers (and the labels returning
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from same) have been placed. */
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bfd_elf32_arm_vfp11_fix_veneer_locations (is->the_bfd, &link_info);
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}
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}
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}
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static void
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arm_elf_finish (void)
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{
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@ -214,7 +239,7 @@ static void
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arm_elf_create_output_section_statements (void)
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{
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bfd_elf32_arm_set_target_relocs (&link_info, target1_is_rel, target2_type,
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fix_v4bx, use_blx);
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fix_v4bx, use_blx, vfp11_denorm_fix);
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}
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EOF
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@ -230,6 +255,7 @@ PARSE_AND_LIST_PROLOGUE='
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#define OPTION_TARGET2 305
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#define OPTION_FIX_V4BX 306
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#define OPTION_USE_BLX 307
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#define OPTION_VFP11_DENORM_FIX 308
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'
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PARSE_AND_LIST_SHORTOPTS=p
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@ -243,6 +269,7 @@ PARSE_AND_LIST_LONGOPTS='
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{ "target2", required_argument, NULL, OPTION_TARGET2},
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{ "fix-v4bx", no_argument, NULL, OPTION_FIX_V4BX},
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{ "use-blx", no_argument, NULL, OPTION_USE_BLX},
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{ "vfp11-denorm-fix", required_argument, NULL, OPTION_VFP11_DENORM_FIX},
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'
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PARSE_AND_LIST_OPTIONS='
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@ -253,6 +280,7 @@ PARSE_AND_LIST_OPTIONS='
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fprintf (file, _(" --target2=<type> Specify definition of R_ARM_TARGET2\n"));
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fprintf (file, _(" --fix-v4bx Rewrite BX rn as MOV pc, rn for ARMv4\n"));
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fprintf (file, _(" --use-blx Enable use of BLX instructions\n"));
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fprintf (file, _(" --vfp11-denorm-fix Specify how to fix VFP11 denorm erratum\n"));
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'
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PARSE_AND_LIST_ARGS_CASES='
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@ -287,12 +315,24 @@ PARSE_AND_LIST_ARGS_CASES='
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case OPTION_USE_BLX:
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use_blx = 1;
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break;
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case OPTION_VFP11_DENORM_FIX:
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if (strcmp (optarg, "none") == 0)
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vfp11_denorm_fix = BFD_ARM_VFP11_FIX_NONE;
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else if (strcmp (optarg, "scalar") == 0)
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vfp11_denorm_fix = BFD_ARM_VFP11_FIX_SCALAR;
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else if (strcmp (optarg, "vector") == 0)
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vfp11_denorm_fix = BFD_ARM_VFP11_FIX_VECTOR;
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else
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einfo (_("Unrecognized VFP11 fix type '\''%s'\''.\n"), optarg);
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break;
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'
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# We have our own after_open and before_allocation functions, but they call
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# the standard routines, so give them a different name.
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LDEMUL_AFTER_OPEN=arm_elf_after_open
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LDEMUL_BEFORE_ALLOCATION=arm_elf_before_allocation
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LDEMUL_AFTER_ALLOCATION=arm_elf_after_allocation
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LDEMUL_CREATE_OUTPUT_SECTION_STATEMENTS=arm_elf_create_output_section_statements
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# Replace the elf before_parse function with our own.
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This option is enabled implicitly for SymbianOS, so there is no need to
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specify it if you are using that target.
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@cindex VFP11_DENORM_FIX
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@kindex --vfp11-denorm-fix
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The @samp{--vfp11-denorm-fix} switch enables a link-time workaround for a
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bug in certain VFP11 coprocessor hardware, which sometimes allows
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instructions with denorm operands (which must be handled by support code)
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to have those operands overwritten by subsequent instructions before
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the support code can read the intended values.
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The bug may be avoided in scalar mode if you allow at least one
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intervening instruction between a VFP11 instruction which uses a register
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and another instruction which writes to the same register, or at least two
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intervening instructions if vector mode is in use. The bug only affects
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full-compliance floating-point mode: you do not need this workaround if
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you are using "runfast" mode. Please contact ARM for further details.
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If you know you are using buggy VFP11 hardware, you can
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enable this workaround by specifying the linker option
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@samp{--vfp-denorm-fix=scalar} if you are using the VFP11 scalar
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mode only, or @samp{--vfp-denorm-fix=vector} if you are using
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vector mode (the latter also works for scalar code). The default is
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@samp{--vfp-denorm-fix=none}.
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If the workaround is enabled, instructions are scanned for
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potentially-troublesome sequences, and a veneer is created for each
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such sequence which may trigger the erratum. The veneer consists of the
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first instruction of the sequence and a branch back to the subsequent
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instruction. The original instruction is then replaced with a branch to
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the veneer. The extra cycles required to call and return from the veneer
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are sufficient to avoid the erratum in both the scalar and vector cases.
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@ifclear GENERIC
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@lowersections
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@end ifclear
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