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* as.h (assert): Warning fix.
* expr.c (expr): Correct assertion. * read.c (s_comm_internal): Remove assertion. * write.c (relax_segment): Enable vma assertion only for BFD_ASSEMBLER. (fixup_segment): Remove assertion. * config/tc-dlx.c (machine_ip): Remove untrue assertions. (md_apply_fix3): Likewise. * config/tc-i370.c (md_begin): Correct assertion. (i370_macro): Warning fix for assertion.
This commit is contained in:
parent
055d1eb0f8
commit
c9dea48b1f
@ -1,3 +1,15 @@
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2005-03-01 Alan Modra <amodra@bigpond.net.au>
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* as.h (assert): Warning fix.
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* expr.c (expr): Correct assertion.
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* read.c (s_comm_internal): Remove assertion.
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* write.c (relax_segment): Enable vma assertion only for BFD_ASSEMBLER.
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(fixup_segment): Remove assertion.
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* config/tc-dlx.c (machine_ip): Remove untrue assertions.
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(md_apply_fix3): Likewise.
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* config/tc-i370.c (md_begin): Correct assertion.
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(i370_macro): Warning fix for assertion.
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2005-03-01 Alan Modra <amodra@bigpond.net.au>
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2005-03-01 Alan Modra <amodra@bigpond.net.au>
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* configure.in (AC_C_BIGENDIAN): Invoke.
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* configure.in (AC_C_BIGENDIAN): Invoke.
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3
gas/as.h
3
gas/as.h
@ -104,7 +104,8 @@ extern void *alloca ();
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#if __GNUC__ < 2 || (__GNUC__ == 2 && __GNUC_MINOR__ < 6)
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#if __GNUC__ < 2 || (__GNUC__ == 2 && __GNUC_MINOR__ < 6)
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#define __PRETTY_FUNCTION__ ((char*)0)
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#define __PRETTY_FUNCTION__ ((char*)0)
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#endif
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#endif
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#define assert(P) ((P) ? 0 : (as_assert (__FILE__, __LINE__, __PRETTY_FUNCTION__), 0))
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#define assert(P) \
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((void) ((P) ? 0 : (as_assert (__FILE__, __LINE__, __PRETTY_FUNCTION__), 0)))
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#undef abort
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#undef abort
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#define abort() as_abort (__FILE__, __LINE__, __PRETTY_FUNCTION__)
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#define abort() as_abort (__FILE__, __LINE__, __PRETTY_FUNCTION__)
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@ -972,21 +972,18 @@ machine_ip (str)
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/* Type 'a' Register. */
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/* Type 'a' Register. */
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case 'a':
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case 'a':
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/* A general register at bits 21-25, rs1. */
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/* A general register at bits 21-25, rs1. */
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know (operand->X_op != O_register);
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reg_shift = 21;
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reg_shift = 21;
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goto general_reg;
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goto general_reg;
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/* Type 'b' Register. */
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/* Type 'b' Register. */
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case 'b':
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case 'b':
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/* A general register at bits 16-20, rs2/rd. */
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/* A general register at bits 16-20, rs2/rd. */
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know (operand->X_op != O_register);
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reg_shift = 16;
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reg_shift = 16;
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goto general_reg;
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goto general_reg;
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/* Type 'c' Register. */
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/* Type 'c' Register. */
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case 'c':
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case 'c':
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/* A general register at bits 11-15, rd. */
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/* A general register at bits 11-15, rd. */
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know (operand->X_op != O_register);
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reg_shift = 11;
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reg_shift = 11;
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general_reg:
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general_reg:
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@ -1135,9 +1132,6 @@ md_apply_fix3 (fixP, valP, seg)
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long val = *valP;
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long val = *valP;
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char *place = fixP->fx_where + fixP->fx_frag->fr_literal;
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char *place = fixP->fx_where + fixP->fx_frag->fr_literal;
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know (fixP->fx_size == 4);
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know (fixP->fx_r_type < NO_RELOC);
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switch (fixP->fx_r_type)
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switch (fixP->fx_r_type)
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{
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{
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case RELOC_DLX_LO16:
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case RELOC_DLX_LO16:
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@ -588,7 +588,8 @@ md_begin ()
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op_end = i370_opcodes + i370_num_opcodes;
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op_end = i370_opcodes + i370_num_opcodes;
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for (op = i370_opcodes; op < op_end; op++)
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for (op = i370_opcodes; op < op_end; op++)
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{
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{
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know ((op->opcode & op->mask) == op->opcode);
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know ((op->opcode.i[0] & op->mask.i[0]) == op->opcode.i[0]
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&& (op->opcode.i[1] & op->mask.i[1]) == op->opcode.i[1]);
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if ((op->flags & i370_cpu) != 0)
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if ((op->flags & i370_cpu) != 0)
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{
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{
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@ -2422,7 +2423,7 @@ i370_macro (str, macro)
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else
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else
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{
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{
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arg = strtol (format + 1, &send, 10);
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arg = strtol (format + 1, &send, 10);
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know (send != format && arg >= 0 && arg < count);
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know (send != format && arg >= 0 && (unsigned) arg < count);
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len += strlen (operands[arg]);
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len += strlen (operands[arg]);
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format = send;
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format = send;
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}
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}
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@ -1716,7 +1716,7 @@ expr (int rankarg, /* Larger # is higher rank. */
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know (op_right == O_illegal
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know (op_right == O_illegal
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|| op_rank[(int) op_right] <= op_rank[(int) op_left]);
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|| op_rank[(int) op_right] <= op_rank[(int) op_left]);
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know ((int) op_left >= (int) O_multiply
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know ((int) op_left >= (int) O_multiply
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&& (int) op_left <= (int) O_logical_or);
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&& (int) op_left <= (int) O_index);
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/* input_line_pointer->after right-hand quantity. */
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/* input_line_pointer->after right-hand quantity. */
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/* left-hand quantity in resultP. */
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/* left-hand quantity in resultP. */
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@ -1472,7 +1472,6 @@ s_comm_internal (int param,
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#endif
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#endif
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}
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}
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know (symbolP == NULL || symbolP->sy_frag == &zero_address_frag);
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demand_empty_rest_of_line ();
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demand_empty_rest_of_line ();
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out:
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out:
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if (flag_mri)
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if (flag_mri)
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@ -2395,7 +2395,9 @@ relax_segment (struct frag *segment_frag_root, segT segment)
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into the section. Here it is assumed that the
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into the section. Here it is assumed that the
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section's VMA is zero, and can omit subtracting it
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section's VMA is zero, and can omit subtracting it
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from the symbol's value to get the address offset. */
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from the symbol's value to get the address offset. */
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know (S_GET_SECTION (symbolP)->vma == 0);
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#ifdef BFD_ASSEMBLER
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know (S_GET_SEGMENT (symbolP)->vma == 0);
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#endif
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target += S_GET_VALUE (symbolP) * OCTETS_PER_BYTE;
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target += S_GET_VALUE (symbolP) * OCTETS_PER_BYTE;
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}
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}
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@ -2583,7 +2585,6 @@ fixup_segment (fixS *fixP, segT this_segment)
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if (fixP->fx_addsy != NULL
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if (fixP->fx_addsy != NULL
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&& symbol_mri_common_p (fixP->fx_addsy))
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&& symbol_mri_common_p (fixP->fx_addsy))
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{
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{
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know (fixP->fx_addsy->sy_value.X_op == O_symbol);
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add_number += S_GET_VALUE (fixP->fx_addsy);
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add_number += S_GET_VALUE (fixP->fx_addsy);
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fixP->fx_offset = add_number;
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fixP->fx_offset = add_number;
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fixP->fx_addsy
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fixP->fx_addsy
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